Merge branch 'master' of ssh://github.com/86Box/86Box into cleanup30
This commit is contained in:
@@ -64,7 +64,6 @@ AppDir:
|
||||
- usr/lib/cmake
|
||||
- usr/lib/pkgconfig
|
||||
- usr/sbin
|
||||
- usr/share/aclocal
|
||||
- usr/share/alsa
|
||||
- usr/share/apport
|
||||
- usr/share/bug
|
||||
|
@@ -232,7 +232,7 @@ else
|
||||
then
|
||||
pkgs="$pkgs build-essential"
|
||||
else
|
||||
sudo dpkg --add-architecture "$arch_deb"
|
||||
sudo dpkg --add-architecture $arch_deb
|
||||
pkgs="$pkgs crossbuild-essential-$arch_deb"
|
||||
fi
|
||||
|
||||
|
@@ -31,7 +31,7 @@ if(MUNT_EXTERNAL)
|
||||
endif()
|
||||
|
||||
project(86Box
|
||||
VERSION 3.2.1
|
||||
VERSION 3.3
|
||||
DESCRIPTION "Emulator of x86-based systems"
|
||||
HOMEPAGE_URL "https://86box.net"
|
||||
LANGUAGES C CXX)
|
||||
|
@@ -1577,7 +1577,7 @@ pipc_init(const device_t *info)
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||||
dev->ac97 = device_add(&ac97_via_device);
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ac97_via_set_slot(dev->ac97, dev->slot, PCI_INTC);
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|
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dev->sb = device_add_inst(&sb_pro_compat_device, 2);
|
||||
dev->sb = device_add(&sb_pro_compat_device);
|
||||
#ifndef VIA_PIPC_FM_EMULATION
|
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dev->sb->opl_enabled = 1;
|
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#endif
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|
@@ -268,7 +268,7 @@ isapnp_read_data(uint16_t addr, void *priv)
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||||
case 0x01: /* Serial Isolation */
|
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card = dev->first_card;
|
||||
while (card) {
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||||
if (card->enable && card->rom && (card->state == PNP_STATE_ISOLATION))
|
||||
if (card->enable && (card->state == PNP_STATE_ISOLATION))
|
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break;
|
||||
card = card->next;
|
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}
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||||
|
@@ -23,7 +23,6 @@ enum {
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||||
AD1848_TYPE_DEFAULT = 0,
|
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AD1848_TYPE_CS4248,
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AD1848_TYPE_CS4231,
|
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AD1848_TYPE_CS4235,
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AD1848_TYPE_CS4236
|
||||
};
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||||
|
||||
@@ -47,10 +46,6 @@ typedef struct {
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||||
|
||||
int16_t buffer[SOUNDBUFLEN * 2];
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||||
int pos;
|
||||
|
||||
void *cram_priv,
|
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(*cram_write)(uint16_t addr, uint8_t val, void *priv);
|
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uint8_t (*cram_read)(uint16_t addr, void *priv);
|
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} ad1848_t;
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||||
|
||||
|
||||
|
@@ -135,8 +135,6 @@ extern const device_t wss_device;
|
||||
extern const device_t ncr_business_audio_device;
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||||
|
||||
/* Crystal CS423x */
|
||||
extern const device_t cs4235_device;
|
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extern const device_t cs4235_onboard_device;
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||||
extern const device_t cs4236b_device;
|
||||
extern const device_t cs4237b_device;
|
||||
extern const device_t cs4238b_device;
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||||
|
@@ -20,12 +20,12 @@
|
||||
#define EMU_NAME "86Box"
|
||||
#define EMU_NAME_W LSTR(EMU_NAME)
|
||||
|
||||
#define EMU_VERSION "3.2.1"
|
||||
#define EMU_VERSION "3.3"
|
||||
#define EMU_VERSION_W LSTR(EMU_VERSION)
|
||||
#define EMU_VERSION_EX "3.21"
|
||||
#define EMU_VERSION_EX "3.30"
|
||||
#define EMU_VERSION_MAJ 3
|
||||
#define EMU_VERSION_MIN 2
|
||||
#define EMU_VERSION_PATCH 1
|
||||
#define EMU_VERSION_MIN 3
|
||||
#define EMU_VERSION_PATCH 0
|
||||
|
||||
#define EMU_BUILD_NUM 0
|
||||
|
||||
|
@@ -442,7 +442,7 @@ sst_init(const device_t *info)
|
||||
f = nvr_fopen(flash_path, "rb");
|
||||
if (f) {
|
||||
if (fread(&(dev->array[0x00000]), 1, dev->size, f) != dev->size)
|
||||
pclog("Less than %i bytes read from the SST Flash ROM file\n", dev->size);
|
||||
fatal("Less than %i bytes read from the SST Flash ROM file\n", dev->size);
|
||||
fclose(f);
|
||||
} else
|
||||
dev->dirty = 1; /* It is by definition dirty on creation. */
|
||||
|
@@ -16,7 +16,7 @@
|
||||
*
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
* Copyright 2018-2020 TheCollector1995.
|
||||
* Copyright 2021-2022 RichardG.
|
||||
* Copyright 2021 RichardG.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
@@ -56,7 +56,7 @@ ad1848_setdma(ad1848_t *ad1848, int dma)
|
||||
void
|
||||
ad1848_updatevolmask(ad1848_t *ad1848)
|
||||
{
|
||||
if ((ad1848->type >= AD1848_TYPE_CS4235) && ((ad1848->xregs[4] & 0x10) || ad1848->wten))
|
||||
if ((ad1848->type == AD1848_TYPE_CS4236) && ((ad1848->xregs[4] & 0x10) || ad1848->wten))
|
||||
ad1848->wave_vol_mask = 0x3f;
|
||||
else
|
||||
ad1848->wave_vol_mask = 0x7f;
|
||||
@@ -69,7 +69,7 @@ ad1848_updatefreq(ad1848_t *ad1848)
|
||||
double freq;
|
||||
uint8_t set = 0;
|
||||
|
||||
if (ad1848->type >= AD1848_TYPE_CS4235) {
|
||||
if (ad1848->type == AD1848_TYPE_CS4236) {
|
||||
if (ad1848->xregs[11] & 0x20) {
|
||||
freq = 16934400LL;
|
||||
switch (ad1848->xregs[13]) {
|
||||
@@ -134,7 +134,7 @@ ad1848_read(uint16_t addr, void *priv)
|
||||
break;
|
||||
|
||||
case 18: case 19:
|
||||
if (ad1848->type >= AD1848_TYPE_CS4235) {
|
||||
if (ad1848->type == AD1848_TYPE_CS4236) {
|
||||
if ((ad1848->xregs[4] & 0x14) == 0x14) /* FM remapping */
|
||||
ret = ad1848->xregs[ad1848->index - 12]; /* real FM volume on registers 6 and 7 */
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||||
else if (ad1848->wten && !(ad1848->xregs[4] & 0x08)) /* wavetable remapping */
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||||
@@ -142,14 +142,8 @@ ad1848_read(uint16_t addr, void *priv)
|
||||
}
|
||||
break;
|
||||
|
||||
case 20: case 21:
|
||||
/* Backdoor to the Control/RAM registers on CS4235. */
|
||||
if ((ad1848->type == AD1848_TYPE_CS4235) && (ad1848->xregs[18] & 0x80))
|
||||
ret = ad1848->cram_read(ad1848->index - 15, ad1848->cram_priv);
|
||||
break;
|
||||
|
||||
case 23:
|
||||
if ((ad1848->type >= AD1848_TYPE_CS4235) && (ad1848->regs[23] & 0x08)) {
|
||||
if ((ad1848->type == AD1848_TYPE_CS4236) && (ad1848->regs[23] & 0x08)) {
|
||||
if ((ad1848->xindex & 0xfe) == 0x00) /* remapped line volume */
|
||||
ret = ad1848->regs[18 + ad1848->xindex];
|
||||
else
|
||||
@@ -180,7 +174,7 @@ ad1848_write(uint16_t addr, uint8_t val, void *priv)
|
||||
ad1848->index = val & 0x1f; /* cs4231a extended mode enabled */
|
||||
else
|
||||
ad1848->index = val & 0x0f; /* ad1848/cs4248 mode TODO: some variants/clones DO NOT mirror, just ignore the writes? */
|
||||
if (ad1848->type >= AD1848_TYPE_CS4235)
|
||||
if (ad1848->type == AD1848_TYPE_CS4236)
|
||||
ad1848->regs[23] &= ~0x08; /* clear XRAE */
|
||||
ad1848->trd = val & 0x20;
|
||||
ad1848->mce = val & 0x40;
|
||||
@@ -189,7 +183,7 @@ ad1848_write(uint16_t addr, uint8_t val, void *priv)
|
||||
case 1:
|
||||
switch (ad1848->index) {
|
||||
case 10:
|
||||
if (ad1848->type < AD1848_TYPE_CS4235)
|
||||
if (ad1848->type != AD1848_TYPE_CS4236)
|
||||
break;
|
||||
/* fall-through */
|
||||
|
||||
@@ -229,7 +223,7 @@ ad1848_write(uint16_t addr, uint8_t val, void *priv)
|
||||
break;
|
||||
|
||||
case 18: case 19:
|
||||
if (ad1848->type >= AD1848_TYPE_CS4235) {
|
||||
if (ad1848->type == AD1848_TYPE_CS4236) {
|
||||
if ((ad1848->xregs[4] & 0x14) == 0x14) { /* FM remapping */
|
||||
ad1848->xregs[ad1848->index - 12] = val; /* real FM volume on extended registers 6 and 7 */
|
||||
temp = 1;
|
||||
@@ -271,20 +265,12 @@ ad1848_write(uint16_t addr, uint8_t val, void *priv)
|
||||
}
|
||||
break;
|
||||
|
||||
case 20: case 21:
|
||||
/* Backdoor to the Control/RAM registers on CS4235. */
|
||||
if ((ad1848->type == AD1848_TYPE_CS4235) && (ad1848->xregs[18] & 0x80)) {
|
||||
ad1848->cram_write(ad1848->index - 15, val, ad1848->cram_priv);
|
||||
val = ad1848->regs[ad1848->index];
|
||||
}
|
||||
break;
|
||||
|
||||
case 22:
|
||||
updatefreq = 1;
|
||||
break;
|
||||
|
||||
case 23:
|
||||
if ((ad1848->type >= AD1848_TYPE_CS4235) && ((ad1848->regs[12] & 0x60) == 0x60)) {
|
||||
if ((ad1848->type == AD1848_TYPE_CS4236) && ((ad1848->regs[12] & 0x60) == 0x60)) {
|
||||
if (!(ad1848->regs[23] & 0x08)) { /* existing (not new) XRAE is clear */
|
||||
ad1848->xindex = ((val & 0x04) << 2) | (val >> 4);
|
||||
break;
|
||||
@@ -341,7 +327,7 @@ ad1848_write(uint16_t addr, uint8_t val, void *priv)
|
||||
if (updatefreq)
|
||||
ad1848_updatefreq(ad1848);
|
||||
|
||||
if (ad1848->type >= AD1848_TYPE_CS4231) { /* TODO: configure CD volume for CS4248/AD1848 too */
|
||||
if ((ad1848->type == AD1848_TYPE_CS4231) || (ad1848->type == AD1848_TYPE_CS4236)) { /* TODO: configure CD volume for CS4248/AD1848 too */
|
||||
temp = (ad1848->type == AD1848_TYPE_CS4231) ? 18 : 4;
|
||||
if (ad1848->regs[temp] & 0x80)
|
||||
ad1848->cd_vol_l = 0;
|
||||
@@ -488,7 +474,7 @@ ad1848_init(ad1848_t *ad1848, uint8_t type)
|
||||
ad1848->regs[8] = 0;
|
||||
ad1848->regs[9] = 0x08;
|
||||
ad1848->regs[10] = ad1848->regs[11] = 0;
|
||||
if ((type == AD1848_TYPE_CS4248) || (type == AD1848_TYPE_CS4231) || (type >= AD1848_TYPE_CS4235))
|
||||
if ((type == AD1848_TYPE_CS4248) || (type == AD1848_TYPE_CS4231) || (type == AD1848_TYPE_CS4236))
|
||||
ad1848->regs[12] = 0x8a;
|
||||
else
|
||||
ad1848->regs[12] = 0xa;
|
||||
@@ -503,7 +489,7 @@ ad1848_init(ad1848_t *ad1848, uint8_t type)
|
||||
ad1848->regs[25] = CS4231;
|
||||
ad1848->regs[26] = 0x80;
|
||||
ad1848->regs[29] = 0x80;
|
||||
} else if (type >= AD1848_TYPE_CS4235) {
|
||||
} else if (type == AD1848_TYPE_CS4236) {
|
||||
ad1848->regs[16] = ad1848->regs[17] = 0;
|
||||
ad1848->regs[18] = ad1848->regs[19] = 0;
|
||||
ad1848->regs[20] = ad1848->regs[21] = 0;
|
||||
|
@@ -12,7 +12,7 @@
|
||||
*
|
||||
* Authors: RichardG, <richardg867@gmail.com>
|
||||
*
|
||||
* Copyright 2021-2022 RichardG.
|
||||
* Copyright 2021 RichardG.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
@@ -37,10 +37,7 @@
|
||||
#include <86box/nvr.h>
|
||||
|
||||
|
||||
#define CRYSTAL_NOEEPROM 0x100
|
||||
|
||||
enum {
|
||||
CRYSTAL_CS4235 = 0xdd,
|
||||
CRYSTAL_CS4236B = 0xcb,
|
||||
CRYSTAL_CS4237B = 0xc8,
|
||||
CRYSTAL_CS4238B = 0xc9
|
||||
@@ -72,7 +69,7 @@ static const uint8_t cs4236b_eeprom[] = {
|
||||
0x10, 0x03, /* DMA routing */
|
||||
|
||||
/* PnP resources */
|
||||
0x0e, 0x63, 0x42, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, /* CSC4236, dummy checksum (filled in by isapnp_add_card) */
|
||||
0x0e, 0x63, 0x42, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, /* CSC4236, dummy checksum (filled in by isapnp_add_card) */
|
||||
0x0a, 0x10, 0x01, /* PnP version 1.0, vendor version 0.1 */
|
||||
0x82, 0x0e, 0x00, 'C', 'r', 'y', 's', 't', 'a', 'l', ' ', 'C', 'o', 'd', 'e' ,'c', 0x00, /* ANSI identifier */
|
||||
|
||||
@@ -315,8 +312,7 @@ cs423x_write(uint16_t addr, uint8_t val, void *priv)
|
||||
break;
|
||||
|
||||
case 6: /* RAM Access End */
|
||||
/* TriGem Delhi-III BIOS writes undocumented value 0x40 instead of 0x00. */
|
||||
if ((val == 0x00) || (val == 0x40)) {
|
||||
if (!val) {
|
||||
dev->ram_dl = 0;
|
||||
|
||||
/* Update PnP state and resource data. */
|
||||
@@ -360,20 +356,6 @@ cs423x_slam_write(uint16_t addr, uint8_t val, void *priv)
|
||||
break;
|
||||
|
||||
case CRYSTAL_SLAM_INDEX:
|
||||
/* Intercept the Activate Audio Device command. */
|
||||
if (val == 0x79) {
|
||||
/* Apply the last logical device's configuration. */
|
||||
if (dev->slam_config) {
|
||||
cs423x_pnp_config_changed(dev->slam_ld, dev->slam_config, dev);
|
||||
free(dev->slam_config);
|
||||
dev->slam_config = NULL;
|
||||
}
|
||||
|
||||
/* Exit out of SLAM. */
|
||||
dev->slam_state = CRYSTAL_SLAM_NONE;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Write register index. */
|
||||
dev->slam_reg = val;
|
||||
dev->slam_state = CRYSTAL_SLAM_BYTE1;
|
||||
@@ -447,6 +429,18 @@ cs423x_slam_write(uint16_t addr, uint8_t val, void *priv)
|
||||
/* Activate or deactivate the device. */
|
||||
dev->slam_config->activate = val & 0x01;
|
||||
break;
|
||||
|
||||
case 0x79: /* activate chip */
|
||||
/* Apply the last logical device's configuration. */
|
||||
if (dev->slam_config) {
|
||||
cs423x_pnp_config_changed(dev->slam_ld, dev->slam_config, dev);
|
||||
free(dev->slam_config);
|
||||
dev->slam_config = NULL;
|
||||
}
|
||||
|
||||
/* Exit out of SLAM. */
|
||||
dev->slam_state = CRYSTAL_SLAM_NONE;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Prepare for the next register, unless a two-byte read returns above. */
|
||||
@@ -568,12 +562,10 @@ cs423x_pnp_enable(cs423x_t *dev, uint8_t update_rom, uint8_t update_hwconfig)
|
||||
}
|
||||
|
||||
/* Update SPS. */
|
||||
if (dev->type != CRYSTAL_CS4235) {
|
||||
if (dev->ram_data[0x4003] & 0x04)
|
||||
dev->indirect_regs[8] |= 0x04;
|
||||
else
|
||||
dev->indirect_regs[8] &= ~0x04;
|
||||
}
|
||||
if (dev->ram_data[0x4003] & 0x04)
|
||||
dev->indirect_regs[8] |= 0x04;
|
||||
else
|
||||
dev->indirect_regs[8] &= ~0x04;
|
||||
|
||||
/* Update IFM. */
|
||||
if (dev->ram_data[0x4003] & 0x80)
|
||||
@@ -718,7 +710,7 @@ cs423x_reset(void *priv)
|
||||
/* Reset PnP resource data, state and logical devices. */
|
||||
dev->pnp_enable = 1;
|
||||
cs423x_pnp_enable(dev, 1, 1);
|
||||
if (dev->pnp_card && dev->sb)
|
||||
if (dev->pnp_card)
|
||||
isapnp_reset_card(dev->pnp_card);
|
||||
|
||||
/* Reset SLAM. */
|
||||
@@ -733,9 +725,8 @@ cs423x_init(const device_t *info)
|
||||
memset(dev, 0, sizeof(cs423x_t));
|
||||
|
||||
/* Initialize model-specific data. */
|
||||
dev->type = info->local & 0xff;
|
||||
dev->type = info->local;
|
||||
switch (dev->type) {
|
||||
case CRYSTAL_CS4235:
|
||||
case CRYSTAL_CS4236B:
|
||||
case CRYSTAL_CS4237B:
|
||||
case CRYSTAL_CS4238B:
|
||||
@@ -746,45 +737,36 @@ cs423x_init(const device_t *info)
|
||||
/* Different Chip Version and ID registers, which shouldn't be reset by ad1848_init */
|
||||
dev->ad1848.xregs[25] = dev->type;
|
||||
|
||||
if (!(info->local & CRYSTAL_NOEEPROM)) {
|
||||
/* Load EEPROM contents from template. */
|
||||
memcpy(dev->eeprom_data, cs4236b_eeprom, sizeof(cs4236b_eeprom));
|
||||
/* Load EEPROM contents from template. */
|
||||
memcpy(dev->eeprom_data, cs4236b_eeprom, sizeof(cs4236b_eeprom));
|
||||
|
||||
/* Set content size. */
|
||||
dev->eeprom_data[2] = sizeof(cs4236b_eeprom) >> 8;
|
||||
dev->eeprom_data[3] = sizeof(cs4236b_eeprom) & 0xff;
|
||||
/* Set content size. */
|
||||
dev->eeprom_data[2] = sizeof(cs4236b_eeprom) >> 8;
|
||||
dev->eeprom_data[3] = sizeof(cs4236b_eeprom) & 0xff;
|
||||
|
||||
/* Set PnP card ID and EEPROM file name. */
|
||||
switch (dev->type) {
|
||||
case CRYSTAL_CS4235:
|
||||
dev->eeprom_data[8] = 0x05;
|
||||
dev->eeprom_data[16] = 0x08;
|
||||
dev->eeprom_data[26] = 0x25;
|
||||
dev->nvr_path = "cs4235.nvr";
|
||||
break;
|
||||
/* Set PnP card ID and EEPROM file name. */
|
||||
switch (dev->type) {
|
||||
case CRYSTAL_CS4236B:
|
||||
dev->nvr_path = "cs4236b.nvr";
|
||||
break;
|
||||
|
||||
case CRYSTAL_CS4236B:
|
||||
dev->nvr_path = "cs4236b.nvr";
|
||||
break;
|
||||
case CRYSTAL_CS4237B:
|
||||
dev->eeprom_data[26] = 0x37;
|
||||
dev->nvr_path = "cs4237b.nvr";
|
||||
break;
|
||||
|
||||
case CRYSTAL_CS4237B:
|
||||
dev->eeprom_data[26] = 0x37;
|
||||
dev->nvr_path = "cs4237b.nvr";
|
||||
break;
|
||||
|
||||
case CRYSTAL_CS4238B:
|
||||
dev->eeprom_data[26] = 0x38;
|
||||
dev->nvr_path = "cs4238b.nvr";
|
||||
break;
|
||||
}
|
||||
|
||||
/* Load EEPROM contents from file if present. */
|
||||
cs423x_nvram(dev, 0);
|
||||
case CRYSTAL_CS4238B:
|
||||
dev->eeprom_data[26] = 0x38;
|
||||
dev->nvr_path = "cs4238b.nvr";
|
||||
break;
|
||||
}
|
||||
|
||||
/* Load EEPROM contents from file if present. */
|
||||
cs423x_nvram(dev, 0);
|
||||
|
||||
/* Initialize game port. The '7B and '8B game port only responds to 6 I/O ports; the remaining
|
||||
2 ports are reserved on those chips, and probably connected to the Digital Assist feature. */
|
||||
dev->gameport = gameport_add(((dev->type == CRYSTAL_CS4235) || (dev->type == CRYSTAL_CS4236B)) ? &gameport_pnp_device : &gameport_pnp_6io_device);
|
||||
dev->gameport = gameport_add((dev->type == CRYSTAL_CS4236B) ? &gameport_pnp_device : &gameport_pnp_6io_device);
|
||||
|
||||
break;
|
||||
}
|
||||
@@ -800,18 +782,13 @@ cs423x_init(const device_t *info)
|
||||
dev->pnp_card = isapnp_add_card(NULL, 0, cs423x_pnp_config_changed, NULL, NULL, NULL, dev);
|
||||
|
||||
/* Initialize SBPro codec. The WSS codec is initialized later by cs423x_reset */
|
||||
dev->sb = device_add_inst(&sb_pro_compat_device, 1);
|
||||
dev->sb = device_add(&sb_pro_compat_device);
|
||||
sound_set_cd_audio_filter(sbpro_filter_cd_audio, dev->sb); /* CD audio filter for the default context */
|
||||
|
||||
/* Initialize RAM, registers and WSS codec. */
|
||||
cs423x_reset(dev);
|
||||
sound_add_handler(cs423x_get_buffer, dev);
|
||||
|
||||
/* Add Control/RAM backdoor handlers for CS4235. */
|
||||
dev->ad1848.cram_priv = dev;
|
||||
dev->ad1848.cram_read = cs423x_read;
|
||||
dev->ad1848.cram_write = cs423x_write;
|
||||
|
||||
return dev;
|
||||
}
|
||||
|
||||
@@ -842,32 +819,6 @@ cs423x_speed_changed(void *priv)
|
||||
}
|
||||
|
||||
|
||||
const device_t cs4235_device =
|
||||
{
|
||||
"Crystal CS4235",
|
||||
"cs4235",
|
||||
DEVICE_ISA | DEVICE_AT,
|
||||
CRYSTAL_CS4235,
|
||||
cs423x_init, cs423x_close, cs423x_reset,
|
||||
{ NULL },
|
||||
cs423x_speed_changed,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
const device_t cs4235_onboard_device =
|
||||
{
|
||||
"Crystal CS4235 (On-Board)",
|
||||
"cs4235_onboard",
|
||||
DEVICE_ISA | DEVICE_AT,
|
||||
CRYSTAL_CS4235 | CRYSTAL_NOEEPROM,
|
||||
cs423x_init, cs423x_close, cs423x_reset,
|
||||
{ NULL },
|
||||
cs423x_speed_changed,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
const device_t cs4236b_device =
|
||||
{
|
||||
"Crystal CS4236B",
|
||||
|
@@ -106,7 +106,6 @@ static const SOUND_CARD sound_cards[] =
|
||||
{ &adgold_device },
|
||||
{ &azt2316a_device },
|
||||
{ &azt1605_device },
|
||||
{ &cs4235_device },
|
||||
{ &cs4236b_device },
|
||||
{ &sb_1_device },
|
||||
{ &sb_15_device },
|
||||
|
Reference in New Issue
Block a user