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sonarlint vid_tvp3026_ramdac.c

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This commit is contained in:
Jasmine Iwanek
2023-07-31 17:30:58 -04:00
parent 90cea6125d
commit 0cc00a6b0f
1 changed files with 79 additions and 22 deletions
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101
src/video/vid_tvp3026_ramdac.c
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@@ -27,15 +27,17 @@
#include <86box/timer.h> #include <86box/timer.h>
#include <86box/video.h> #include <86box/video.h>
#include <86box/vid_svga.h> #include <86box/vid_svga.h>
#include <86box/plat_fallthrough.h>
typedef struct typedef struct tvp3026_ramdac_t {
{
PALETTE extpal; PALETTE extpal;
uint32_t extpallook[256]; uint32_t extpallook[256];
uint8_t cursor64_data[1024]; uint8_t cursor64_data[1024];
int hwc_y, hwc_x; int hwc_y;
int hwc_x;
uint8_t ind_idx; uint8_t ind_idx;
uint8_t dcc, dc_init; uint8_t dcc;
uint8_t dc_init;
uint8_t ccr; uint8_t ccr;
uint8_t true_color; uint8_t true_color;
uint8_t latch_cntl; uint8_t latch_cntl;
@@ -48,9 +50,10 @@ typedef struct
uint8_t mode; uint8_t mode;
uint8_t pll_addr; uint8_t pll_addr;
uint8_t clock_sel; uint8_t clock_sel;
struct struct {
{ uint8_t m;
uint8_t m, n, p; uint8_t n;
uint8_t p;
} pix, mem, loop; } pix, mem, loop;
} tvp3026_ramdac_t; } tvp3026_ramdac_t;
@@ -83,15 +86,18 @@ tvp3026_set_bpp(tvp3026_ramdac_t *ramdac, svga_t *svga)
case 0x0f: case 0x0f:
svga->bpp = 24; svga->bpp = 24;
break; break;
default:
break;
} }
} }
svga_recalctimings(svga); svga_recalctimings(svga);
} }
void void
tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t *svga) tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_t *svga)
{ {
tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) p; tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) priv;
uint32_t o32; uint32_t o32;
uint8_t *cd; uint8_t *cd;
uint16_t index; uint16_t index;
@@ -103,6 +109,9 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t
switch (rs) { switch (rs) {
case 0x00: /* Palette Write Index Register (RS value = 0000) */ case 0x00: /* Palette Write Index Register (RS value = 0000) */
ramdac->ind_idx = val; ramdac->ind_idx = val;
#ifdef FALLTHROUGH_ANNOTATION;
[[fallthrough]];
#endif
case 0x04: /* Ext Palette Write Index Register (RS value = 0100) */ case 0x04: /* Ext Palette Write Index Register (RS value = 0100) */
case 0x03: case 0x03:
case 0x07: /* Ext Palette Read Index Register (RS value = 0111) */ case 0x07: /* Ext Palette Read Index Register (RS value = 0111) */
@@ -147,6 +156,9 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t
svga->dac_addr = (svga->dac_addr + 1) & 0xff; svga->dac_addr = (svga->dac_addr + 1) & 0xff;
svga->dac_pos = 0; svga->dac_pos = 0;
break; break;
default:
break;
} }
break; break;
case 0x09: /* Direct Cursor Control (RS value = 1001) */ case 0x09: /* Direct Cursor Control (RS value = 1001) */
@@ -215,6 +227,9 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t
case 2: case 2:
ramdac->pix.p = val; ramdac->pix.p = val;
break; break;
default:
break;
} }
ramdac->pll_addr = ((ramdac->pll_addr + 1) & 3) | (ramdac->pll_addr & 0xfc); ramdac->pll_addr = ((ramdac->pll_addr + 1) & 3) | (ramdac->pll_addr & 0xfc);
break; break;
@@ -229,6 +244,9 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t
case 2: case 2:
ramdac->mem.p = val; ramdac->mem.p = val;
break; break;
default:
break;
} }
ramdac->pll_addr = ((ramdac->pll_addr + 4) & 0x0c) | (ramdac->pll_addr & 0xf3); ramdac->pll_addr = ((ramdac->pll_addr + 4) & 0x0c) | (ramdac->pll_addr & 0xf3);
break; break;
@@ -243,12 +261,18 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t
case 2: case 2:
ramdac->loop.p = val; ramdac->loop.p = val;
break; break;
default:
break;
} }
ramdac->pll_addr = ((ramdac->pll_addr + 0x10) & 0x30) | (ramdac->pll_addr & 0xcf); ramdac->pll_addr = ((ramdac->pll_addr + 0x10) & 0x30) | (ramdac->pll_addr & 0xcf);
break; break;
case 0x39: /* MCLK/Loop Clock Control */ case 0x39: /* MCLK/Loop Clock Control */
ramdac->mclk = val; ramdac->mclk = val;
break; break;
default:
break;
} }
break; break;
case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */ case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */
@@ -273,17 +297,20 @@ tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t
ramdac->hwc_y = (ramdac->hwc_y & 0x00ff) | ((val & 0x0f) << 8); ramdac->hwc_y = (ramdac->hwc_y & 0x00ff) | ((val & 0x0f) << 8);
svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize; svga->dac_hwcursor.y = ramdac->hwc_y - svga->dac_hwcursor.cur_ysize;
break; break;
default:
break;
} }
return; return;
} }
uint8_t uint8_t
tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga) tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *priv, svga_t *svga)
{ {
tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) p; tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) priv;
uint8_t temp = 0xff; uint8_t temp = 0xff;
uint8_t *cd; const uint8_t *cd;
uint16_t index; uint16_t index;
uint8_t rs = (addr & 0x03); uint8_t rs = (addr & 0x03);
uint16_t da_mask = 0x03ff; uint16_t da_mask = 0x03ff;
@@ -327,6 +354,9 @@ tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga)
else else
temp = ramdac->extpal[index].b & 0x3f; temp = ramdac->extpal[index].b & 0x3f;
break; break;
default:
break;
} }
break; break;
case 0x09: /* Direct Cursor Control (RS value = 1001) */ case 0x09: /* Direct Cursor Control (RS value = 1001) */
@@ -378,6 +408,9 @@ tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga)
case 3: case 3:
temp = 0x40; /*PLL locked to frequency*/ temp = 0x40; /*PLL locked to frequency*/
break; break;
default:
break;
} }
break; break;
case 0x2e: /* Memory Clock PLL Data */ case 0x2e: /* Memory Clock PLL Data */
@@ -394,6 +427,9 @@ tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga)
case 3: case 3:
temp = 0x40; /*PLL locked to frequency*/ temp = 0x40; /*PLL locked to frequency*/
break; break;
default:
break;
} }
break; break;
case 0x2f: /* Loop Clock PLL Data */ case 0x2f: /* Loop Clock PLL Data */
@@ -407,6 +443,9 @@ tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga)
case 2: case 2:
temp = ramdac->loop.p; temp = ramdac->loop.p;
break; break;
default:
break;
} }
break; break;
case 0x39: /* MCLK/Loop Clock Control */ case 0x39: /* MCLK/Loop Clock Control */
@@ -415,6 +454,9 @@ tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga)
case 0x3f: /* ID */ case 0x3f: /* ID */
temp = 0x26; temp = 0x26;
break; break;
default:
break;
} }
break; break;
case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */ case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */
@@ -436,15 +478,18 @@ tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga)
case 0x0f: /* Cursor Y High Register (RS value = 1111) */ case 0x0f: /* Cursor Y High Register (RS value = 1111) */
temp = (ramdac->hwc_y >> 8) & 0xff; temp = (ramdac->hwc_y >> 8) & 0xff;
break; break;
default:
break;
} }
return temp; return temp;
} }
void void
tvp3026_recalctimings(void *p, svga_t *svga) tvp3026_recalctimings(void *priv, svga_t *svga)
{ {
tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) p; const tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) priv;
svga->interlace = (ramdac->ccr & 0x40); svga->interlace = (ramdac->ccr & 0x40);
} }
@@ -466,7 +511,7 @@ tvp3026_hwcursor_draw(svga_t *svga, int displine)
uint32_t clr2; uint32_t clr2;
uint32_t clr3; uint32_t clr3;
uint32_t *p; uint32_t *p;
uint8_t *cd; const uint8_t *cd;
tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) svga->ramdac; tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) svga->ramdac;
clr1 = ramdac->extpallook[1]; clr1 = ramdac->extpallook[1];
@@ -513,6 +558,9 @@ tvp3026_hwcursor_draw(svga_t *svga, int displine)
case 3: case 3:
p[x_pos] = clr3; p[x_pos] = clr3;
break; break;
default:
break;
} }
break; break;
case 2: /* XGA */ case 2: /* XGA */
@@ -526,6 +574,9 @@ tvp3026_hwcursor_draw(svga_t *svga, int displine)
case 3: case 3:
p[x_pos] ^= 0xffffff; p[x_pos] ^= 0xffffff;
break; break;
default:
break;
} }
break; break;
case 3: /* X-Windows */ case 3: /* X-Windows */
@@ -536,8 +587,14 @@ tvp3026_hwcursor_draw(svga_t *svga, int displine)
case 3: case 3:
p[x_pos] = clr2; p[x_pos] = clr2;
break; break;
default:
break;
} }
break; break;
default:
break;
} }
} }
offset++; offset++;
@@ -552,12 +609,12 @@ tvp3026_hwcursor_draw(svga_t *svga, int displine)
float float
tvp3026_getclock(int clock, void *priv) tvp3026_getclock(int clock, void *priv)
{ {
tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) priv; const tvp3026_ramdac_t *ramdac = (tvp3026_ramdac_t *) priv;
int n; int n;
int m; int m;
int pl; int pl;
float f_vco; float f_vco;
float f_pll; float f_pll;
if (clock == 0) if (clock == 0)
return 25175000.0; return 25175000.0;
@@ -569,7 +626,7 @@ tvp3026_getclock(int clock, void *priv)
n = ramdac->pix.n & 0x3f; n = ramdac->pix.n & 0x3f;
m = ramdac->pix.m & 0x3f; m = ramdac->pix.m & 0x3f;
pl = ramdac->pix.p & 0x03; pl = ramdac->pix.p & 0x03;
f_vco = 8.0 * 14318184 * (float) (65 - m) / (float) (65 - n); f_vco = 8.0f * 14318184 * (float) (65 - m) / (float) (65 - n);
f_pll = f_vco / (float) (1 << pl); f_pll = f_vco / (float) (1 << pl);
return f_pll; return f_pll;