80486DX2-66/86Box-fork
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WARNING: CONFIGS MIGHT PARTIALLY BREAK WHERE DEVICE NAMES HAVE CHANGED.

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Changes to device_t struct to accomodate the upcoming PCI IRQ arbitration rewrite;
Added device.c/h API to obtain name from the device_t struct;
Significant changes to win/win_settings.c to clean up the code a bit and fix bugs;
Ported all the CPU and AudioPCI commits from PCem;
Added an API call to allow ACPI soft power off to gracefully stop the emulator;
Removed the Siemens PCD-2L from the Dev branch because it now works;
Removed the Socket 5 HP Vectra from the Dev branch because it now works;
Fixed the Compaq Presario and the Micronics Spitfire;
Give the IBM PC330 its own list of 486 CPU so it can have DX2's with CPUID 0x470;
SMM fixes;
Rewrote the SYSENTER, SYSEXIT, SYSCALL, and SYSRET instructions;
Changed IDE reset period to match the specification, fixes #929;
The keyboard input and output ports are now forced in front of the queue when read, fixes a number of bugs, including the AMI Apollo hanging on soft reset;
Added the Intel AN430TX but Dev branched because it does not work;
The network code no longer drops packets if the emulated network card has failed to receive them (eg. when the buffer is full);
Changes to PCI card adding and renamed some PCI slot types, also added proper AGP bridge slot types;
USB UHCI emulation is no longer a stub (still doesn't fully work, but at least Windows XP chk with Debug no longer ASSERT's on it);
Fixed NVR on the the SMC FDC37C932QF and APM variants;
A number of fixes to Intel 4x0 chipsets, including fixing every register of the 440LX and 440EX;
Some ACPI changes.
This commit is contained in:
OBattler
2020-11-16 00:01:21 +01:00
parent 745460f64b
commit 0faf6692c9
260 changed files with 5122 additions and 4471 deletions
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61
src/sio/sio_fdc37c66x.c
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@@ -37,8 +37,7 @@
typedef struct {
uint8_t chip_id,
lock[2],
uint8_t chip_id, tries,
regs[16];
int cur_reg,
com3_addr, com4_addr;
@@ -47,19 +46,6 @@ typedef struct {
} fdc37c66x_t;
static void
write_lock(fdc37c66x_t *dev, uint8_t val)
{
if (val == 0x55 && dev->lock[1] == 0x55)
fdc_3f1_enable(dev->fdc, 0);
if ((dev->lock[0] == 0x55) && (dev->lock[1] == 0x55) && (val != 0x55))
fdc_3f1_enable(dev->fdc, 1);
dev->lock[0] = dev->lock[1];
dev->lock[1] = val;
}
static void
set_com34_addr(fdc37c66x_t *dev)
{
@@ -88,7 +74,12 @@ static void
set_serial_addr(fdc37c66x_t *dev, int port)
{
uint8_t shift = (port << 4);
double clock_src = 24000000.0 / 13.0;
if (dev->regs[4] & (1 << (4 + port)))
clock_src = 24000000.0 / 12.0;
serial_remove(dev->uart[port]);
if (dev->regs[2] & (4 << shift)) {
switch (dev->regs[2] & (3 << shift)) {
case 0:
@@ -105,6 +96,8 @@ set_serial_addr(fdc37c66x_t *dev, int port)
break;
}
}
serial_set_clock_src(dev->uart[port], clock_src);
}
@@ -144,10 +137,10 @@ fdc37c66x_write(uint16_t port, uint8_t val, void *priv)
fdc37c66x_t *dev = (fdc37c66x_t *) priv;
uint8_t valxor = 0;
if ((dev->lock[0] == 0x55) && (dev->lock[1] == 0x55)) {
if (dev->tries == 2) {
if (port == 0x3f0) {
if (val == 0xaa)
write_lock(dev, val);
dev->tries = 0;
else
dev->cur_reg = val;
} else {
@@ -166,27 +159,27 @@ fdc37c66x_write(uint16_t port, uint8_t val, void *priv)
if (valxor & 3)
lpt1_handler(dev);
if (valxor & 0x60) {
serial_remove(dev->uart[0]);
serial_remove(dev->uart[1]);
set_com34_addr(dev);
set_serial_addr(dev, 0);
set_serial_addr(dev, 1);
}
break;
case 2:
if (valxor & 7) {
serial_remove(dev->uart[0]);
if (valxor & 7)
set_serial_addr(dev, 0);
}
if (valxor & 0x70) {
serial_remove(dev->uart[1]);
if (valxor & 0x70)
set_serial_addr(dev, 1);
}
break;
case 3:
if (valxor & 2)
fdc_update_enh_mode(dev->fdc, (dev->regs[3] & 2) ? 1 : 0);
break;
case 4:
if (valxor & 0x10)
set_serial_addr(dev, 0);
if (valxor & 0x20)
set_serial_addr(dev, 1);
break;
case 5:
if (valxor & 0x01)
fdc_handler(dev);
@@ -197,10 +190,8 @@ fdc37c66x_write(uint16_t port, uint8_t val, void *priv)
break;
}
}
} else {
if (port == 0x3f0)
write_lock(dev, val);
}
} else if ((port == 0x3f0) && (val == 0x55))
dev->tries++;
}
@@ -208,9 +199,9 @@ static uint8_t
fdc37c66x_read(uint16_t port, void *priv)
{
fdc37c66x_t *dev = (fdc37c66x_t *) priv;
uint8_t ret = 0xff;
uint8_t ret = 0x00;
if ((dev->lock[0] == 0x55) && (dev->lock[1] == 0x55)) {
if (dev->tries == 2) {
if (port == 0x3f1)
ret = dev->regs[dev->cur_reg];
}
@@ -236,7 +227,7 @@ fdc37c66x_reset(fdc37c66x_t *dev)
fdc_reset(dev->fdc);
memset(dev->lock, 0, 2);
dev->tries = 0;
memset(dev->regs, 0, 16);
dev->regs[0x0] = 0x3a;
@@ -287,7 +278,7 @@ const device_t fdc37c663_device = {
0,
0x63,
fdc37c66x_init, fdc37c66x_close, NULL,
NULL, NULL, NULL,
{ NULL }, NULL, NULL,
NULL
};
@@ -296,7 +287,7 @@ const device_t fdc37c665_device = {
0,
0x65,
fdc37c66x_init, fdc37c66x_close, NULL,
NULL, NULL, NULL,
{ NULL }, NULL, NULL,
NULL
};
@@ -305,6 +296,6 @@ const device_t fdc37c666_device = {
0,
0x66,
fdc37c66x_init, fdc37c66x_close, NULL,
NULL, NULL, NULL,
{ NULL }, NULL, NULL,
NULL
};