From 112b60eb88e1f5819fdd84509fa1086e8553ccfc Mon Sep 17 00:00:00 2001 From: rueni97 <99608219+luennix@users.noreply.github.com> Date: Sun, 8 Jan 2023 19:04:40 +0300 Subject: [PATCH] Update ali1429.c --- src/chipset/ali1429.c | 300 +++++++++++++++++++++--------------------- 1 file changed, 152 insertions(+), 148 deletions(-) diff --git a/src/chipset/ali1429.c b/src/chipset/ali1429.c index 36ac2fdf9..500b1c6a0 100644 --- a/src/chipset/ali1429.c +++ b/src/chipset/ali1429.c @@ -1,23 +1,21 @@ /* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. * - * This file is part of the 86Box distribution. + * This file is part of the 86Box distribution. * - * Implementation of the ALi M1429 chipset. + * Implementation of the ALi M1429 chipset. * - * Note: This chipset has no datasheet, everything were done via - * reverse engineering the BIOS of various machines using it. + * Note: This chipset has no datasheet, everything were done via + * reverse engineering the BIOS of various machines using it. * + * Authors: Tiseno100, + * Miran Grca, * - * - * Authors: Tiseno100, - * Miran Grca, - * - * Copyright 2020-2021 Tiseno100. - * Copyright 2021-2021 Miran Grca. + * Copyright 2020,2021 Tiseno100. + * Copyright 2021,2021 Miran Grca. */ /* @@ -66,14 +64,15 @@ Register 20h: Bits 2-1-0: Bus Clock Speed 0 0 0: 7.1519Mhz (ATCLK2) - 0 0 1: CLK2IN/4 - 0 1 0: CLK2IN/5 - 0 1 1: CLK2IN/6 - 1 0 0: CLK2IN/8 - 1 0 1: CLK2IN/10 - 1 1 0: CLK2IN/12 + 0 0 1: CLK2IN/4 + 0 1 0: CLK2IN/5 + 0 1 1: CLK2IN/6 + 1 0 0: CLK2IN/8 + 1 0 1: CLK2IN/10 + 1 1 0: CLK2IN/12 */ + #include #include #include @@ -95,11 +94,13 @@ #include <86box/smram.h> #include <86box/chipset.h> -#define GREEN dev->is_g /* Is G Variant */ +#define GREEN dev->is_g /* Is G Variant */ + #ifdef ENABLE_ALI1429_LOG int ali1429_do_log = ENABLE_ALI1429_LOG; + static void ali1429_log(const char *fmt, ...) { @@ -112,25 +113,27 @@ ali1429_log(const char *fmt, ...) } } #else -# define ali1429_log(fmt, ...) +#define ali1429_log(fmt, ...) #endif + typedef struct { - uint8_t is_g, index, cfg_locked, reg_57h, - regs[90]; + uint8_t is_g, index, cfg_locked, reg_57h, + regs[90]; } ali1429_t; + static void ali1429_shadow_recalc(ali1429_t *dev) { uint32_t base, i, can_write, can_read; - shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01); + shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01); shadowbios_write = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x02); can_write = (dev->regs[0x14] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; for (i = 0; i < 8; i++) { base = 0xc0000 + (i << 15); @@ -144,149 +147,149 @@ ali1429_shadow_recalc(ali1429_t *dev) flushmmucache_nopc(); } + static void ali1429_write(uint16_t addr, uint8_t val, void *priv) { - ali1429_t *dev = (ali1429_t *) priv; + ali1429_t *dev = (ali1429_t *)priv; switch (addr) { - case 0x22: - dev->index = val; - break; + case 0x22: + dev->index = val; + break; - case 0x23: + case 0x23: #ifdef ENABLE_ALI1429_LOG - if (dev->index != 0x03) - ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val); + if (dev->index != 0x03) + ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val); #endif - if (dev->index == 0x03) - dev->cfg_locked = !(val == 0xc5); + if (dev->index == 0x03) + dev->cfg_locked = (val != 0xc5); - if (!dev->cfg_locked) { - /* Common M1429 Registers */ - switch (dev->index) { - case 0x10: - case 0x11: - dev->regs[dev->index] = val; - break; + if (!dev->cfg_locked) { + pclog("M1429: dev->regs[%02x] = %02x\n", dev->index, val); - case 0x12: - dev->regs[dev->index] = val; - if (val & 4) - mem_remap_top(128); - else - mem_remap_top(0); - break; + /* Common M1429 Registers */ + switch (dev->index) { + case 0x10: case 0x11: + dev->regs[dev->index] = val; + break; - case 0x13: - case 0x14: - dev->regs[dev->index] = val; - ali1429_shadow_recalc(dev); - break; + case 0x12: + dev->regs[dev->index] = val; + if(val & 4) + mem_remap_top(128); + else + mem_remap_top(0); + break; - case 0x15: - case 0x16: - case 0x17: - dev->regs[dev->index] = val; - break; + case 0x13: case 0x14: + dev->regs[dev->index] = val; + ali1429_shadow_recalc(dev); + break; - case 0x18: - dev->regs[dev->index] = (val & 0x8f) | 0x20; - cpu_cache_ext_enabled = !!(val & 2); - cpu_update_waitstates(); - break; + case 0x15: case 0x16: + case 0x17: + dev->regs[dev->index] = val; + break; - case 0x19: - case 0x1a: - case 0x1e: - dev->regs[dev->index] = val; - break; + case 0x18: + dev->regs[dev->index] = (val & 0x8f) | 0x20; + cpu_cache_ext_enabled = !!(val & 2); + cpu_update_waitstates(); + break; - case 0x20: - dev->regs[dev->index] = val; + case 0x19: case 0x1a: + case 0x1e: + dev->regs[dev->index] = val; + break; - switch (val & 7) { - case 0: - case 7: /* Illegal */ - cpu_set_isa_speed(7159091); - break; + case 0x20: + dev->regs[dev->index] = val; - case 1: - cpu_set_isa_speed(cpu_busspeed / 4); - break; + switch(val & 7) { + case 0: case 7: /* Illegal */ + cpu_set_isa_speed(7159091); + break; - case 2: - cpu_set_isa_speed(cpu_busspeed / 5); - break; + case 1: + cpu_set_isa_speed(cpu_busspeed / 4); + break; - case 3: - cpu_set_isa_speed(cpu_busspeed / 6); - break; + case 2: + cpu_set_isa_speed(cpu_busspeed / 5); + break; - case 4: - cpu_set_isa_speed(cpu_busspeed / 8); - break; + case 3: + cpu_set_isa_speed(cpu_busspeed / 6); + break; - case 5: - cpu_set_isa_speed(cpu_busspeed / 10); - break; + case 4: + cpu_set_isa_speed(cpu_busspeed / 8); + break; - case 6: - cpu_set_isa_speed(cpu_busspeed / 12); - break; - } - break; + case 5: + cpu_set_isa_speed(cpu_busspeed / 10); + break; - case 0x21 ... 0x27: - dev->regs[dev->index] = val; - break; - } + case 6: + cpu_set_isa_speed(cpu_busspeed / 12); + break; + } + break; - /* M1429G Only Registers */ - if (GREEN) { - switch (dev->index) { - case 0x30 ... 0x41: - case 0x43: - case 0x45: - case 0x4a: - dev->regs[dev->index] = val; - break; + case 0x21 ... 0x27: + dev->regs[dev->index] = val; + break; + } - case 0x57: - dev->reg_57h = val; - break; - } - } - } - break; + /* M1429G Only Registers */ + if (GREEN) { + switch (dev->index) { + case 0x30 ... 0x41: + case 0x43: case 0x45: + case 0x4a: + dev->regs[dev->index] = val; + break; + + case 0x57: + dev->reg_57h = val; + break; + } + } + } + break; } } + static uint8_t ali1429_read(uint16_t addr, void *priv) { - ali1429_t *dev = (ali1429_t *) priv; - uint8_t ret = 0xff; + ali1429_t *dev = (ali1429_t *)priv; + uint8_t ret = 0xff; if ((addr == 0x23) && (dev->index >= 0x10) && (dev->index <= 0x4a)) - ret = dev->regs[dev->index]; + ret = dev->regs[dev->index]; else if ((addr == 0x23) && (dev->index == 0x57)) - ret = dev->reg_57h; + ret = dev->reg_57h; else if (addr == 0x22) - ret = dev->index; + ret = dev->index; return ret; } + static void ali1429_close(void *priv) { - ali1429_t *dev = (ali1429_t *) priv; + ali1429_t *dev = (ali1429_t *)priv; free(dev); } + static void ali1429_defaults(ali1429_t *dev) { @@ -305,27 +308,28 @@ ali1429_defaults(ali1429_t *dev) /* M1429G Default Registers */ if (GREEN) { - dev->regs[0x31] = 0x88; - dev->regs[0x32] = 0xc0; - dev->regs[0x38] = 0xe5; - dev->regs[0x40] = 0xe3; - dev->regs[0x41] = 2; - dev->regs[0x45] = 0x80; + dev->regs[0x31] = 0x88; + dev->regs[0x32] = 0xc0; + dev->regs[0x38] = 0xe5; + dev->regs[0x40] = 0xe3; + dev->regs[0x41] = 2; + dev->regs[0x45] = 0x80; } } + static void * ali1429_init(const device_t *info) { - ali1429_t *dev = (ali1429_t *) malloc(sizeof(ali1429_t)); + ali1429_t *dev = (ali1429_t *)malloc(sizeof(ali1429_t)); memset(dev, 0, sizeof(ali1429_t)); dev->cfg_locked = 1; - GREEN = info->local; + GREEN = info->local; /* M1429 Ports: - 22h Index Port - 23h Data Port + 22h Index Port + 23h Data Port */ io_sethandler(0x0022, 0x0002, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev); @@ -337,29 +341,29 @@ ali1429_init(const device_t *info) } const device_t ali1429_device = { - .name = "ALi M1429", + .name = "ALi M1429", .internal_name = "ali1429", - .flags = 0, - .local = 0, - .init = ali1429_init, - .close = ali1429_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = ali1429_init, + .close = ali1429_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ali1429g_device = { - .name = "ALi M1429G", + .name = "ALi M1429G", .internal_name = "ali1429g", - .flags = 0, - .local = 1, - .init = ali1429_init, - .close = ali1429_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = ali1429_init, + .close = ali1429_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL };