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Merge branch 'master' of https://github.com/86Box/86Box

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This commit is contained in:
RichardG867
2021-02-04 17:51:29 -03:00
parent 53ee61d93c 955b64367b
commit 114ab43422
14 changed files with 407 additions and 318 deletions
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43
.github/workflows/cmake.yml vendored
View File

@@ -5,17 +5,19 @@ on:
push:
paths:
- src/**
- "**/CMakeLists.txt"
- .github/workflows/**
- vcpkg.json
pull_request:
paths:
- src/**
- "**/CMakeLists.txt"
- .github/workflows/**
- vcpkg.json
env:
BUILD_TYPE: Release
BUILD_TYPE: RelWithDebInfo
jobs:
mingw:
@@ -56,30 +58,39 @@ jobs:
run: >-
cmake -S . -B build
-G "MSYS Makefiles"
-D CMAKE_BUILD_TYPE=$BUILD_TYPE
-D CMAKE_BUILD_TYPE=${{ env.BUILD_TYPE }}
-D DEV_BRANCH=${{ matrix.dev-build }}
-D NEW_DYNAREC=${{ matrix.new-dynarec }}
-D VNC=OFF
- name: Build
run: cmake --build build --config $BUILD_TYPE
run: cmake --build build
clang:
name: VS2019 ${{ matrix.toolset }} ${{ matrix.target-arch }} build (DEV_BUILD=${{ matrix.dev-build }}, NEW_DYNAREC=${{ matrix.new-dynarec }})
vs2019:
name: VS2019 ${{ matrix.build.name }} ${{ matrix.target-arch }} build (${{ matrix.toolset }})
runs-on: windows-latest
strategy:
fail-fast: false
matrix:
dev-build: ['ON', 'OFF']
new-dynarec: ['ON', 'OFF']
build:
- name: Regular
dev-build: off
new-dynarec: off
type: Debug
- name: Dev
dev-build: on
new-dynarec: on
type: Debug
target-arch: ['Win32', 'x64', 'ARM', 'ARM64']
toolset: ['clangcl', 'v141']
toolset: ['clangcl', 'v142']
exclude:
- target-arch: 'ARM'
new-dynarec: 'OFF'
build:
new-dynarec: off
- target-arch: 'ARM64'
new-dynarec: 'OFF'
build:
new-dynarec: off
- target-arch: 'ARM'
toolset: 'clangcl'
@@ -94,9 +105,13 @@ jobs:
cmake -S . -B build
-G "Visual Studio 16 2019" -A ${{ matrix.target-arch }} -T ${{ matrix.toolset }}
-D CMAKE_TOOLCHAIN_FILE=C:\vcpkg\scripts\buildsystems\vcpkg.cmake
-D CMAKE_BUILD_TYPE=$BUILD_TYPE
-D DEV_BRANCH=${{ matrix.dev-build }}
-D NEW_DYNAREC=${{ matrix.new-dynarec }}
-D CMAKE_INSTALL_PREFIX=${{ github.workspace }}/build/artifacts
-D DEV_BRANCH=${{ matrix.build.dev-build }}
-D NEW_DYNAREC=${{ matrix.build.new-dynarec }}
-D VNC=OFF
- name: Build
run: cmake --build build --config $BUILD_TYPE
run: cmake --build build --config ${{ matrix.build.type }} --target install
- uses: actions/upload-artifact@v2
with:
name: '86Box-VS2019-${{ matrix.build.name }}-${{ matrix.target-arch }}-${{ matrix.toolset }}-${{ github.sha }}'
path: build/artifacts/bin/**

7
CMakeLists.txt
View File

@@ -15,8 +15,11 @@
cmake_minimum_required(VERSION 3.16)
cmake_policy(SET CMP0091 NEW)
set(CMAKE_MSVC_RUNTIME_LIBRARY "MultiThreaded$<$<CONFIG:Debug>:Debug>")
project(86Box
VERSION 2.10
VERSION 3.0
DESCRIPTION "Emulator of x86-based systems"
HOMEPAGE_URL "https://86box.github.io/"
LANGUAGES C CXX)
@@ -25,6 +28,8 @@ list(APPEND CMAKE_MODULE_PATH "${CMAKE_CURRENT_SOURCE_DIR}/cmake")
include(TargetArch)
target_architecture(CMAKE_TARGET_ARCHITECTURES)
include(CPack)
include(CMakeDependentOption)
add_compile_definitions(CMAKE)

5
src/CMakeLists.txt
View File

@@ -94,6 +94,11 @@ else()
add_subdirectory(codegen)
endif()
install(TARGETS 86Box)
if(VCPKG_TOOLCHAIN)
x_vcpkg_install_local_dependencies(TARGETS 86Box DESTINATION "bin")
endif()
add_subdirectory(device)
add_subdirectory(disk)
add_subdirectory(floppy)

61
src/chipset/ali1429.c
View File

@@ -29,11 +29,13 @@
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/keyboard.h>
#include <86box/apm.h>
#include <86box/mem.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/port_92.h>
#include <86box/smram.h>
#include <86box/chipset.h>
#define disabled_shadow (MEM_READ_EXTANY | MEM_WRITE_EXTANY)
@@ -45,7 +47,8 @@ ali1429_log(const char *fmt, ...)
{
va_list ap;
if (ali1429_do_log) {
if (ali1429_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
@@ -55,11 +58,12 @@ ali1429_log(const char *fmt, ...)
#define ali1429_log(fmt, ...)
#endif
typedef struct
{
uint8_t index, cfg_locked,
regs[256];
smram_t *smram;
} ali1429_t;
static void ali1429_shadow_recalc(ali1429_t *dev)
@@ -81,7 +85,6 @@ if(dev->regs[0x13] & (1 << i))
mem_set_mem_state_both(base, 0x8000, can_read | can_write);
else
mem_set_mem_state_both(base, 0x8000, disabled_shadow);
}
flushmmucache();
@@ -92,18 +95,16 @@ ali1429_write(uint16_t addr, uint8_t val, void *priv)
{
ali1429_t *dev = (ali1429_t *)priv;
switch (addr) {
switch (addr)
{
case 0x22:
dev->index = val;
break;
case 0x23:
/* Don't log register unlock patterns */
if (dev->index != 0x03)
ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val);
/* Unlock/Lock Registers */
if (dev->index == 0x03)
dev->cfg_locked = !(val == 0xc5);
@@ -111,16 +112,16 @@ ali1429_write(uint16_t addr, uint8_t val, void *priv)
{
dev->regs[dev->index] = val;
switch(dev->index){
/* Shadow RAM */
switch (dev->index)
{
case 0x13:
case 0x14:
ali1429_shadow_recalc(dev);
break;
/* Cache */
case 0x18:
cpu_cache_ext_enabled = (val & 0x80);
cpu_cache_ext_enabled = !!(val & 2);
cpu_update_waitstates();
break;
}
}
@@ -129,25 +130,13 @@ ali1429_write(uint16_t addr, uint8_t val, void *priv)
}
}
static uint8_t
ali1429_read(uint16_t addr, void *priv)
{
uint8_t ret = 0xff;
ali1429_t *dev = (ali1429_t *)priv;
switch (addr) {
case 0x23:
/* Do not conflict with Cyrix configuration registers */
if(!(((dev->index >= 0xc0) || (dev->index == 0x20)) && cpu_iscyrix))
ret = dev->regs[dev->index];
break;
return (addr == 0x23) ? dev->regs[dev->index] : 0xff;
}
return ret;
}
static void
ali1429_close(void *priv)
{
@@ -156,7 +145,6 @@ ali1429_close(void *priv)
free(dev);
}
static void *
ali1429_init(const device_t *info)
{
@@ -168,26 +156,25 @@ ali1429_init(const device_t *info)
22h Index Port
23h Data Port
*/
io_sethandler(0x022, 0x0001, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev);
io_sethandler(0x023, 0x0001, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev);
io_sethandler(0x0022, 0x0002, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev);
dev->cfg_locked = 1;
device_add(&apm_device);
device_add(&port_92_device);
dev->regs[0x13] = 0x00;
dev->regs[0x14] = 0x00;
ali1429_shadow_recalc(dev);
/* dev->smram = smram_add(); */
return dev;
}
const device_t ali1429_device = {
"ALi M1429",
0,
0,
ali1429_init, ali1429_close, NULL,
{ NULL }, NULL, NULL,
NULL
};
ali1429_init,
ali1429_close,
NULL,
{NULL},
NULL,
NULL,
NULL};

125
src/chipset/opti291.c
View File

@@ -8,9 +8,10 @@
*
* Implementation of the OPTi 82C291 chipset.
* Authors: plant/nerd73
* Authors: plant/nerd73, Tiseno100
*
* Copyright 2020 plant/nerd73.
* Copyright 2021 Tiseno100.
*/
#include <stdarg.h>
#include <stdint.h>
@@ -24,53 +25,43 @@
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/port_92.h>
#include <86box/chipset.h>
#ifdef ENABLE_OPTI291_LOG
int opti291_do_log = ENABLE_OPTI291_LOG;
static void
opti291_log(const char *fmt, ...)
{
va_list ap;
if (opti291_do_log)
{
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
#define opti291_log(fmt, ...)
#endif
typedef struct
{
uint8_t index,
regs[256];
uint8_t index, regs[256];
port_92_t *port_92;
} opti291_t;
static void opti291_recalc(opti291_t *dev)
{
uint32_t base;
uint32_t i, shflags, write, writef = 0;
mem_set_mem_state_both(0xf0000, 0x10000, (!(dev->regs[0x23] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x80) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL));
writef = (dev->regs[0x27] & 0x80) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
if (!(dev->regs[0x23] & 0x40))
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | writef);
else
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTANY | writef);
for (i = 0; i < 4; i++) {
base = 0xe0000 + (i << 14);
shflags = (dev->regs[0x24] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
write = (dev->regs[0x24] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
shflags |= (dev->regs[0x27] & 0x40) ? MEM_WRITE_DISABLED : write;
mem_set_mem_state(base, 0x4000, shflags);
}
for (i = 0; i < 4; i++) {
base = 0xd0000 + (i << 14);
shflags = (dev->regs[0x25] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
write = (dev->regs[0x25] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
shflags |= (dev->regs[0x27] & 0x20) ? MEM_WRITE_DISABLED : write;
mem_set_mem_state(base, 0x4000, shflags);
}
for (i = 0; i < 4; i++) {
base = 0xc0000 + (i << 14);
shflags = (dev->regs[0x26] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
write = (dev->regs[0x26] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
shflags |= (dev->regs[0x27] & 0x10) ? MEM_WRITE_DISABLED : write;
mem_set_mem_state(base, 0x4000, shflags);
for (uint32_t i = 0; i < 4; i++)
{
mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, ((dev->regs[0x26] & (1 << (i + 4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x10) ? MEM_WRITE_DISABLED : ((dev->regs[0x26] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)));
mem_set_mem_state_both(0xd0000 + (i << 14), 0x4000, ((dev->regs[0x25] & (1 << (i + 4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x20) ? MEM_WRITE_DISABLED : ((dev->regs[0x25] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)));
mem_set_mem_state_both(0xe0000 + (i << 14), 0x4000, ((dev->regs[0x24] & (1 << (i + 4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x40) ? MEM_WRITE_DISABLED : ((dev->regs[0x24] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)));
}
flushmmucache();
}
@@ -79,48 +70,56 @@ opti291_write(uint16_t addr, uint8_t val, void *priv)
{
opti291_t *dev = (opti291_t *)priv;
switch (addr) {
switch (addr)
{
case 0x22:
dev->index = val;
break;
case 0x24:
pclog("OPTi 291: dev->regs[%02x] = %02x\n", dev->index, val);
dev->regs[dev->index] = val;
switch(dev->index){
opti291_log("OPTi 291: dev->regs[%02x] = %02x\n", dev->index, val);
switch (dev->index)
{
case 0x20:
dev->regs[dev->index] = val & 0x3f;
break;
case 0x21:
cpu_update_waitstates();
dev->regs[dev->index] = val & 0xf3;
break;
case 0x22:
dev->regs[dev->index] = val;
break;
case 0x23:
case 0x24:
case 0x25:
case 0x26:
case 0x27:
dev->regs[dev->index] = val;
opti291_recalc(dev);
break;
case 0x27:
case 0x28:
dev->regs[dev->index] = val;
break;
case 0x29:
dev->regs[dev->index] = val & 0x0f;
break;
case 0x2a:
case 0x2b:
case 0x2c:
dev->regs[dev->index] = val;
break;
}
break;
}
}
static uint8_t
opti291_read(uint16_t addr, void *priv)
{
uint8_t ret = 0xff;
opti291_t *dev = (opti291_t *)priv;
switch (addr) {
case 0x24:
// pclog("OPTi 291: read from dev->regs[%02x]\n", dev->index);
ret = dev->regs[dev->index];
break;
return (addr == 0x24) ? dev->regs[dev->index] : 0xff;
}
return ret;
}
static void
opti291_close(void *priv)
{
@@ -129,7 +128,6 @@ opti291_close(void *priv)
free(dev);
}
static void *
opti291_init(const device_t *info)
{
@@ -138,19 +136,24 @@ opti291_init(const device_t *info)
io_sethandler(0x022, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev);
io_sethandler(0x024, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev);
dev->regs[0x22] = 0xf0;
dev->regs[0x23] = 0x40;
dev->port_92 = device_add(&port_92_device);
dev->regs[0x28] = 0x08;
dev->regs[0x29] = 0xa0;
device_add(&port_92_device);
opti291_recalc(dev);
return dev;
}
const device_t opti291_device = {
"OPTi 82C291",
0,
0,
opti291_init, opti291_close, NULL,
{ NULL }, NULL, NULL,
NULL
};
opti291_init,
opti291_close,
NULL,
{NULL},
NULL,
NULL,
NULL};

2
src/floppy/CMakeLists.txt
View File

@@ -13,5 +13,5 @@
# Copyright 2020,2021 David Hrdlička.
#
add_library(fdd OBJECT fdd.c fdc.c fdc_pii15xb.c fdi2raw.c fdd_common.c
add_library(fdd OBJECT fdd.c fdc.c fdc_magitronic.c fdc_pii15xb.c fdi2raw.c fdd_common.c
fdd_86f.c fdd_fdi.c fdd_imd.c fdd_img.c fdd_json.c fdd_mfm.c fdd_td0.c)

3
src/floppy/fdc.c
View File

@@ -109,6 +109,7 @@ typedef const struct {
/* All emulated machines have at least one integrated FDC controller */
static fdc_cards_t fdc_cards[] = {
{ "internal", NULL },
{ "b215", &fdc_b215_device },
{ "dtk_pii151b", &fdc_pii151b_device },
{ "dtk_pii158b", &fdc_pii158b_device },
{ "", NULL },
@@ -2426,7 +2427,7 @@ const device_t fdc_at_nsc_device = {
const device_t fdc_dp8473_device = {
"NS DP8473 Floppy Drive Controller",
0,
FDC_FLAG_NSDP,
FDC_FLAG_AT | FDC_FLAG_NSC,
fdc_init,
fdc_close,
fdc_reset,

99
src/floppy/fdc_magitronic.c Normal file
View File

@@ -0,0 +1,99 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Magitronic B215 XT-FDC Controller.
*
* Authors: Tiseno100
*
* Copyright 2021 Tiseno100
*
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/mem.h>
#include <86box/rom.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#define ROM_B215 L"roms/floppy/magitronic/Magitronic B215 - BIOS ROM.bin"
#define ROM_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff)
typedef struct
{
fdc_t *fdc_controller;
rom_t rom;
} b215_t;
static void
b215_close(void *priv)
{
b215_t *dev = (b215_t *)priv;
free(dev);
}
static void *
b215_init(const device_t *info)
{
b215_t *dev = (b215_t *)malloc(sizeof(b215_t));
memset(dev, 0, sizeof(b215_t));
rom_init(&dev->rom, ROM_B215, ROM_ADDR, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL);
device_add(&fdc_at_device);
return dev;
}
static int b215_available(void)
{
return rom_present(ROM_B215);
}
static const device_config_t b215_config[] = {
{
"bios_addr", "BIOS Address:", CONFIG_HEX20, "", 0xca000, "", { 0 },
{
{
"CA00H", 0xca000
},
{
"CC00H", 0xcc000
},
{
""
}
}
},
{
"", "", -1
}
};
const device_t fdc_b215_device = {
"Magitronic B215",
DEVICE_ISA,
0,
b215_init,
b215_close,
NULL,
{b215_available},
NULL,
NULL,
b215_config};

130
src/floppy/fdc_pii15xb.c
View File

@@ -6,16 +6,14 @@
*
* This file is part of the VARCem Project.
*
* Implementation of the DTK PII-151B and PII-158B cards.
* Implementation of the DTK MiniMicro series of Floppy Disk Controllers.
* Original code from VARCem. Fully rewritten, fixed and improved for 86Box.
*
* These are DP8473-based floppy controller ISA cards for XT
* class systems, and allow usage of standard and high-density
* drives on them. They have their own BIOS which takes over
* from the standard system BIOS.
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
* Author: Fred N. van Kempen, <decwiz@yahoo.com>,
* Tiseno100
*
* Copyright 2019 Fred N. van Kempen.
* Copyright 2021 Tiseno100
*
* Redistribution and use in source and binary forms, with
* or without modification, are permitted provided that the
@@ -47,9 +45,19 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define _LARGEFILE_SOURCE
#define _LARGEFILE64_SOURCE
#define _GNU_SOURCE
/*
Notes:
VARCem uses the DP8473 for both floppy disk controllers. The statement though is wrong.
MiniMicro 4 uses a Zilog Z0765A08PSC(Clone of the NEC 765)
MiniMicro 1 uses a National Semiconductor DP8473(Clone of the NEC 765 with additional NSC commands)
Issues:
MiniMicro 4 WON'T WORK with XT machines. This statement has to be confirmed by someone with the real card itself.
MiniMicro 4 also won't work with the XT FDC which the Zilog claims to be.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
@@ -61,57 +69,23 @@
#include <86box/device.h>
#include <86box/io.h>
#include <86box/mem.h>
#include <86box/pic.h>
#include <86box/rom.h>
#include <86box/machine.h>
#include <86box/timer.h>
#include <86box/plat.h>
#include <86box/ui.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#define DTK_VARIANT ((info->local == 158) ? ROM_PII_158B : ROM_PII_151B)
#define DTK_CHIP ((info->local == 158) ? &fdc_at_device : &fdc_dp8473_device)
#define BIOS_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff)
#define ROM_PII_151B L"roms/floppy/dtk/pii-151b.rom"
#define ROM_PII_158B L"roms/floppy/dtk/pii-158b.rom"
typedef struct {
const char *name;
int type;
uint32_t bios_addr,
bios_size;
rom_t bios_rom;
fdc_t *fdc;
} pii_t;
/* Load and enable a BIOS ROM if we have one, and is enabled. */
static void
set_bios(pii_t *dev, wchar_t *fn)
typedef struct
{
uint32_t temp;
FILE *fp;
/* Only do this if needed. */
if ((fn == NULL) || (dev->bios_addr == 0)) return;
if ((fp = rom_fopen(fn, L"rb")) == NULL) return;
(void)fseek(fp, 0L, SEEK_END);
temp = ftell(fp);
(void)fclose(fp);
/* Assume 128K, then go down. */
dev->bios_size = 0x020000;
while (temp < dev->bios_size)
dev->bios_size >>= 1;
/* Create a memory mapping for the space. */
rom_init(&dev->bios_rom, fn, dev->bios_addr,
dev->bios_size, dev->bios_size-1, 0, MEM_MAPPING_EXTERNAL);
}
rom_t bios_rom;
} pii_t;
static void
pii_close(void *priv)
@@ -121,36 +95,20 @@ pii_close(void *priv)
free(dev);
}
static void *
pii_init(const device_t *info)
{
pii_t *dev;
dev = (pii_t *)malloc(sizeof(pii_t));
memset(dev, 0x00, sizeof(pii_t));
dev->type = info->local;
memset(dev, 0, sizeof(pii_t));
dev->bios_addr = device_get_config_hex20("bios_addr");
if (BIOS_ADDR != 0)
rom_init(&dev->bios_rom, DTK_VARIANT, BIOS_ADDR, 0x2000, 0x1ffff, 0, MEM_MAPPING_EXTERNAL);
if (dev->bios_addr != 0x000000) {
switch (dev->type) {
case 151:
set_bios(dev, ROM_PII_151B);
break;
case 158:
set_bios(dev, ROM_PII_158B);
break;
}
}
device_add(DTK_CHIP);
/* Attach the DP8473 chip. */
dev->fdc = device_add(&fdc_at_device);
//pclog("FDC: %s (I/O=%04X, flags=%08x)\n",
// info->name, dev->fdc->base_address, dev->fdc->flags);
return(dev);
return dev;
}
static int pii_151b_available(void)
@@ -165,19 +123,19 @@ static int pii_158_available(void)
static const device_config_t pii_config[] = {
{
"bios_addr", "BIOS address", CONFIG_HEX20, "", 0x0ce000, "", { 0 },
"bios_addr", "BIOS Address:", CONFIG_HEX20, "", 0xce000, "", { 0 },
{
{
"Disabled", 0
},
{
"CA00H", 0x0ca000
"CA00H", 0xca000
},
{
"CC00H", 0x0cc000
"CC00H", 0xcc000
},
{
"CE00H", 0x0ce000
"CE00H", 0xce000
},
{
""
@@ -193,16 +151,22 @@ const device_t fdc_pii151b_device = {
"DTK PII-151B (MiniMicro) Floppy Drive Controller",
DEVICE_ISA,
151,
pii_init, pii_close, NULL,
{ pii_151b_available }, NULL, NULL,
pii_config
};
pii_init,
pii_close,
NULL,
{pii_151b_available},
NULL,
NULL,
pii_config};
const device_t fdc_pii158b_device = {
"DTK PII-158B (MiniMicro4) Floppy Drive Controller",
DEVICE_ISA,
158,
pii_init, pii_close, NULL,
{ pii_158_available }, NULL, NULL,
pii_config
};
pii_init,
pii_close,
NULL,
{pii_158_available},
NULL,
NULL,
pii_config};

1
src/include/86box/fdc.h
View File

@@ -34,7 +34,6 @@ extern int fdc_type;
#define FDC_FLAG_NSC 0x80 /* PC87306, PC87309 */
#define FDC_FLAG_TOSHIBA 0x100 /* T1000, T1200 */
#define FDC_FLAG_AMSTRAD 0x200 /* Non-AT Amstrad machines */
#define FDC_FLAG_NSDP 0x400 /* DP8473N, DP8473V */
typedef struct {

1
src/include/86box/fdc_ext.h
View File

@@ -27,6 +27,7 @@ extern int fdc_type;
/* Controller types. */
#define FDC_INTERNAL 0
extern const device_t fdc_b215_device;
extern const device_t fdc_pii151b_device;
extern const device_t fdc_pii158b_device;

2
src/include/tinyglib.h
View File

@@ -271,7 +271,7 @@ g_strv_length(gchar **str_array)
#define g_rand_free free
#define g_realloc realloc
#define g_snprintf snprintf
#define g_strdup strdup
#define g_strdup(str) str ? strdup(str) : NULL
#define g_strerror strerror
#define g_strfreev free
#define g_string_append_printf sprintf /* unimplemented */

56
src/video/vid_ht216.c
View File

@@ -43,6 +43,7 @@ typedef struct ht216_t
rom_t bios_rom;
uint32_t vram_mask;
uint8_t adjust_cursor;
int ext_reg_enable;
int clk_sel;
@@ -154,11 +155,12 @@ ht216_out(uint16_t addr, uint8_t val, void *p)
switch (svga->seqaddr & 0xff) {
case 0x83:
svga->attraddr = val & 0x1f;
svga->attrff = (val & 0x80) ? 1 : 0;
svga->attrff = !!(val & 0x80);
break;
case 0x94:
svga->hwcursor.addr = ((val << 6) | (3 << 14) | ((ht216->ht_regs[0xff] & 0x60) << 11)) << 2;
case 0xff:
svga->hwcursor.addr = ((ht216->ht_regs[0x94] << 6) | (3 << 14) | ((ht216->ht_regs[0xff] & 0x60) << 11)) << 2;
break;
case 0x9c: case 0x9d:
svga->hwcursor.x = ht216->ht_regs[0x9d] | ((ht216->ht_regs[0x9c] & 7) << 8);
@@ -221,10 +223,6 @@ ht216_out(uint16_t addr, uint8_t val, void *p)
svga->fullchange = changeframecount;
svga_recalctimings(svga);
break;
case 0xff:
svga->hwcursor.addr = ((ht216->ht_regs[0x94] << 6) | (3 << 14) | ((val & 0x60) << 11)) << 2;
break;
}
switch (svga->seqaddr & 0xff) {
case 0xc8: case 0xc9: case 0xcf: case 0xe0:
@@ -487,6 +485,7 @@ void
ht216_recalctimings(svga_t *svga)
{
ht216_t *ht216 = (ht216_t *)svga->p;
int high_res_256 = 0;
switch (ht216->clk_sel) {
case 5: svga->clock = (cpuclock * (double)(1ull << 32)) / 65000000.0; break;
@@ -499,7 +498,17 @@ ht216_recalctimings(svga_t *svga)
svga->interlace = ht216->ht_regs[0xe0] & 1;
if ((svga->bpp == 8) && !svga->lowres) {
if (svga->interlace)
high_res_256 = (svga->htotal * 8) > (svga->vtotal * 4);
else
high_res_256 = (svga->htotal * 8) > (svga->vtotal * 2);
ht216->adjust_cursor = 0;
if ((svga->bpp == 8) && (!svga->lowres || high_res_256)) {
if (high_res_256) {
svga->hdisp /= 2;
ht216->adjust_cursor = 1;
}
svga->render = svga_render_8bpp_highres;
}
}
@@ -508,9 +517,14 @@ ht216_recalctimings(svga_t *svga)
static void
ht216_hwcursor_draw(svga_t *svga, int displine)
{
int x;
ht216_t *ht216 = (ht216_t *)svga->p;
int x, shift = (ht216->adjust_cursor ? 2 : 1);
uint32_t dat[2];
int offset = svga->hwcursor_latch.x + svga->hwcursor_latch.xoff;
int width = (ht216->adjust_cursor ? 16 : 32);
if (ht216->adjust_cursor)
offset >>= 1;
if (svga->interlace && svga->hwcursor_oddeven)
svga->hwcursor_latch.addr += 4;
@@ -524,14 +538,14 @@ ht216_hwcursor_draw(svga_t *svga, int displine)
(svga->vram[svga->hwcursor_latch.addr+128+2] << 8) |
svga->vram[svga->hwcursor_latch.addr+128+3];
for (x = 0; x < 32; x++) {
for (x = 0; x < width; x++) {
if (!(dat[0] & 0x80000000))
((uint32_t *)buffer32->line[displine])[svga->x_add + offset + x] = 0;
if (dat[1] & 0x80000000)
((uint32_t *)buffer32->line[displine])[svga->x_add + offset + x] ^= 0xffffff;
dat[0] <<= 1;
dat[1] <<= 1;
dat[0] <<= shift;
dat[1] <<= shift;
}
svga->hwcursor_latch.addr += 4;
@@ -619,22 +633,18 @@ ht216_dm_write(ht216_t *ht216, uint32_t addr, uint8_t cpu_dat, uint8_t cpu_dat_u
break;
case 0x04:
if (ht216->ht_regs[0xfe] & HT_REG_FE_FBRC) {
if (addr & 4) {
for (i = 0; i < count; i++) {
fg_data[i] = (cpu_dat_unexpanded & (1 << (((addr + i + 4) & 7) ^ 7))) ? ht216->ht_regs[0xfa] : ht216->ht_regs[0xfb];
if (ht216->ht_regs[0xfa] & (1 << i))
fg_data[i] = cpu_dat_unexpanded;
else if (ht216->ht_regs[0xfb] & (1 << i))
fg_data[i] = 0xff - cpu_dat_unexpanded;
}
} else {
for (i = 0; i < count; i++) {
fg_data[i] = (cpu_dat_unexpanded & (1 << (((addr + i) & 7) ^ 7))) ? ht216->ht_regs[0xfa] : ht216->ht_regs[0xfb];
}
}
} else {
if (addr & 4) {
for (i = 0; i < count; i++)
fg_data[i] = (ht216->ht_regs[0xf5] & (1 << (((addr + i + 4) & 7) ^ 7))) ? ht216->ht_regs[0xfa] : ht216->ht_regs[0xfb];
} else {
for (i = 0; i < count; i++)
fg_data[i] = (ht216->ht_regs[0xf5] & (1 << (((addr + i) & 7) ^ 7))) ? ht216->ht_regs[0xfa] : ht216->ht_regs[0xfb];
if (ht216->ht_regs[0xfa] & (1 << i))
fg_data[i] = ht216->ht_regs[0xf5];
else if (ht216->ht_regs[0xfb] & (1 << i))
fg_data[i] = 0xff - ht216->ht_regs[0xf5];
}
}
break;

2
src/win/Makefile.mingw
View File

@@ -658,7 +658,7 @@ SIOOBJ := sio_acc3221.o \
sio_um8669f.o \
sio_vt82c686.o
FDDOBJ := fdd.o fdc.o fdc_pii15xb.o \
FDDOBJ := fdd.o fdc.o fdc_magitronic.o fdc_pii15xb.o \
fdi2raw.o \
fdd_common.o fdd_86f.o \
fdd_fdi.o fdd_imd.o fdd_img.o fdd_json.o \