From 157997fa9b93c591cdbf75e5fc69bdc57ea59d98 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Wed, 25 Nov 2020 17:04:35 -0300 Subject: [PATCH] Cosmetic change to DDC pixel clock value --- src/video/vid_ddc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/video/vid_ddc.c b/src/video/vid_ddc.c index 1a07e7898..880adc79e 100644 --- a/src/video/vid_ddc.c +++ b/src/video/vid_ddc.c @@ -151,8 +151,8 @@ ddc_init(void *i2c) STD_TIMING(7, 2048, STD_ASPECT_4_3); /* 2048x1536 */ /* Detailed timings for the preferred mode of 800x600 */ - edid->detailed_timings[0].pixel_clock_lsb = 0xa0; /* 40000 KHz */ - edid->detailed_timings[0].pixel_clock_msb = 0x0f; + edid->detailed_timings[0].pixel_clock_lsb = 4000 & 0xff; /* 40.000 MHz */ + edid->detailed_timings[0].pixel_clock_msb = 4000 >> 8; edid->detailed_timings[0].h_active_lsb = 800 & 0xff; edid->detailed_timings[0].h_blank_lsb = 256 & 0xff; edid->detailed_timings[0].h_active_blank_msb = ((800 >> 4) & 0xf0) | ((256 >> 8) & 0x0f);