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sonarlint vid_cl54xx.c

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This commit is contained in:
Jasmine Iwanek
2023-07-31 16:50:18 -04:00
parent bf18fa3297
commit 167146a5c4
1 changed files with 229 additions and 100 deletions
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257
src/video/vid_cl54xx.c
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@@ -39,6 +39,8 @@
#include <86box/vid_ddc.h> #include <86box/vid_ddc.h>
#include <86box/vid_svga.h> #include <86box/vid_svga.h>
#include <86box/vid_svga_render.h> #include <86box/vid_svga_render.h>
#include <86box/plat_fallthrough.h>
#include <86box/plat_unused.h>
#define BIOS_GD5401_PATH "roms/video/cirruslogic/avga1.rom" #define BIOS_GD5401_PATH "roms/video/cirruslogic/avga1.rom"
#define BIOS_GD5402_PATH "roms/video/cirruslogic/avga2.rom" #define BIOS_GD5402_PATH "roms/video/cirruslogic/avga2.rom"
@@ -158,8 +160,9 @@ typedef struct gd54xx_t {
svga_t svga; svga_t svga;
int has_bios, rev, int has_bios;
bit32; int rev;
int bit32;
rom_t bios_rom; rom_t bios_rom;
uint32_t vram_size; uint32_t vram_size;
@@ -174,45 +177,76 @@ typedef struct gd54xx_t {
} ramdac; } ramdac;
struct { struct {
uint16_t width, height; uint16_t width;
uint16_t dst_pitch, src_pitch; uint16_t height;
uint16_t trans_col, trans_mask; uint16_t dst_pitch;
uint16_t src_pitch;
uint16_t trans_col;
uint16_t trans_mask;
uint16_t height_internal; uint16_t height_internal;
uint16_t msd_buf_pos, msd_buf_cnt; uint16_t msd_buf_pos;
uint16_t msd_buf_cnt;
uint8_t status; uint8_t status;
uint8_t mask, mode, rop, modeext; uint8_t mask;
uint8_t ms_is_dest, msd_buf[32]; uint8_t mode;
uint8_t rop;
uint8_t modeext;
uint8_t ms_is_dest;
uint8_t msd_buf[32];
uint32_t fg_col, bg_col; uint32_t fg_col;
uint32_t dst_addr_backup, src_addr_backup; uint32_t bg_col;
uint32_t dst_addr, src_addr; uint32_t dst_addr_backup;
uint32_t sys_src32, sys_cnt; uint32_t src_addr_backup;
uint32_t dst_addr;
uint32_t src_addr;
uint32_t sys_src32;
uint32_t sys_cnt;
/* Internal state */ /* Internal state */
int pixel_width, pattern_x; int pixel_width;
int x_count, y_count; int pattern_x;
int xx_count, dir; int x_count;
int y_count;
int xx_count;
int dir;
int unlock_special; int unlock_special;
} blt; } blt;
struct { struct {
int mode; int mode;
uint16_t stride, r1sz, r1adjust, r2sz, uint16_t stride;
r2adjust, r2sdz, wvs, wve, uint16_t r1sz;
hzoom, vzoom; uint16_t r1adjust;
uint8_t occlusion, colorkeycomparemask, uint16_t r2sz;
colorkeycompare; uint16_t r2adjust;
int region1size, region2size, uint16_t r2sdz;
colorkeymode; uint16_t wvs;
uint16_t wve;
uint16_t hzoom;
uint16_t vzoom;
uint8_t occlusion;
uint8_t colorkeycomparemask;
uint8_t colorkeycompare;
int region1size;
int region2size;
int colorkeymode;
uint32_t ck; uint32_t ck;
} overlay; } overlay;
int pci, vlb, mca, countminusone; int pci;
int vblank_irq, vportsync; int vlb;
int mca;
int countminusone;
int vblank_irq;
int vportsync;
uint8_t pci_regs[256]; uint8_t pci_regs[256];
uint8_t int_line, unlocked, status, extensions; uint8_t int_line;
uint8_t unlocked;
uint8_t status;
uint8_t extensions;
uint8_t crtcreg_mask; uint8_t crtcreg_mask;
uint8_t fc; /* Feature Connector */ uint8_t fc; /* Feature Connector */
@@ -224,14 +258,16 @@ typedef struct gd54xx_t {
uint8_t pos_regs[8]; uint8_t pos_regs[8];
uint32_t lfb_base, vgablt_base; uint32_t lfb_base;
uint32_t vgablt_base;
int mmio_vram_overlap; int mmio_vram_overlap;
uint32_t extpallook[256]; uint32_t extpallook[256];
PALETTE extpal; PALETTE extpal;
void *i2c, *ddc; void *i2c;
void *ddc;
} gd54xx_t; } gd54xx_t;
static video_timings_t timing_gd54xx_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 8, .read_w = 8, .read_l = 12 }; static video_timings_t timing_gd54xx_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 8, .read_w = 8, .read_l = 12 };
@@ -515,7 +551,7 @@ gd54xx_is_5422(svga_t *svga)
static void static void
gd54xx_overlay_draw(svga_t *svga, int displine) gd54xx_overlay_draw(svga_t *svga, int displine)
{ {
gd54xx_t *gd54xx = (gd54xx_t *) svga->priv; const gd54xx_t *gd54xx = (gd54xx_t *) svga->priv;
int shift = (svga->crtc[0x27] >= CIRRUS_ID_CLGD5446) ? 2 : 0; int shift = (svga->crtc[0x27] >= CIRRUS_ID_CLGD5446) ? 2 : 0;
int h_acc = svga->overlay_latch.h_acc; int h_acc = svga->overlay_latch.h_acc;
int r[8]; int r[8];
@@ -531,7 +567,7 @@ gd54xx_overlay_draw(svga_t *svga, int displine)
int occl; int occl;
int ckval; int ckval;
p = &((uint32_t *) svga->monitor->target_buffer->line[displine])[gd54xx->overlay.region1size + svga->x_add]; p = &(svga->monitor->target_buffer->line[displine])[gd54xx->overlay.region1size + svga->x_add];
src2 += gd54xx->overlay.region1size * bytesperpix; src2 += gd54xx->overlay.region1size * bytesperpix;
OVERLAY_SAMPLE(); OVERLAY_SAMPLE();
@@ -771,6 +807,9 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
else else
return; return;
break; break;
default:
break;
} }
return; return;
} }
@@ -826,6 +865,9 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
svga->dac_addr = (svga->dac_addr + 1) & 255; svga->dac_addr = (svga->dac_addr + 1) & 255;
svga->dac_pos = 0; svga->dac_pos = 0;
break; break;
default:
break;
} }
return; return;
case 0x3ce: case 0x3ce:
@@ -872,6 +914,9 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
case 7: case 7:
svga->colournocare = val; svga->colournocare = val;
break; break;
default:
break;
} }
if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5422) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5424)) if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5422) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5424))
@@ -908,6 +953,9 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
} }
svga->seqregs[2] &= 0x0f; svga->seqregs[2] &= 0x0f;
} }
#ifdef FALLTHROUGH_ANNOTATION
[[fallthrough]];
#endif
case 0x09: case 0x09:
case 0x0a: case 0x0a:
gd54xx_recalc_banking(gd54xx); gd54xx_recalc_banking(gd54xx);
@@ -1027,6 +1075,9 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
case 0x39: case 0x39:
gd543x_mmio_write(0xb8021, val, gd54xx); gd543x_mmio_write(0xb8021, val, gd54xx);
break; break;
default:
break;
} }
} }
return; return;
@@ -1142,6 +1193,9 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
svga->overlay.ena = (val & 1) != 0; svga->overlay.ena = (val & 1) != 0;
gd54xx_update_overlay(gd54xx); gd54xx_update_overlay(gd54xx);
break; break;
default:
break;
} }
if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) { if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) {
@@ -1155,6 +1209,9 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
} }
} }
break; break;
default:
break;
} }
svga_out(addr, val, svga); svga_out(addr, val, svga);
} }
@@ -1225,6 +1282,9 @@ gd54xx_in(uint16_t addr, void *priv)
case 2048: case 2048:
ret |= 0x18; ret |= 0x18;
break; break;
default:
break;
} }
} }
break; break;
@@ -1249,6 +1309,9 @@ gd54xx_in(uint16_t addr, void *priv)
case 4096: case 4096:
ret |= 0x98; /*64-bit (5434 and up) DRAM data bus width for 4M of memory*/ ret |= 0x98; /*64-bit (5434 and up) DRAM data bus width for 4M of memory*/
break; break;
default:
break;
} }
break; break;
case 0x15: /*Scratch Pad 3 (Memory size for 543x)*/ case 0x15: /*Scratch Pad 3 (Memory size for 543x)*/
@@ -1264,6 +1327,9 @@ gd54xx_in(uint16_t addr, void *priv)
case 4: case 4:
ret |= 0x04; ret |= 0x04;
break; break;
default:
break;
} }
} }
break; break;
@@ -1301,6 +1367,9 @@ gd54xx_in(uint16_t addr, void *priv)
case 0x1e: case 0x1e:
ret = gd54xx->vclk_d[svga->seqaddr - 0x1b]; ret = gd54xx->vclk_d[svga->seqaddr - 0x1b];
break; break;
default:
break;
} }
break; break;
} else } else
@@ -1356,6 +1425,9 @@ gd54xx_in(uint16_t addr, void *priv)
else else
ret = svga->vgapal[index].b & 0x3f; ret = svga->vgapal[index].b & 0x3f;
break; break;
default:
break;
} }
break; break;
case 0x3ce: case 0x3ce:
@@ -1473,6 +1545,9 @@ gd54xx_in(uint16_t addr, void *priv)
gd54xx->vportsync = !gd54xx->vportsync; gd54xx->vportsync = !gd54xx->vportsync;
ret = gd54xx->vportsync ? 0x80 : 0x00; ret = gd54xx->vportsync ? 0x80 : 0x00;
break; break;
default:
break;
} }
} else { } else {
if ((svga->gdcaddr < 2) && !gd54xx->unlocked) if ((svga->gdcaddr < 2) && !gd54xx->unlocked)
@@ -1513,6 +1588,9 @@ gd54xx_in(uint16_t addr, void *priv)
if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5430) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5440)) if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5430) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5440))
ret = 0xff; /*Standard CL-GD5430/40*/ ret = 0xff; /*Standard CL-GD5430/40*/
break; break;
default:
break;
} }
break; break;
default: default:
@@ -1590,6 +1668,9 @@ gd543x_recalc_mapping(gd54xx_t *gd54xx)
svga->banked_mask = 0x7fff; svga->banked_mask = 0x7fff;
gd54xx->mmio_vram_overlap = 1; gd54xx->mmio_vram_overlap = 1;
break; break;
default:
break;
} }
if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x07] & 0x01) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429)) { if ((svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) && (svga->seqregs[0x07] & 0x01) && (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429)) {
@@ -1611,9 +1692,11 @@ gd543x_recalc_mapping(gd54xx_t *gd54xx)
} }
} else if (gd54xx->pci) { } else if (gd54xx->pci) {
base = gd54xx->lfb_base; base = gd54xx->lfb_base;
/* if (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) #if 0
if (svga->crtc[0x27] == CIRRUS_ID_CLGD5480)
size = 32 * 1024 * 1024; size = 32 * 1024 * 1024;
else */ else
#endif
if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436) if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5436)
size = 16 * 1024 * 1024; size = 16 * 1024 * 1024;
else else
@@ -1649,7 +1732,7 @@ gd543x_recalc_mapping(gd54xx_t *gd54xx)
static void static void
gd54xx_recalctimings(svga_t *svga) gd54xx_recalctimings(svga_t *svga)
{ {
gd54xx_t *gd54xx = (gd54xx_t *) svga->priv; const gd54xx_t *gd54xx = (gd54xx_t *) svga->priv;
uint8_t clocksel; uint8_t clocksel;
uint8_t rdmask; uint8_t rdmask;
uint8_t linedbl = svga->dispend * 9 / 10 >= svga->hdisp; uint8_t linedbl = svga->dispend * 9 / 10 >= svga->hdisp;
@@ -1788,8 +1871,14 @@ gd54xx_recalctimings(svga_t *svga)
else else
svga->render = svga_render_8bpp_highres; svga->render = svga_render_8bpp_highres;
break; break;
default:
break;
} }
break; break;
default:
break;
} }
} else { } else {
svga->bpp = 15; svga->bpp = 15;
@@ -1814,16 +1903,19 @@ gd54xx_recalctimings(svga_t *svga)
else { else {
int n = gd54xx->vclk_n[clocksel] & 0x7f; int n = gd54xx->vclk_n[clocksel] & 0x7f;
int d = (gd54xx->vclk_d[clocksel] & 0x3e) >> 1; int d = (gd54xx->vclk_d[clocksel] & 0x3e) >> 1;
int m = gd54xx->vclk_d[clocksel] & 0x01 ? 2 : 1; uint8_t m = gd54xx->vclk_d[clocksel] & 0x01 ? 2 : 1;
float freq = (14318184.0 * ((float) n / ((float) d * m))); float freq = (14318184.0F * ((float) n / ((float) d * m)));
if (gd54xx_is_5422(svga)) { if (gd54xx_is_5422(svga)) {
switch (svga->seqregs[7] & (gd54xx_is_5434(svga) ? 0xe : 6)) { switch (svga->seqregs[7] & (gd54xx_is_5434(svga) ? 0xe : 6)) {
case 2: case 2:
freq /= 2.0; freq /= 2.0F;
break; break;
case 4: case 4:
if (!gd54xx_is_5434(svga)) if (!gd54xx_is_5434(svga))
freq /= 3.0; freq /= 3.0F;
break;
default:
break; break;
} }
} }
@@ -1836,7 +1928,7 @@ gd54xx_recalctimings(svga_t *svga)
static void static void
gd54xx_hwcursor_draw(svga_t *svga, int displine) gd54xx_hwcursor_draw(svga_t *svga, int displine)
{ {
gd54xx_t *gd54xx = (gd54xx_t *) svga->priv; const gd54xx_t *gd54xx = (gd54xx_t *) svga->priv;
int comb; int comb;
int b0; int b0;
int b1; int b1;
@@ -1869,16 +1961,19 @@ gd54xx_hwcursor_draw(svga_t *svga, int displine)
break; break;
case 1: case 1:
/* The pixel is shown in the cursor background color */ /* The pixel is shown in the cursor background color */
((uint32_t *) svga->monitor->target_buffer->line[displine])[offset + svga->x_add] = bgcol; (svga->monitor->target_buffer->line[displine])[offset + svga->x_add] = bgcol;
break; break;
case 2: case 2:
/* The pixel is shown as the inverse of the original screen pixel /* The pixel is shown as the inverse of the original screen pixel
(XOR cursor) */ (XOR cursor) */
((uint32_t *) svga->monitor->target_buffer->line[displine])[offset + svga->x_add] ^= 0xffffff; (svga->monitor->target_buffer->line[displine])[offset + svga->x_add] ^= 0xffffff;
break; break;
case 3: case 3:
/* The pixel is shown in the cursor foreground color */ /* The pixel is shown in the cursor foreground color */
((uint32_t *) svga->monitor->target_buffer->line[displine])[offset + svga->x_add] = fgcol; (svga->monitor->target_buffer->line[displine])[offset + svga->x_add] = fgcol;
break;
default:
break; break;
} }
} }
@@ -1947,6 +2042,9 @@ gd54xx_rop(gd54xx_t *gd54xx, uint8_t *res, uint8_t *dst, const uint8_t *src)
case 0xda: case 0xda:
*res = ~(*src & *dst); *res = ~(*src & *dst);
break; break;
default:
break;
} }
} }
@@ -2120,6 +2218,9 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr)
} }
} }
break; break;
default:
break;
} }
svga->changedvram[addr >> 12] = changeframecount; svga->changedvram[addr >> 12] = changeframecount;
@@ -2135,7 +2236,7 @@ gd54xx_get_aperture(uint32_t addr)
static int static int
gd54xx_aperture2_enabled(gd54xx_t *gd54xx) gd54xx_aperture2_enabled(gd54xx_t *gd54xx)
{ {
svga_t *svga = &gd54xx->svga; const svga_t *svga = &gd54xx->svga;
if (svga->crtc[0x27] < CIRRUS_ID_CLGD5436) if (svga->crtc[0x27] < CIRRUS_ID_CLGD5436)
return 0; return 0;
@@ -2171,8 +2272,8 @@ gd54xx_readb_linear(uint32_t addr, void *priv)
return gd54xx_mem_sys_dest_read(gd54xx); return gd54xx_mem_sys_dest_read(gd54xx);
switch (ap) { switch (ap) {
case 0:
default: default:
case 0:
break; break;
case 1: case 1:
/* 0 -> 1, 1 -> 0, 2 -> 3, 3 -> 2 */ /* 0 -> 1, 1 -> 0, 2 -> 3, 3 -> 2 */
@@ -2218,12 +2319,15 @@ gd54xx_readw_linear(uint32_t addr, void *priv)
} }
switch (ap) { switch (ap) {
case 0:
default: default:
case 0:
return svga_readw_linear(addr, svga); return svga_readw_linear(addr, svga);
case 2: case 2:
/* 0 -> 3, 1 -> 2, 2 -> 1, 3 -> 0 */ /* 0 -> 3, 1 -> 2, 2 -> 1, 3 -> 0 */
addr ^= 0x00000002; addr ^= 0x00000002;
#ifdef FALLTHROUGH_ANNOTATION
[[fallthrough]];
#endif
case 1: case 1:
temp = svga_readb_linear(addr + 1, svga); temp = svga_readb_linear(addr + 1, svga);
temp |= (svga_readb_linear(addr, svga) << 8); temp |= (svga_readb_linear(addr, svga) << 8);
@@ -2268,8 +2372,8 @@ gd54xx_readl_linear(uint32_t addr, void *priv)
} }
switch (ap) { switch (ap) {
case 0:
default: default:
case 0:
return svga_readl_linear(addr, svga); return svga_readl_linear(addr, svga);
case 1: case 1:
temp = svga_readb_linear(addr + 1, svga); temp = svga_readb_linear(addr + 1, svga);
@@ -2297,7 +2401,7 @@ gd54xx_readl_linear(uint32_t addr, void *priv)
} }
static uint8_t static uint8_t
gd5436_aperture2_readb(uint32_t addr, void *priv) gd5436_aperture2_readb(UNUSED(uint32_t addr), void *priv)
{ {
gd54xx_t *gd54xx = (gd54xx_t *) priv; gd54xx_t *gd54xx = (gd54xx_t *) priv;
@@ -2340,7 +2444,7 @@ gd5436_aperture2_readl(uint32_t addr, void *priv)
} }
static void static void
gd5436_aperture2_writeb(uint32_t addr, uint8_t val, void *priv) gd5436_aperture2_writeb(UNUSED(uint32_t addr), uint8_t val, void *priv)
{ {
gd54xx_t *gd54xx = (gd54xx_t *) priv; gd54xx_t *gd54xx = (gd54xx_t *) priv;
@@ -2453,8 +2557,8 @@ gd54xx_writew_linear(uint32_t addr, uint16_t val, void *priv)
if (svga->writemode < 4) { if (svga->writemode < 4) {
switch (ap) { switch (ap) {
case 0:
default: default:
case 0:
svga_writew_linear(addr, val, svga); svga_writew_linear(addr, val, svga);
return; return;
case 2: case 2:
@@ -2465,21 +2569,26 @@ gd54xx_writew_linear(uint32_t addr, uint16_t val, void *priv)
if (svga->fast) if (svga->fast)
cycles -= svga->monitor->mon_video_timing_write_w; cycles -= svga->monitor->mon_video_timing_write_w;
return;
case 3: case 3:
return; return;
} }
} else { } else {
switch (ap) { switch (ap) {
case 0:
default: default:
case 0:
svga_write_linear(addr, val & 0xff, svga); svga_write_linear(addr, val & 0xff, svga);
svga_write_linear(addr + 1, val >> 8, svga); svga_write_linear(addr + 1, val >> 8, svga);
return; return;
case 2: case 2:
addr ^= 0x00000002; addr ^= 0x00000002;
#ifdef FALLTHROUGH_ANNOTATION
[[fallthrough]];
#endif
case 1: case 1:
svga_write_linear(addr + 1, val & 0xff, svga); svga_write_linear(addr + 1, val & 0xff, svga);
svga_write_linear(addr, val >> 8, svga); svga_write_linear(addr, val >> 8, svga);
return;
case 3: case 3:
return; return;
} }
@@ -2519,8 +2628,8 @@ gd54xx_writel_linear(uint32_t addr, uint32_t val, void *priv)
if (svga->writemode < 4) { if (svga->writemode < 4) {
switch (ap) { switch (ap) {
case 0:
default: default:
case 0:
svga_writel_linear(addr, val, svga); svga_writel_linear(addr, val, svga);
return; return;
case 1: case 1:
@@ -2534,13 +2643,14 @@ gd54xx_writel_linear(uint32_t addr, uint32_t val, void *priv)
svga_writeb_linear(addr + 2, val >> 8, svga); svga_writeb_linear(addr + 2, val >> 8, svga);
svga_writeb_linear(addr + 1, val >> 16, svga); svga_writeb_linear(addr + 1, val >> 16, svga);
svga_writeb_linear(addr, val >> 24, svga); svga_writeb_linear(addr, val >> 24, svga);
return;
case 3: case 3:
return; return;
} }
} else { } else {
switch (ap) { switch (ap) {
case 0:
default: default:
case 0:
svga_write_linear(addr, val & 0xff, svga); svga_write_linear(addr, val & 0xff, svga);
svga_write_linear(addr + 1, val >> 8, svga); svga_write_linear(addr + 1, val >> 8, svga);
svga_write_linear(addr + 2, val >> 16, svga); svga_write_linear(addr + 2, val >> 16, svga);
@@ -2557,6 +2667,7 @@ gd54xx_writel_linear(uint32_t addr, uint32_t val, void *priv)
svga_write_linear(addr + 2, val >> 8, svga); svga_write_linear(addr + 2, val >> 8, svga);
svga_write_linear(addr + 1, val >> 16, svga); svga_write_linear(addr + 1, val >> 16, svga);
svga_write_linear(addr, val >> 24, svga); svga_write_linear(addr, val >> 24, svga);
return;
case 3: case 3:
return; return;
} }
@@ -2791,6 +2902,9 @@ gd543x_mmio_write(uint32_t addr, uint8_t val, void *priv)
gd54xx_start_blit(0, 0xffffffff, gd54xx, svga); gd54xx_start_blit(0, 0xffffffff, gd54xx, svga);
} }
break; break;
default:
break;
} }
} else if (gd54xx->mmio_vram_overlap) } else if (gd54xx->mmio_vram_overlap)
gd54xx_write(addr, val, gd54xx); gd54xx_write(addr, val, gd54xx);
@@ -2985,6 +3099,9 @@ gd543x_mmio_read(uint32_t addr, void *priv)
case 0x40: case 0x40:
ret = gd54xx->blt.status; ret = gd54xx->blt.status;
break; break;
default:
break;
} }
} else if (gd54xx->mmio_vram_overlap) } else if (gd54xx->mmio_vram_overlap)
ret = gd54xx_read(addr, gd54xx); ret = gd54xx_read(addr, gd54xx);
@@ -3154,6 +3271,9 @@ gd54xx_get_pixel_width(gd54xx_t *gd54xx)
case CIRRUS_BLTMODE_PIXELWIDTH32: case CIRRUS_BLTMODE_PIXELWIDTH32:
ret = 4; ret = 4;
break; break;
default:
break;
} }
return ret; return ret;
@@ -3422,7 +3542,7 @@ gd54xx_normal_blit(uint32_t count, gd54xx_t *gd54xx, svga_t *svga)
dst = svga->vram[dst_addr & svga->vram_mask]; dst = svga->vram[dst_addr & svga->vram_mask];
svga->changedvram[(dst_addr & svga->vram_mask) >> 12] = changeframecount; svga->changedvram[(dst_addr & svga->vram_mask) >> 12] = changeframecount;
gd54xx_rop(gd54xx, (uint8_t *) &dst, (uint8_t *) &dst, (const uint8_t *) &src); gd54xx_rop(gd54xx, &dst, &dst, (const uint8_t *) &src);
if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_COLOREXPINV)) if ((gd54xx->blt.mode & CIRRUS_BLTMODE_COLOREXPAND) && (gd54xx->blt.modeext & CIRRUS_BLTMODEEXT_COLOREXPINV))
mask = !mask; mask = !mask;
@@ -3560,10 +3680,10 @@ gd54xx_start_blit(uint32_t cpu_dat, uint32_t count, gd54xx_t *gd54xx, svga_t *sv
} }
static uint8_t static uint8_t
cl_pci_read(int func, int addr, void *priv) cl_pci_read(UNUSED(int func), int addr, void *priv)
{ {
gd54xx_t *gd54xx = (gd54xx_t *) priv; const gd54xx_t *gd54xx = (gd54xx_t *) priv;
svga_t *svga = &gd54xx->svga; const svga_t *svga = &gd54xx->svga;
uint8_t ret = 0x00; uint8_t ret = 0x00;
if ((addr >= 0x30) && (addr <= 0x33) && (!gd54xx->has_bios)) if ((addr >= 0x30) && (addr <= 0x33) && (!gd54xx->has_bios))
@@ -3653,16 +3773,19 @@ cl_pci_read(int func, int addr, void *priv)
case 0x3d: case 0x3d:
ret = PCI_INTA; ret = PCI_INTA;
break; break;
default:
break;
} }
return ret; return ret;
} }
static void static void
cl_pci_write(int func, int addr, uint8_t val, void *priv) cl_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
{ {
gd54xx_t *gd54xx = (gd54xx_t *) priv; gd54xx_t *gd54xx = (gd54xx_t *) priv;
svga_t *svga = &gd54xx->svga; const svga_t *svga = &gd54xx->svga;
uint32_t byte; uint32_t byte;
if ((addr >= 0x30) && (addr <= 0x33) && (!gd54xx->has_bios)) if ((addr >= 0x30) && (addr <= 0x33) && (!gd54xx->has_bios))
@@ -3723,13 +3846,16 @@ cl_pci_write(int func, int addr, uint8_t val, void *priv)
case 0x3c: case 0x3c:
gd54xx->int_line = val; gd54xx->int_line = val;
return; return;
default:
break;
} }
} }
static uint8_t static uint8_t
gd5428_mca_read(int port, void *priv) gd5428_mca_read(int port, void *priv)
{ {
gd54xx_t *gd54xx = (gd54xx_t *) priv; const gd54xx_t *gd54xx = (gd54xx_t *) priv;
return gd54xx->pos_regs[port & 7]; return gd54xx->pos_regs[port & 7];
} }
@@ -3747,7 +3873,7 @@ gd5428_mca_write(int port, uint8_t val, void *priv)
} }
static uint8_t static uint8_t
gd5428_mca_feedb(void *priv) gd5428_mca_feedb(UNUSED(void *priv))
{ {
return 1; return 1;
} }
@@ -3824,17 +3950,17 @@ gd54xx_reset(void *priv)
gd54xx->unlocked = 0; gd54xx->unlocked = 0;
} }
static void static void *
* gd54xx_init(const device_t *info)
gd54xx_init(const device_t *info)
{ {
gd54xx_t *gd54xx = malloc(sizeof(gd54xx_t)); gd54xx_t *gd54xx = malloc(sizeof(gd54xx_t));
svga_t *svga = &gd54xx->svga; svga_t *svga = &gd54xx->svga;
int id = info->local & 0xff; int id = info->local & 0xff;
int vram; int vram;
char *romfn = NULL; const char *romfn = NULL;
char *romfn1 = NULL; const char *romfn1 = NULL;
char *romfn2 = NULL; const char *romfn2 = NULL;
memset(gd54xx, 0, sizeof(gd54xx_t)); memset(gd54xx, 0, sizeof(gd54xx_t));
gd54xx->pci = !!(info->flags & DEVICE_PCI); gd54xx->pci = !!(info->flags & DEVICE_PCI);
@@ -3966,6 +4092,9 @@ static void
case CIRRUS_ID_CLGD5480: case CIRRUS_ID_CLGD5480:
romfn = BIOS_GD5480_PATH; romfn = BIOS_GD5480_PATH;
break; break;
default:
break;
} }
if (info->flags & DEVICE_MCA) { if (info->flags & DEVICE_MCA) {