From 17c3056681bc6aec4c706cfeafef64ee960d5906 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 20 Apr 2021 03:24:30 +0200 Subject: [PATCH] Finished fixing the VIA chipset required for the FIC VIP-IO2, added a version of the W83787F Super I/O chip with secondary IDE, fixed the W83787F IDE handler, made AT NVR initialize with 0xff rather than 0x00 by default (which is actually correct), and removed the FIC VIP-IO2 from the Dev branch. --- src/chipset/via_vt82c49x.c | 177 ++++++++++++++++++++++------------- src/chipset/via_vt82c505.c | 8 -- src/include/86box/machine.h | 2 - src/include/86box/sio.h | 1 + src/machine/m_at_386dx_486.c | 7 +- src/machine/machine_table.c | 2 - src/nvr_at.c | 2 +- src/sio/sio_w83787f.c | 68 +++++++++----- 8 files changed, 163 insertions(+), 104 deletions(-) diff --git a/src/chipset/via_vt82c49x.c b/src/chipset/via_vt82c49x.c index 4e27321f6..693791e0a 100644 --- a/src/chipset/via_vt82c49x.c +++ b/src/chipset/via_vt82c49x.c @@ -44,6 +44,7 @@ typedef struct *smram_high; } vt82c49x_t; + #ifdef ENABLE_VT82C49X_LOG int vt82c49x_do_log = ENABLE_VT82C49X_LOG; static void @@ -65,86 +66,125 @@ vt82c49x_log(const char *fmt, ...) static void vt82c49x_recalc(vt82c49x_t *dev) { - int i, state; - int relocate; - int wr_c0, wr_c8, wr_e8, wr_e0; - int rr_c0, rr_c8, rr_e8, rr_e0; - int wp_c0, wp_e0, wp_e8, wp_f; - uint32_t base; + int i, relocate; + uint8_t reg, bit; + uint32_t base, state; + uint32_t shadow_bitmap = 0x00000000; - /* Register 33h */ - wr_c8 = (dev->regs[0x33] & 0x80) ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL; - wr_c0 = (dev->regs[0x33] & 0x40) ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL; - wr_e8 = (dev->regs[0x33] & 0x20) ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL; - wr_e0 = (dev->regs[0x33] & 0x10) ? MEM_WRITE_EXTANY : MEM_WRITE_EXTERNAL; - rr_c8 = (dev->regs[0x33] & 0x80) ? MEM_READ_EXTANY : MEM_READ_EXTERNAL; - rr_c0 = (dev->regs[0x33] & 0x40) ? MEM_READ_EXTANY : MEM_READ_EXTERNAL; - rr_e8 = (dev->regs[0x33] & 0x20) ? MEM_READ_EXTANY : MEM_READ_EXTERNAL; - rr_e0 = (dev->regs[0x33] & 0x10) ? MEM_READ_EXTANY : MEM_READ_EXTERNAL; relocate = (dev->regs[0x33] >> 2) & 0x03; - /* Register 40h */ - wp_c0 = (dev->regs[0x40] & 0x80) ? wr_c0 : MEM_WRITE_INTERNAL; - wp_f = (dev->regs[0x40] & 0x40) ? MEM_WRITE_EXTANY : MEM_WRITE_INTERNAL; - wp_e8 = (dev->regs[0x40] & 0x20) ? wr_e8 : MEM_WRITE_INTERNAL; - wp_e0 = (dev->regs[0x40] & 0x20) ? wr_e0 : MEM_WRITE_INTERNAL; + shadowbios = 0; + shadowbios_write = 0; - /* Registers 30h-32h */ - if (relocate >= 2) { - mem_set_mem_state_both(0xc8000, 0x8000, wr_c8 | rr_c8); - mem_set_mem_state_both(0xc0000, 0x8000, wr_c0 | rr_c0); + for (i = 0; i < 8; i++) { + base = 0xc0000 + (i << 14); + reg = 0x30 + (i >> 2); + bit = (i & 3) << 1; - mem_set_mem_state_both(0xd0000, 0x10000, MEM_WRITE_EXTERNAL | MEM_READ_EXTERNAL); - } else for (i = 0; i < 8; i += 2) { - base = 0xc0000 + (i << 13); - if (base >= 0xc8000) { - state = (dev->regs[0x30] & i) ? MEM_WRITE_INTERNAL : wr_c8; - state |= (dev->regs[0x30] & (i + 1)) ? MEM_READ_INTERNAL : rr_c8; + if ((base >= 0xc0000) && (base <= 0xc7fff)) { + if (dev->regs[0x40] & 0x80) + state = MEM_WRITE_DISABLED; + else if ((dev->regs[reg]) & (1 << bit)) + state = MEM_WRITE_INTERNAL; + else + state = (dev->regs[0x33] & 0x40) ? MEM_WRITE_ROMCS : MEM_WRITE_EXTERNAL; + + if ((dev->regs[reg]) & (1 << (bit + 1))) + state |= MEM_READ_INTERNAL; + else + state |= (dev->regs[0x33] & 0x40) ? MEM_READ_ROMCS : MEM_READ_EXTERNAL; + } if ((base >= 0xc8000) && (base <= 0xcffff)) { + if ((dev->regs[reg]) & (1 << bit)) + state = MEM_WRITE_INTERNAL; + else + state = (dev->regs[0x33] & 0x80) ? MEM_WRITE_ROMCS : MEM_WRITE_EXTERNAL; + + if ((dev->regs[reg]) & (1 << (bit + 1))) + state |= MEM_READ_INTERNAL; + else + state |= (dev->regs[0x33] & 0x80) ? MEM_READ_ROMCS : MEM_READ_EXTERNAL; } else { - state = (dev->regs[0x30] & i) ? wp_c0 : wr_c0; - state |= (dev->regs[0x30] & (i + 1)) ? MEM_READ_INTERNAL : rr_c0; + state = ((dev->regs[reg]) & (1 << bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + state |= ((dev->regs[reg]) & (1 << (bit + 1))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; } - mem_set_mem_state_both(base, 0x4000, state); - base = 0xd0000 + (i << 13); - state = (dev->regs[0x31] & i) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTERNAL; - state |= (dev->regs[0x31] & (i + 1)) ? MEM_READ_INTERNAL : MEM_READ_EXTERNAL; + vt82c49x_log("(%02X=%02X, %i) Setting %08X-%08X to: write %sabled, read %sabled\n", + reg, dev->regs[reg], bit, base, base + 0x3fff, + ((dev->regs[reg]) & (1 << bit)) ? "en" : "dis", ((dev->regs[reg]) & (1 << (bit + 1))) ? "en" : "dis"); + + if ((dev->regs[reg]) & (1 << bit)) + shadow_bitmap |= (1 << i); + if ((dev->regs[reg]) & (1 << (bit + 1))) + shadow_bitmap |= (1 << (i + 16)); + mem_set_mem_state_both(base, 0x4000, state); } - state = (dev->regs[0x32] & 0x10) ? wp_f : MEM_WRITE_EXTANY; - state |= (dev->regs[0x32] & 0x20) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - shadowbios_write = (dev->regs[0x32] & 0x10) ? ((wp_f == MEM_WRITE_INTERNAL) ? 1 : 0) : 0; - shadowbios = (dev->regs[0x32] & 0x20) ? 1 : 0; - mem_set_mem_state_both(0xf0000, 0x10000, state); + for (i = 0; i < 4; i++) { + base = 0xe0000 + (i << 15); + bit = 6 - (i & 2); - if (relocate == 3) { - mem_set_mem_state_both(0xe8000, 0x8000, wr_e8 | rr_e8); - mem_set_mem_state_both(0xe0000, 0x8000, wr_e0 | rr_e0); - } else { - state = (dev->regs[0x32] & 0x40) ? wp_e8 : wr_e8; - state |= (dev->regs[0x32] & 0x80) ? MEM_READ_INTERNAL : rr_e8; - shadowbios_write |= (dev->regs[0x32] & 0x40) ? ((wp_e8 == MEM_WRITE_INTERNAL) ? 1 : 0) : 0; - shadowbios |= (dev->regs[0x32] & 0x80) ? 1 : 0; - mem_set_mem_state_both(0xe8000, 0x8000, state); + if ((base >= 0xe0000) && (base <= 0xe7fff)) { + if (dev->regs[0x40] & 0x20) + state = MEM_WRITE_DISABLED; + else if ((dev->regs[0x32]) & (1 << bit)) + state = MEM_WRITE_INTERNAL; + else + state = (dev->regs[0x33] & 0x10) ? MEM_WRITE_ROMCS : MEM_WRITE_EXTERNAL; - state = (dev->regs[0x32] & 0x40) ? wp_e0 : wr_e0; - state |= (dev->regs[0x32] & 0x80) ? MEM_READ_INTERNAL : rr_e0; - shadowbios_write |= (dev->regs[0x32] & 0x40) ? ((wp_e0 == MEM_WRITE_INTERNAL) ? 1 : 0) : 0; - shadowbios |= (dev->regs[0x32] & 0x80) ? 1 : 0; - mem_set_mem_state_both(0xe0000, 0x8000, state); + if ((dev->regs[0x32]) & (1 << (bit + 1))) + state = MEM_READ_INTERNAL; + else + state = (dev->regs[0x33] & 0x10) ? MEM_READ_ROMCS : MEM_READ_EXTERNAL; + } else if ((base >= 0xe8000) && (base <= 0xeffff)) { + if (dev->regs[0x40] & 0x20) + state = MEM_WRITE_DISABLED; + else if ((dev->regs[0x32]) & (1 << bit)) + state = MEM_WRITE_INTERNAL; + else + state = (dev->regs[0x33] & 0x20) ? MEM_WRITE_ROMCS : MEM_WRITE_EXTERNAL; + + if ((dev->regs[0x32]) & (1 << (bit + 1))) + state |= MEM_READ_INTERNAL; + else + state |= (dev->regs[0x33] & 0x20) ? MEM_READ_ROMCS : MEM_READ_EXTERNAL; + } else { + if (dev->regs[0x40] & 0x40) + state = MEM_WRITE_DISABLED; + else if ((dev->regs[0x32]) & (1 << bit)) + state = ((dev->regs[0x32]) & (1 << bit)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + + state |= ((dev->regs[0x32]) & (1 << (bit + 1))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + } + + vt82c49x_log("(32=%02X, %i) Setting %08X-%08X to: write %sabled, read %sabled\n", + dev->regs[0x32], bit, base, base + 0x7fff, + ((dev->regs[0x32]) & (1 << bit)) ? "en" : "dis", ((dev->regs[0x32]) & (1 << (bit + 1))) ? "en" : "dis"); + + if ((dev->regs[0x32]) & (1 << bit)) { + shadow_bitmap |= (0xf << ((i << 2) + 8)); + shadowbios_write |= 1; + } + if ((dev->regs[0x32]) & (1 << (bit + 1))) { + shadow_bitmap |= (0xf << ((i << 2) + 24)); + shadowbios |= 1; + } + + mem_set_mem_state_both(base, 0x8000, state); } + vt82c49x_log("Shadow bitmap: %08X\n", shadow_bitmap); + + mem_remap_top(0); + switch (relocate) { - case 0x00: - default: - mem_remap_top(0); - break; case 0x02: - mem_remap_top(256); + if (!(shadow_bitmap & 0xfff0fff0)) + mem_remap_top(256); break; case 0x03: - mem_remap_top(384); + if (!shadow_bitmap) + mem_remap_top(384); break; } } @@ -233,8 +273,8 @@ vt82c49x_write(uint16_t addr, uint8_t val, void *priv) ide_set_side(0, (val & 0x40) ? 0x376 : 0x3f6); if (val & 0x01) ide_pri_enable(); - pclog("VT82C496 IDE now %sabled as %sary\n", (val & 0x01) ? "en": "dis", - (val & 0x40) ? "second" : "prim"); + vt82c49x_log("VT82C496 IDE now %sabled as %sary\n", (val & 0x01) ? "en": "dis", + (val & 0x40) ? "second" : "prim"); } break; } @@ -251,7 +291,10 @@ vt82c49x_read(uint16_t addr, void *priv) switch (addr) { case 0xa9: - if (dev->index == 0x63) + /* Register 64h is jumper readout. */ + if (dev->index == 0x64) + ret = 0xff; + else if (dev->index == 0x63) ret = pic_elcr_read(dev->index, &pic2) | (dev->regs[dev->index] & 0x01); else if (dev->index == 0x62) ret = pic_elcr_read(dev->index, &pic) | (dev->regs[dev->index] & 0x07); @@ -298,8 +341,10 @@ vt82c49x_init(const device_t *info) dev->smram_high = smram_add(); dev->has_ide = info->local & 1; - if (dev->has_ide) - device_add(&ide_vlb_device); + if (dev->has_ide) { + device_add(&ide_vlb_2ch_device); + ide_sec_disable(); + } device_add(&port_92_device); diff --git a/src/chipset/via_vt82c505.c b/src/chipset/via_vt82c505.c index 7d49bd321..b9c7bd61f 100644 --- a/src/chipset/via_vt82c505.c +++ b/src/chipset/via_vt82c505.c @@ -44,8 +44,6 @@ vt82c505_write(int func, int addr, uint8_t val, void *priv) uint8_t irq; const uint8_t irq_array[8] = { 0, 5, 9, 10, 11, 14, 15, 0 }; - pclog("vt82c505_write(%02X, %02X, %02X)\n", func, addr, val); - if (func != 0) return; @@ -126,8 +124,6 @@ vt82c505_read(int func, int addr, void *priv) ret = dev->pci_conf[addr]; - pclog("vt82c505_read(%02X, %02X) = %02X\n", func, addr, ret); - return ret; } @@ -137,8 +133,6 @@ vt82c505_out(uint16_t addr, uint8_t val, void *priv) { vt82c505_t *dev = (vt82c505_t *) priv; - pclog("vt82c505_out(%04X, %02X)\n", addr, val); - if (addr == 0xa8) dev->index = val; else if ((addr == 0xa9) && (dev->index >= 0x80) && (dev->index <= 0x9f)) @@ -155,8 +149,6 @@ vt82c505_in(uint16_t addr, void *priv) if ((addr == 0xa9) && (dev->index >= 0x80) && (dev->index <= 0x9f)) ret = vt82c505_read(0, dev->index, priv); - pclog("vt82c505_in(%04X) = %02X\n", addr, ret); - return ret; } diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index aef77b213..c44ca1446 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -344,9 +344,7 @@ extern int machine_at_486sp3_init(const machine_t *); extern int machine_at_486sp3c_init(const machine_t *); extern int machine_at_486sp3g_init(const machine_t *); extern int machine_at_486ap4_init(const machine_t *); -#if defined(DEV_BRANCH) && defined(NO_SIO) extern int machine_at_486vipio2_init(const machine_t *); -#endif extern int machine_at_abpb4_init(const machine_t *); extern int machine_at_win486pci_init(const machine_t *); diff --git a/src/include/86box/sio.h b/src/include/86box/sio.h index 235999bda..4de9653aa 100644 --- a/src/include/86box/sio.h +++ b/src/include/86box/sio.h @@ -62,6 +62,7 @@ extern const device_t um8669f_device; extern const device_t via_vt82c686_sio_device; extern const device_t w83787f_device; extern const device_t w83787f_ide_device; +extern const device_t w83787f_ide_sec_device; extern const device_t w83877f_device; extern const device_t w83877f_president_device; extern const device_t w83877tf_device; diff --git a/src/machine/m_at_386dx_486.c b/src/machine/m_at_386dx_486.c index 1852f9846..805d41642 100644 --- a/src/machine/m_at_386dx_486.c +++ b/src/machine/m_at_386dx_486.c @@ -44,6 +44,7 @@ #include <86box/hwm.h> #include <86box/machine.h> + int machine_at_acc386_init(const machine_t *model) { @@ -1026,7 +1027,6 @@ machine_at_486ap4_init(const machine_t *model) } -#if defined(DEV_BRANCH) && defined(NO_SIO) int machine_at_486vipio2_init(const machine_t *model) { @@ -1049,13 +1049,12 @@ machine_at_486vipio2_init(const machine_t *model) device_add(&via_vt82c49x_pci_ide_device); device_add(&via_vt82c505_device); - device_add(&w83787f_device); - device_add(&keyboard_ps2_ami_device); + device_add(&w83787f_ide_sec_device); + device_add(&keyboard_ps2_ami_pci_device); device_add(&sst_flash_29ee010_device); return ret; } -#endif int diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index ef9bacb5e..dd48c17ad 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -249,9 +249,7 @@ const machine_t machines[] = { { "[STPC Consumer-II] Acrosser AR-B1479", "arb1479", MACHINE_TYPE_486, CPU_PKG_STPC, 0, 66666667, 66666667, 0, 0, 2.0, 2.0, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 32768, 163840, 8192, 255, machine_at_arb1479_init, NULL }, { "[STPC Elite] Advantech PCM-9340", "pcm9340", MACHINE_TYPE_486, CPU_PKG_STPC, 0, 66666667, 66666667, 0, 0, 2.0, 2.0, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 32768, 98304, 8192, 255, machine_at_pcm9340_init, NULL }, { "[STPC Atlas] AAEON PCM-5330", "pcm5330", MACHINE_TYPE_486, CPU_PKG_STPC, 0, 66666667, 66666667, 0, 0, 2.0, 2.0, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 32768, 131072,32768, 255, machine_at_pcm5330_init, NULL }, -#if defined(DEV_BRANCH) && defined(NO_SIO) { "[VIA VT82C496G] FIC VIP-IO2", "486vipio2", MACHINE_TYPE_486, CPU_PKG_SOCKET3, 0, 0, 0, 0, 0, 0, 0, MACHINE_PCIV | MACHINE_IDE_DUAL, 1024, 131072, 1024, 255, machine_at_486vipio2_init, NULL }, -#endif /* Socket 4 machines */ /* 430LX */ diff --git a/src/nvr_at.c b/src/nvr_at.c index 55d8ebbe4..7b695cfde 100644 --- a/src/nvr_at.c +++ b/src/nvr_at.c @@ -919,7 +919,7 @@ nvr_at_init(const device_t *info) nvr->size = machines[machine].nvrmask + 1; local->lock = (uint8_t *) malloc(nvr->size); memset(local->lock, 0x00, nvr->size); - local->def = 0x00; + local->def = 0xff /*0x00*/; local->flags = 0x00; switch(info->local & 7) { case 0: /* standard AT, no century register */ diff --git a/src/sio/sio_w83787f.c b/src/sio/sio_w83787f.c index 8bd2cd5c3..e95d77035 100644 --- a/src/sio/sio_w83787f.c +++ b/src/sio/sio_w83787f.c @@ -71,7 +71,7 @@ w83787_log(const char *fmt, ...) #define HEFERE ((dev->regs[0xC] >> 5) & 1) -#define HAS_IDE_FUNCTIONALITY dev->ide_function +#define HAS_IDE_FUNCTIONALITY dev->ide_function typedef struct { uint8_t tries, regs[42]; @@ -91,9 +91,9 @@ static uint8_t w83787f_read(uint16_t port, void *priv); static void w83787f_remap(w83787f_t *dev) { - io_removehandler(0x250, 0x0003, + io_removehandler(0x250, 0x0004, w83787f_read, NULL, NULL, w83787f_write, NULL, NULL, dev); - io_sethandler(0x250, 0x0003, + io_sethandler(0x250, 0x0004, w83787f_read, NULL, NULL, w83787f_write, NULL, NULL, dev); dev->key = 0x88 | HEFERE; } @@ -207,18 +207,28 @@ w83787f_fdc_handler(w83787f_t *dev) fdc_set_base(dev->fdc, (dev->regs[0] & 0x10) ? 0x03f0 : 0x0370); } + static void w83787f_ide_handler(w83787f_t *dev) { -ide_pri_disable(); -if(dev->regs[0] & 0x80) -{ - ide_set_base(0, (dev->regs[0] & 0x40) ? 0x1f0 : 0x170); - ide_set_side(0, (dev->regs[0] & 0x40) ? 0x3f6 : 0x376); - ide_pri_enable(); -} + if (dev->ide_function & 0x20) { + ide_sec_disable(); + if (!(dev->regs[0] & 0x80)) { + ide_set_base(1, (dev->regs[0] & 0x40) ? 0x1f0 : 0x170); + ide_set_side(1, (dev->regs[0] & 0x40) ? 0x3f6 : 0x376); + ide_sec_enable(); + } + } else { + ide_pri_disable(); + if (!(dev->regs[0] & 0x80)) { + ide_set_base(0, (dev->regs[0] & 0x40) ? 0x1f0 : 0x170); + ide_set_side(0, (dev->regs[0] & 0x40) ? 0x3f6 : 0x376); + ide_pri_enable(); + } + } } + static void w83787f_write(uint16_t port, uint8_t val, void *priv) { @@ -352,18 +362,25 @@ w83787f_reset(w83787f_t *dev) lpt1_init(0x378); lpt1_irq(7); - if(HAS_IDE_FUNCTIONALITY) - { - ide_pri_disable(); - ide_set_base(0, 0x1f0); - ide_set_side(0, 0x3f6); - ide_pri_enable(); + memset(dev->regs, 0, 0x2A); + + if (HAS_IDE_FUNCTIONALITY) { + if (dev->ide_function & 0x20) { + dev->regs[0x00] = 0x90; + ide_sec_disable(); + ide_set_base(1, 0x170); + ide_set_side(1, 0x376); + } else { + dev->regs[0x00] = 0xd0; + ide_pri_disable(); + ide_set_base(0, 0x1f0); + ide_set_side(0, 0x3f6); } + } else + dev->regs[0x00] = 0xd0; fdc_reset(dev->fdc); - memset(dev->regs, 0, 0x2A); - dev->regs[0x00] = 0x50; dev->regs[0x01] = 0x2C; dev->regs[0x03] = 0x30; dev->regs[0x07] = 0xF5; @@ -399,14 +416,14 @@ w83787f_init(const device_t *info) w83787f_t *dev = (w83787f_t *) malloc(sizeof(w83787f_t)); memset(dev, 0, sizeof(w83787f_t)); - HAS_IDE_FUNCTIONALITY = !!(info->local & 0x10); + HAS_IDE_FUNCTIONALITY = (info->local & 0x30); dev->fdc = device_add(&fdc_at_winbond_device); dev->uart[0] = device_add_inst(&ns16550_device, 1); dev->uart[1] = device_add_inst(&ns16550_device, 2); - if(HAS_IDE_FUNCTIONALITY) + if ((dev->ide_function & 0x30) == 0x10) device_add(&ide_isa_device); dev->reg_init = info->local & 0x0f; @@ -426,10 +443,19 @@ const device_t w83787f_device = { }; const device_t w83787f_ide_device = { - "Winbond W83787F/IF Super I/O with IDE functionality", + "Winbond W83787F/IF Super I/O (With IDE)", 0, 0x19, w83787f_init, w83787f_close, NULL, { NULL }, NULL, NULL, NULL }; + +const device_t w83787f_ide_sec_device = { + "Winbond W83787F/IF Super I/O (With Secondary IDE)", + 0, + 0x39, + w83787f_init, w83787f_close, NULL, + { NULL }, NULL, NULL, + NULL +};