Implemented the 256k wraparound on the ET4000/W32p;

The read and write bank addresses now follow the 256k wraparound - fixes scrolling in TSX on both the ET4000AX and the ET4000/W32p (needs further testing to make sure nothing is messed up by this).
This commit is contained in:
OBattler
2018-08-23 15:56:35 +02:00
parent b786b16bd1
commit 1895b31d27
2 changed files with 39 additions and 12 deletions

View File

@@ -8,7 +8,7 @@
* *
* Emulation of the Tseng Labs ET4000. * Emulation of the Tseng Labs ET4000.
* *
* Version: @(#)vid_et4000.c 1.0.10 2018/08/22 * Version: @(#)vid_et4000.c 1.0.11 2018/08/23
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -89,8 +89,11 @@ void et4000_out(uint16_t addr, uint8_t val, void *p)
return; return;
case 0x3CD: /*Banking*/ case 0x3CD: /*Banking*/
svga->write_bank = (val & 0xf) * 0x10000; if (!(svga->crtc[0x36] & 0x10)) {
svga->read_bank = ((val >> 4) & 0xf) * 0x10000; svga->write_bank = ((val & 0xf) * 0x10000) & svga->vram_display_mask;
svga->read_bank = (((val >> 4) & 0xf) * 0x10000) & svga->vram_display_mask;
pclog("write bank: %08X, read bank: %08X\n", svga->write_bank, svga->read_bank);
}
et4000->banking = val; et4000->banking = val;
return; return;
case 0x3D4: case 0x3D4:
@@ -105,8 +108,14 @@ void et4000_out(uint16_t addr, uint8_t val, void *p)
val &= crtc_mask[svga->crtcreg]; val &= crtc_mask[svga->crtcreg];
svga->crtc[svga->crtcreg] = val; svga->crtc[svga->crtcreg] = val;
if (svga->crtcreg == 0x36) if (svga->crtcreg == 0x36) {
svga->vram_display_mask = (val & 0x20) ? et4000->vram_mask : 0x3ffff; svga->vram_display_mask = (val & 0x20) ? et4000->vram_mask : 0x3ffff;
if (!(val & 0x10)) {
svga->write_bank = ((et4000->banking & 0xf) * 0x10000) & svga->vram_display_mask;
svga->read_bank = (((et4000->banking >> 4) & 0xf) * 0x10000) & svga->vram_display_mask;
} else
svga->write_bank = svga->read_bank = 0;
}
if (old != val) if (old != val)
{ {
@@ -118,7 +127,7 @@ void et4000_out(uint16_t addr, uint8_t val, void *p)
} }
/*Note - Silly hack to determine video memory size automatically by ET4000 BIOS.*/ /*Note - Silly hack to determine video memory size automatically by ET4000 BIOS.*/
if (svga->crtcreg == 0x37 && !et4000->is_mca) if ((svga->crtcreg == 0x37) && !et4000->is_mca)
{ {
switch(val & 0x0B) switch(val & 0x0B)
{ {
@@ -501,7 +510,11 @@ static device_config_t et4000_config[] =
.description = "Memory size", .description = "Memory size",
.type = CONFIG_SELECTION, .type = CONFIG_SELECTION,
.selection = .selection =
{ {
{
.description = "256 kB",
.value = 256
},
{ {
.description = "512 kB", .description = "512 kB",
.value = 512 .value = 512

View File

@@ -10,7 +10,7 @@
* *
* Known bugs: Accelerator doesn't work in planar modes * Known bugs: Accelerator doesn't work in planar modes
* *
* Version: @(#)vid_et4000w32.c 1.0.11 2018/07/16 * Version: @(#)vid_et4000w32.c 1.0.12 2018/08/23
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -96,6 +96,7 @@ typedef struct et4000w32p_t
int pci; int pci;
uint8_t regs[256]; uint8_t regs[256];
uint32_t linearbase, linearbase_old; uint32_t linearbase, linearbase_old;
uint32_t vram_mask;
uint8_t banking, banking2; uint8_t banking, banking2;
@@ -201,13 +202,17 @@ void et4000w32p_out(uint16_t addr, uint8_t val, void *p)
return; return;
case 0x3CB: /*Banking extension*/ case 0x3CB: /*Banking extension*/
svga->write_bank = (svga->write_bank & 0xfffff) | ((val & 1) << 20); if (!(svga->crtc[0x36] & 0x10)) {
svga->read_bank = (svga->read_bank & 0xfffff) | ((val & 0x10) << 16); svga->write_bank = ((svga->write_bank & 0xfffff) | ((val & 1) << 20)) & svga->vram_display_mask;
svga->read_bank = ((svga->read_bank & 0xfffff) | ((val & 0x10) << 16)) & svga->vram_display_mask;
}
et4000->banking2 = val; et4000->banking2 = val;
return; return;
case 0x3CD: /*Banking*/ case 0x3CD: /*Banking*/
svga->write_bank = (svga->write_bank & 0x100000) | ((val & 0xf) * 65536); if (!(svga->crtc[0x36] & 0x10)) {
svga->read_bank = (svga->read_bank & 0x100000) | (((val >> 4) & 0xf) * 65536); svga->write_bank = ((svga->write_bank & 0x100000) | ((val & 0xf) * 65536)) & svga->vram_display_mask;
svga->read_bank = ((svga->read_bank & 0x100000) | (((val >> 4) & 0xf) * 65536)) & svga->vram_display_mask;
}
et4000->banking = val; et4000->banking = val;
return; return;
case 0x3CF: case 0x3CF:
@@ -229,6 +234,14 @@ void et4000w32p_out(uint16_t addr, uint8_t val, void *p)
val = (svga->crtc[7] & ~0x10) | (val & 0x10); val = (svga->crtc[7] & ~0x10) | (val & 0x10);
old = svga->crtc[svga->crtcreg]; old = svga->crtc[svga->crtcreg];
svga->crtc[svga->crtcreg] = val; svga->crtc[svga->crtcreg] = val;
if (svga->crtcreg == 0x36) {
svga->vram_display_mask = (val & 0x28) ? et4000->vram_mask : 0x3ffff; /* Both bits 5 and 3 must be off for 256k wraparound. */
if (!(val & 0x10)) {
svga->write_bank = (((et4000->banking2 & 1) << 20) | ((et4000->banking & 0xf) * 65536)) & svga->vram_display_mask;
svga->read_bank = (((et4000->banking2 & 0x10) << 16) | (((et4000->banking >> 4) & 0xf) * 65536)) & svga->vram_display_mask;
} else
svga->write_bank = svga->read_bank = 0;
}
if (old != val) if (old != val)
{ {
if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) if (svga->crtcreg < 0xe || svga->crtcreg > 0x10)
@@ -1238,6 +1251,7 @@ void *et4000w32p_init(const device_t *info)
et4000w32p_in, et4000w32p_out, et4000w32p_in, et4000w32p_out,
et4000w32p_hwcursor_draw, et4000w32p_hwcursor_draw,
NULL); NULL);
et4000->vram_mask = (vram_size << 20) - 1;
et4000->type = info->local; et4000->type = info->local;