From 1a04b931656feb928fab4b73568b77679a8ce90b Mon Sep 17 00:00:00 2001 From: Alexander Babikov Date: Sat, 16 Oct 2021 23:50:49 +0500 Subject: [PATCH] Make MSR 17h read-only and return a suitable Platform ID Fixes some programs misidentifying Celeron Mendocinos as Slot 1 instead of Socket 370 --- src/cpu/cpu.c | 12 ++++-------- src/cpu/cpu.h | 1 - 2 files changed, 4 insertions(+), 9 deletions(-) diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 7021a83e4..3b04efe56 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -2310,8 +2310,10 @@ amd_k_invalid_rdmsr: if (cpu_s->cpu_type != CPU_PENTIUM2D) goto i686_invalid_rdmsr; - EAX = msr.ecx17 & 0xffffffff; - EDX = msr.ecx17 >> 32; + if (cpu_f->package == CPU_PKG_SLOT2) + EDX |= 0x80000; + else if (cpu_f->package == CPU_PKG_SOCKET370) + EDX |= 0x100000; break; case 0x1B: EAX = msr.apic_base & 0xffffffff; @@ -2725,12 +2727,6 @@ amd_k_invalid_wrmsr: case 0x10: tsc = EAX | ((uint64_t)EDX << 32); break; - case 0x17: - if (cpu_s->cpu_type != CPU_PENTIUM2D) - goto i686_invalid_wrmsr; - - msr.ecx17 = EAX | ((uint64_t)EDX << 32); - break; case 0x1b: cpu_log("APIC_BASE write: %08X%08X\n", EDX, EAX); // msr.apic_base = EAX | ((uint64_t)EDX << 32); diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index 9beac3fab..c9773ad67 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -236,7 +236,6 @@ typedef struct { uint32_t cesr; /* 0x00000011 */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ - uint64_t ecx17; /* 0x00000017 - Only on Pentium II Deschutes */ uint64_t apic_base; /* 0x0000001b - Should the Pentium not also have this? */ uint64_t ecx79; /* 0x00000079 */