diff --git a/src/cpu_common/386_ops.h b/src/cpu_common/386_ops.h index 04ea68150..8459607ff 100644 --- a/src/cpu_common/386_ops.h +++ b/src/cpu_common/386_ops.h @@ -226,8 +226,8 @@ extern void x386_dynarec_log(const char *fmt, ...); #include "x86_ops_shift.h" #ifdef USE_NEW_DYNAREC #include "x86_ops_amd.h" -#include "x86_ops_3dnow.h" #endif +#include "x86_ops_3dnow.h" static int op0F_w_a16(uint32_t fetchdat) @@ -636,7 +636,6 @@ const OpFn OP_TABLE(winchip_0f)[1024] = /*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL, }; -#ifdef USE_NEW_DYNAREC const OpFn OP_TABLE(winchip2_0f)[1024] = { /*16-bit data, 16-bit addr*/ @@ -727,7 +726,6 @@ const OpFn OP_TABLE(winchip2_0f)[1024] = /*e0*/ ILLEGAL, opPSRAW_a32, opPSRAD_a32, ILLEGAL, ILLEGAL, opPMULHW_a32, ILLEGAL, ILLEGAL, opPSUBSB_a32, opPSUBSW_a32, NULL, opPOR_a32, opPADDSB_a32, opPADDSW_a32, NULL, opPXOR_a32, /*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL, }; -#endif const OpFn OP_TABLE(pentium_0f)[1024] = { diff --git a/src/cpu_common/cpu.c b/src/cpu_common/cpu.c index daa65c94e..ec456a31b 100644 --- a/src/cpu_common/cpu.c +++ b/src/cpu_common/cpu.c @@ -76,13 +76,11 @@ enum { CPUID_FXSR = (1 << 24) }; -#ifdef USE_NEW_DYNAREC /*Addition flags returned by CPUID function 0x80000001*/ enum { CPUID_3DNOW = (1 << 31) }; -#endif #ifdef USE_DYNAREC @@ -131,9 +129,7 @@ const OpFn *x86_opcodes_df_a16; const OpFn *x86_opcodes_df_a32; const OpFn *x86_opcodes_REPE; const OpFn *x86_opcodes_REPNE; -#ifdef USE_NEW_DYNAREC const OpFn *x86_opcodes_3DNOW; -#endif int in_smm = 0, smi_line = 0, smi_latched = 0; uint32_t smbase = 0x30000; @@ -353,9 +349,7 @@ cpu_set(void) #endif x86_opcodes_REPE = ops_REPE; x86_opcodes_REPNE = ops_REPNE; -#ifdef USE_NEW_DYNAREC x86_opcodes_3DNOW = ops_3DNOW; -#endif #ifdef USE_DYNAREC x86_dynarec_opcodes_REPE = dynarec_ops_REPE; x86_dynarec_opcodes_REPNE = dynarec_ops_REPNE; @@ -1023,7 +1017,9 @@ cpu_set(void) timing_jmp_pm_gate = 17; timing_misaligned = 2; cpu_cyrix_alignment = 1; +#ifdef USE_DYNAREC codegen_timing_set(&codegen_timing_winchip2); +#endif break; #endif @@ -1604,17 +1600,9 @@ cpu_set(void) #endif case CPU_CYRIX3S: #ifdef USE_DYNAREC -#ifdef USE_NEW_DYNAREC x86_setopcodes(ops_386, ops_winchip2_0f, dynarec_ops_386, dynarec_ops_winchip2_0f); #else - x86_setopcodes(ops_386, ops_winchip_0f, dynarec_ops_386, dynarec_ops_winchip_0f); -#endif -#else -#ifdef USE_NEW_DYNAREC x86_setopcodes(ops_386, ops_winchip2_0f); -#else - x86_setopcodes(ops_386, ops_winchip_0f); -#endif #endif timing_rr = 1; /*register dest - register src*/ timing_rm = 2; /*register dest - memory src*/ @@ -1625,11 +1613,7 @@ cpu_set(void) timing_mml = 3; timing_bt = 3-1; /*branch taken*/ timing_bnt = 1; /*branch not taken*/ -#ifdef USE_NEW_DYNAREC cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MMX | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_3DNOW; -#else - cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MMX | CPU_FEATURE_MSR | CPU_FEATURE_CR4; -#endif msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 18) | (1 << 19) | (1 << 20) | (1 << 21); cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PCE; /*unknown*/ @@ -2374,10 +2358,8 @@ cpu_CPUID(void) EDX |= CPUID_CMPXCHG8B; if (msr.fcr & (1 << 9)) EDX |= CPUID_MMX; -#ifdef USE_NEW_DYNAREC if (cpu_has_feature(CPU_FEATURE_3DNOW)) EDX |= CPUID_3DNOW; -#endif break; case 0x80000002: /*Processor name string*/ diff --git a/src/cpu_common/x86_ops.h b/src/cpu_common/x86_ops.h index afbdafde7..9878629fa 100644 --- a/src/cpu_common/x86_ops.h +++ b/src/cpu_common/x86_ops.h @@ -70,9 +70,7 @@ extern const OpFn *x86_dynarec_opcodes_df_a16; extern const OpFn *x86_dynarec_opcodes_df_a32; extern const OpFn *x86_dynarec_opcodes_REPE; extern const OpFn *x86_dynarec_opcodes_REPNE; -#ifdef USE_NEW_DYNAREC extern const OpFn *x86_dynarec_opcodes_3DNOW; -#endif extern const OpFn dynarec_ops_286[1024]; extern const OpFn dynarec_ops_286_0f[1024]; @@ -83,9 +81,7 @@ extern const OpFn dynarec_ops_386_0f[1024]; extern const OpFn dynarec_ops_486_0f[1024]; extern const OpFn dynarec_ops_winchip_0f[1024]; -#ifdef USE_NEW_DYNAREC extern const OpFn dynarec_ops_winchip2_0f[1024]; -#endif extern const OpFn dynarec_ops_pentium_0f[1024]; extern const OpFn dynarec_ops_pentiummmx_0f[1024]; @@ -175,9 +171,7 @@ extern const OpFn *x86_opcodes_df_a16; extern const OpFn *x86_opcodes_df_a32; extern const OpFn *x86_opcodes_REPE; extern const OpFn *x86_opcodes_REPNE; -#ifdef USE_NEW_DYNAREC extern const OpFn *x86_opcodes_3DNOW; -#endif extern const OpFn ops_286[1024]; extern const OpFn ops_286_0f[1024]; @@ -188,9 +182,7 @@ extern const OpFn ops_386_0f[1024]; extern const OpFn ops_486_0f[1024]; extern const OpFn ops_winchip_0f[1024]; -#ifdef USE_NEW_DYNAREC extern const OpFn ops_winchip2_0f[1024]; -#endif extern const OpFn ops_pentium_0f[1024]; extern const OpFn ops_pentiummmx_0f[1024]; @@ -253,9 +245,7 @@ extern const OpFn ops_fpu_686_df_a32[256]; extern const OpFn ops_REPE[1024]; extern const OpFn ops_REPNE[1024]; -#ifdef USE_NEW_DYNAREC extern const OpFn ops_3DNOW[256]; -#endif #define C0 (1<<8) #define C1 (1<<9)