From 21e20f1ea209cccddf187078f2b8ddf1a341906c Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 16 Jul 2023 02:24:36 +0200 Subject: [PATCH] MMX clean-ups, part 1. --- src/cpu/x86_ops_mmx_arith.h | 1221 ++++++++++++++--------------------- src/cpu/x86_ops_mmx_cmp.h | 372 +++++------ src/cpu/x86_ops_mmx_logic.h | 112 ++-- src/cpu/x86_ops_mmx_mov.h | 462 ++++++------- src/cpu/x86_ops_mmx_pack.h | 672 +++++++++---------- src/cpu/x86_ops_mmx_shift.h | 854 ++++++++++-------------- 6 files changed, 1595 insertions(+), 2098 deletions(-) diff --git a/src/cpu/x86_ops_mmx_arith.h b/src/cpu/x86_ops_mmx_arith.h index 3077dbae0..3ebe960f9 100644 --- a/src/cpu/x86_ops_mmx_arith.h +++ b/src/cpu/x86_ops_mmx_arith.h @@ -1,76 +1,54 @@ static int opPADDB_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); - if (fpu_softfloat) { - dst.b[0] += src.b[0]; - dst.b[1] += src.b[1]; - dst.b[2] += src.b[2]; - dst.b[3] += src.b[3]; - dst.b[4] += src.b[4]; - dst.b[5] += src.b[5]; - dst.b[6] += src.b[6]; - dst.b[7] += src.b[7]; + dst->b[0] += src.b[0]; + dst->b[1] += src.b[1]; + dst->b[2] += src.b[2]; + dst->b[3] += src.b[3]; + dst->b[4] += src.b[4]; + dst->b[5] += src.b[5]; + dst->b[6] += src.b[6]; + dst->b[7] += src.b[7]; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] += src.b[0]; - cpu_state.MM[cpu_reg].b[1] += src.b[1]; - cpu_state.MM[cpu_reg].b[2] += src.b[2]; - cpu_state.MM[cpu_reg].b[3] += src.b[3]; - cpu_state.MM[cpu_reg].b[4] += src.b[4]; - cpu_state.MM[cpu_reg].b[5] += src.b[5]; - cpu_state.MM[cpu_reg].b[6] += src.b[6]; - cpu_state.MM[cpu_reg].b[7] += src.b[7]; - } return 0; } static int opPADDB_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); - if (fpu_softfloat) { - dst.b[0] += src.b[0]; - dst.b[1] += src.b[1]; - dst.b[2] += src.b[2]; - dst.b[3] += src.b[3]; - dst.b[4] += src.b[4]; - dst.b[5] += src.b[5]; - dst.b[6] += src.b[6]; - dst.b[7] += src.b[7]; + dst->b[0] += src.b[0]; + dst->b[1] += src.b[1]; + dst->b[2] += src.b[2]; + dst->b[3] += src.b[3]; + dst->b[4] += src.b[4]; + dst->b[5] += src.b[5]; + dst->b[6] += src.b[6]; + dst->b[7] += src.b[7]; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] += src.b[0]; - cpu_state.MM[cpu_reg].b[1] += src.b[1]; - cpu_state.MM[cpu_reg].b[2] += src.b[2]; - cpu_state.MM[cpu_reg].b[3] += src.b[3]; - cpu_state.MM[cpu_reg].b[4] += src.b[4]; - cpu_state.MM[cpu_reg].b[5] += src.b[5]; - cpu_state.MM[cpu_reg].b[6] += src.b[6]; - cpu_state.MM[cpu_reg].b[7] += src.b[7]; - } return 0; } @@ -78,111 +56,88 @@ opPADDB_a32(uint32_t fetchdat) static int opPADDW_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); - if (fpu_softfloat) { - dst.w[0] += src.w[0]; - dst.w[1] += src.w[1]; - dst.w[2] += src.w[2]; - dst.w[3] += src.w[3]; + dst->w[0] += src.w[0]; + dst->w[1] += src.w[1]; + dst->w[2] += src.w[2]; + dst->w[3] += src.w[3]; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] += src.w[0]; - cpu_state.MM[cpu_reg].w[1] += src.w[1]; - cpu_state.MM[cpu_reg].w[2] += src.w[2]; - cpu_state.MM[cpu_reg].w[3] += src.w[3]; - } + return 0; } static int opPADDW_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); - if (fpu_softfloat) { - dst.w[0] += src.w[0]; - dst.w[1] += src.w[1]; - dst.w[2] += src.w[2]; - dst.w[3] += src.w[3]; + dst->w[0] += src.w[0]; + dst->w[1] += src.w[1]; + dst->w[2] += src.w[2]; + dst->w[3] += src.w[3]; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] += src.w[0]; - cpu_state.MM[cpu_reg].w[1] += src.w[1]; - cpu_state.MM[cpu_reg].w[2] += src.w[2]; - cpu_state.MM[cpu_reg].w[3] += src.w[3]; - } return 0; } static int opPADDD_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); - if (fpu_softfloat) { - dst.l[0] += src.l[0]; - dst.l[1] += src.l[1]; + dst->l[0] += src.l[0]; + dst->l[1] += src.l[1]; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].l[0] += src.l[0]; - cpu_state.MM[cpu_reg].l[1] += src.l[1]; - } return 0; } static int opPADDD_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); - if (fpu_softfloat) { - dst.l[0] += src.l[0]; - dst.l[1] += src.l[1]; + dst->l[0] += src.l[0]; + dst->l[1] += src.l[1]; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].l[0] += src.l[0]; - cpu_state.MM[cpu_reg].l[1] += src.l[1]; - } return 0; } @@ -190,1073 +145,879 @@ opPADDD_a32(uint32_t fetchdat) static int opPADDSB_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.sb[0] = SSATB(dst.sb[0] + src.sb[0]); - dst.sb[1] = SSATB(dst.sb[1] + src.sb[1]); - dst.sb[2] = SSATB(dst.sb[2] + src.sb[2]); - dst.sb[3] = SSATB(dst.sb[3] + src.sb[3]); - dst.sb[4] = SSATB(dst.sb[4] + src.sb[4]); - dst.sb[5] = SSATB(dst.sb[5] + src.sb[5]); - dst.sb[6] = SSATB(dst.sb[6] + src.sb[6]); - dst.sb[7] = SSATB(dst.sb[7] + src.sb[7]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].sb[0] = SSATB(cpu_state.MM[cpu_reg].sb[0] + src.sb[0]); - cpu_state.MM[cpu_reg].sb[1] = SSATB(cpu_state.MM[cpu_reg].sb[1] + src.sb[1]); - cpu_state.MM[cpu_reg].sb[2] = SSATB(cpu_state.MM[cpu_reg].sb[2] + src.sb[2]); - cpu_state.MM[cpu_reg].sb[3] = SSATB(cpu_state.MM[cpu_reg].sb[3] + src.sb[3]); - cpu_state.MM[cpu_reg].sb[4] = SSATB(cpu_state.MM[cpu_reg].sb[4] + src.sb[4]); - cpu_state.MM[cpu_reg].sb[5] = SSATB(cpu_state.MM[cpu_reg].sb[5] + src.sb[5]); - cpu_state.MM[cpu_reg].sb[6] = SSATB(cpu_state.MM[cpu_reg].sb[6] + src.sb[6]); - cpu_state.MM[cpu_reg].sb[7] = SSATB(cpu_state.MM[cpu_reg].sb[7] + src.sb[7]); } + dst->sb[0] = SSATB(dst->sb[0] + src.sb[0]); + dst->sb[1] = SSATB(dst->sb[1] + src.sb[1]); + dst->sb[2] = SSATB(dst->sb[2] + src.sb[2]); + dst->sb[3] = SSATB(dst->sb[3] + src.sb[3]); + dst->sb[4] = SSATB(dst->sb[4] + src.sb[4]); + dst->sb[5] = SSATB(dst->sb[5] + src.sb[5]); + dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]); + dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPADDSB_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.sb[0] = SSATB(dst.sb[0] + src.sb[0]); - dst.sb[1] = SSATB(dst.sb[1] + src.sb[1]); - dst.sb[2] = SSATB(dst.sb[2] + src.sb[2]); - dst.sb[3] = SSATB(dst.sb[3] + src.sb[3]); - dst.sb[4] = SSATB(dst.sb[4] + src.sb[4]); - dst.sb[5] = SSATB(dst.sb[5] + src.sb[5]); - dst.sb[6] = SSATB(dst.sb[6] + src.sb[6]); - dst.sb[7] = SSATB(dst.sb[7] + src.sb[7]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].sb[0] = SSATB(cpu_state.MM[cpu_reg].sb[0] + src.sb[0]); - cpu_state.MM[cpu_reg].sb[1] = SSATB(cpu_state.MM[cpu_reg].sb[1] + src.sb[1]); - cpu_state.MM[cpu_reg].sb[2] = SSATB(cpu_state.MM[cpu_reg].sb[2] + src.sb[2]); - cpu_state.MM[cpu_reg].sb[3] = SSATB(cpu_state.MM[cpu_reg].sb[3] + src.sb[3]); - cpu_state.MM[cpu_reg].sb[4] = SSATB(cpu_state.MM[cpu_reg].sb[4] + src.sb[4]); - cpu_state.MM[cpu_reg].sb[5] = SSATB(cpu_state.MM[cpu_reg].sb[5] + src.sb[5]); - cpu_state.MM[cpu_reg].sb[6] = SSATB(cpu_state.MM[cpu_reg].sb[6] + src.sb[6]); - cpu_state.MM[cpu_reg].sb[7] = SSATB(cpu_state.MM[cpu_reg].sb[7] + src.sb[7]); } + dst->sb[0] = SSATB(dst->sb[0] + src.sb[0]); + dst->sb[1] = SSATB(dst->sb[1] + src.sb[1]); + dst->sb[2] = SSATB(dst->sb[2] + src.sb[2]); + dst->sb[3] = SSATB(dst->sb[3] + src.sb[3]); + dst->sb[4] = SSATB(dst->sb[4] + src.sb[4]); + dst->sb[5] = SSATB(dst->sb[5] + src.sb[5]); + dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]); + dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPADDUSB_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.b[0] = USATB(dst.b[0] + src.b[0]); - dst.b[1] = USATB(dst.b[1] + src.b[1]); - dst.b[2] = USATB(dst.b[2] + src.b[2]); - dst.b[3] = USATB(dst.b[3] + src.b[3]); - dst.b[4] = USATB(dst.b[4] + src.b[4]); - dst.b[5] = USATB(dst.b[5] + src.b[5]); - dst.b[6] = USATB(dst.b[6] + src.b[6]); - dst.b[7] = USATB(dst.b[7] + src.b[7]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] + src.b[0]); - cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] + src.b[1]); - cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] + src.b[2]); - cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] + src.b[3]); - cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] + src.b[4]); - cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] + src.b[5]); - cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] + src.b[6]); - cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] + src.b[7]); } + dst->b[0] = USATB(dst->b[0] + src.b[0]); + dst->b[1] = USATB(dst->b[1] + src.b[1]); + dst->b[2] = USATB(dst->b[2] + src.b[2]); + dst->b[3] = USATB(dst->b[3] + src.b[3]); + dst->b[4] = USATB(dst->b[4] + src.b[4]); + dst->b[5] = USATB(dst->b[5] + src.b[5]); + dst->b[6] = USATB(dst->b[6] + src.b[6]); + dst->b[7] = USATB(dst->b[7] + src.b[7]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPADDUSB_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.b[0] = USATB(dst.b[0] + src.b[0]); - dst.b[1] = USATB(dst.b[1] + src.b[1]); - dst.b[2] = USATB(dst.b[2] + src.b[2]); - dst.b[3] = USATB(dst.b[3] + src.b[3]); - dst.b[4] = USATB(dst.b[4] + src.b[4]); - dst.b[5] = USATB(dst.b[5] + src.b[5]); - dst.b[6] = USATB(dst.b[6] + src.b[6]); - dst.b[7] = USATB(dst.b[7] + src.b[7]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] + src.b[0]); - cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] + src.b[1]); - cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] + src.b[2]); - cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] + src.b[3]); - cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] + src.b[4]); - cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] + src.b[5]); - cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] + src.b[6]); - cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] + src.b[7]); } + dst->b[0] = USATB(dst->b[0] + src.b[0]); + dst->b[1] = USATB(dst->b[1] + src.b[1]); + dst->b[2] = USATB(dst->b[2] + src.b[2]); + dst->b[3] = USATB(dst->b[3] + src.b[3]); + dst->b[4] = USATB(dst->b[4] + src.b[4]); + dst->b[5] = USATB(dst->b[5] + src.b[5]); + dst->b[6] = USATB(dst->b[6] + src.b[6]); + dst->b[7] = USATB(dst->b[7] + src.b[7]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPADDSW_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.sw[0] = SSATW(dst.sw[0] + src.sw[0]); - dst.sw[1] = SSATW(dst.sw[1] + src.sw[1]); - dst.sw[2] = SSATW(dst.sw[2] + src.sw[2]); - dst.sw[3] = SSATW(dst.sw[3] + src.sw[3]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].sw[0] = SSATW(cpu_state.MM[cpu_reg].sw[0] + src.sw[0]); - cpu_state.MM[cpu_reg].sw[1] = SSATW(cpu_state.MM[cpu_reg].sw[1] + src.sw[1]); - cpu_state.MM[cpu_reg].sw[2] = SSATW(cpu_state.MM[cpu_reg].sw[2] + src.sw[2]); - cpu_state.MM[cpu_reg].sw[3] = SSATW(cpu_state.MM[cpu_reg].sw[3] + src.sw[3]); } + dst->sw[0] = SSATW(dst->sw[0] + src.sw[0]); + dst->sw[1] = SSATW(dst->sw[1] + src.sw[1]); + dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]); + dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPADDSW_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.sw[0] = SSATW(dst.sw[0] + src.sw[0]); - dst.sw[1] = SSATW(dst.sw[1] + src.sw[1]); - dst.sw[2] = SSATW(dst.sw[2] + src.sw[2]); - dst.sw[3] = SSATW(dst.sw[3] + src.sw[3]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].sw[0] = SSATW(cpu_state.MM[cpu_reg].sw[0] + src.sw[0]); - cpu_state.MM[cpu_reg].sw[1] = SSATW(cpu_state.MM[cpu_reg].sw[1] + src.sw[1]); - cpu_state.MM[cpu_reg].sw[2] = SSATW(cpu_state.MM[cpu_reg].sw[2] + src.sw[2]); - cpu_state.MM[cpu_reg].sw[3] = SSATW(cpu_state.MM[cpu_reg].sw[3] + src.sw[3]); } + dst->sw[0] = SSATW(dst->sw[0] + src.sw[0]); + dst->sw[1] = SSATW(dst->sw[1] + src.sw[1]); + dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]); + dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPADDUSW_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.w[0] = USATW(dst.w[0] + src.w[0]); - dst.w[1] = USATW(dst.w[1] + src.w[1]); - dst.w[2] = USATW(dst.w[2] + src.w[2]); - dst.w[3] = USATW(dst.w[3] + src.w[3]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] = USATW(cpu_state.MM[cpu_reg].w[0] + src.w[0]); - cpu_state.MM[cpu_reg].w[1] = USATW(cpu_state.MM[cpu_reg].w[1] + src.w[1]); - cpu_state.MM[cpu_reg].w[2] = USATW(cpu_state.MM[cpu_reg].w[2] + src.w[2]); - cpu_state.MM[cpu_reg].w[3] = USATW(cpu_state.MM[cpu_reg].w[3] + src.w[3]); } + dst->w[0] = USATW(dst->w[0] + src.w[0]); + dst->w[1] = USATW(dst->w[1] + src.w[1]); + dst->w[2] = USATW(dst->w[2] + src.w[2]); + dst->w[3] = USATW(dst->w[3] + src.w[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPADDUSW_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.w[0] = USATW(dst.w[0] + src.w[0]); - dst.w[1] = USATW(dst.w[1] + src.w[1]); - dst.w[2] = USATW(dst.w[2] + src.w[2]); - dst.w[3] = USATW(dst.w[3] + src.w[3]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] = USATW(cpu_state.MM[cpu_reg].w[0] + src.w[0]); - cpu_state.MM[cpu_reg].w[1] = USATW(cpu_state.MM[cpu_reg].w[1] + src.w[1]); - cpu_state.MM[cpu_reg].w[2] = USATW(cpu_state.MM[cpu_reg].w[2] + src.w[2]); - cpu_state.MM[cpu_reg].w[3] = USATW(cpu_state.MM[cpu_reg].w[3] + src.w[3]); } + dst->w[0] = USATW(dst->w[0] + src.w[0]); + dst->w[1] = USATW(dst->w[1] + src.w[1]); + dst->w[2] = USATW(dst->w[2] + src.w[2]); + dst->w[3] = USATW(dst->w[3] + src.w[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPMADDWD_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - if (dst.l[0] == 0x80008000 && src.l[0] == 0x80008000) - dst.l[0] = 0x80000000; - else - dst.sl[0] = ((int32_t) dst.sw[0] * (int32_t) src.sw[0]) + ((int32_t) dst.sw[1] * (int32_t) src.sw[1]); - - if (dst.l[1] == 0x80008000 && src.l[1] == 0x80008000) - dst.l[1] = 0x80000000; - else - dst.sl[1] = ((int32_t) dst.sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst.sw[3] * (int32_t) src.sw[3]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - if (cpu_state.MM[cpu_reg].l[0] == 0x80008000 && src.l[0] == 0x80008000) - cpu_state.MM[cpu_reg].l[0] = 0x80000000; - else - cpu_state.MM[cpu_reg].sl[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) + ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]); - - if (cpu_state.MM[cpu_reg].l[1] == 0x80008000 && src.l[1] == 0x80008000) - cpu_state.MM[cpu_reg].l[1] = 0x80000000; - else - cpu_state.MM[cpu_reg].sl[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) + ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]); } + if (dst->l[0] == 0x80008000 && src.l[0] == 0x80008000) + dst->l[0] = 0x80000000; + else + dst->sl[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) + ((int32_t) dst->sw[1] * (int32_t) src.sw[1]); + + if (dst->l[1] == 0x80008000 && src.l[1] == 0x80008000) + dst->l[1] = 0x80000000; + else + dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPMADDWD_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - if (dst.l[0] == 0x80008000 && src.l[0] == 0x80008000) - dst.l[0] = 0x80000000; - else - dst.sl[0] = ((int32_t) dst.sw[0] * (int32_t) src.sw[0]) + ((int32_t) dst.sw[1] * (int32_t) src.sw[1]); - - if (dst.l[1] == 0x80008000 && src.l[1] == 0x80008000) - dst.l[1] = 0x80000000; - else - dst.sl[1] = ((int32_t) dst.sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst.sw[3] * (int32_t) src.sw[3]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - if (cpu_state.MM[cpu_reg].l[0] == 0x80008000 && src.l[0] == 0x80008000) - cpu_state.MM[cpu_reg].l[0] = 0x80000000; - else - cpu_state.MM[cpu_reg].sl[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) + ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]); - - if (cpu_state.MM[cpu_reg].l[1] == 0x80008000 && src.l[1] == 0x80008000) - cpu_state.MM[cpu_reg].l[1] = 0x80000000; - else - cpu_state.MM[cpu_reg].sl[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) + ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]); } + if (dst->l[0] == 0x80008000 && src.l[0] == 0x80008000) + dst->l[0] = 0x80000000; + else + dst->sl[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) + ((int32_t) dst->sw[1] * (int32_t) src.sw[1]); + + if (dst->l[1] == 0x80008000 && src.l[1] == 0x80008000) + dst->l[1] = 0x80000000; + else + dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPMULLW_a16(uint32_t fetchdat) { - uint32_t p1, p2, p3, p4; - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - - MMX_GETSRC(); - fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - p1 = (uint32_t)(dst.w[0]) * (uint32_t)(src.w[0]); - p2 = (uint32_t)(dst.w[1]) * (uint32_t)(src.w[1]); - p3 = (uint32_t)(dst.w[2]) * (uint32_t)(src.w[2]); - p4 = (uint32_t)(dst.w[3]) * (uint32_t)(src.w[3]); - - dst.w[0] = p1 & 0xffff; - dst.w[1] = p2 & 0xffff; - dst.w[2] = p3 & 0xffff; - dst.w[3] = p4 & 0xffff; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].w[0] *= cpu_state.MM[cpu_rm].w[0]; - cpu_state.MM[cpu_reg].w[1] *= cpu_state.MM[cpu_rm].w[1]; - cpu_state.MM[cpu_reg].w[2] *= cpu_state.MM[cpu_rm].w[2]; - cpu_state.MM[cpu_reg].w[3] *= cpu_state.MM[cpu_rm].w[3]; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - src.l[0] = readmeml(easeg, cpu_state.eaaddr); - src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); - if (cpu_state.abrt) - return 0; - cpu_state.MM[cpu_reg].w[0] *= src.w[0]; - cpu_state.MM[cpu_reg].w[1] *= src.w[1]; - cpu_state.MM[cpu_reg].w[2] *= src.w[2]; - cpu_state.MM[cpu_reg].w[3] *= src.w[3]; - CLOCK_CYCLES(2); - } } + + if (cpu_mod == 3) + src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm]; + else { + SEG_CHECK_READ(cpu_state.ea_seg); + src.l[0] = readmeml(easeg, cpu_state.eaaddr); + src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); + if (cpu_state.abrt) + return 0; + CLOCK_CYCLES(1); + } + dst->w[0] *= src.w[0]; + dst->w[1] *= src.w[1]; + dst->w[2] *= src.w[2]; + dst->w[3] *= src.w[3]; + CLOCK_CYCLES(1); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPMULLW_a32(uint32_t fetchdat) { - uint32_t p1, p2, p3, p4; - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - - MMX_GETSRC(); - fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - p1 = (uint32_t)(dst.w[0]) * (uint32_t)(src.w[0]); - p2 = (uint32_t)(dst.w[1]) * (uint32_t)(src.w[1]); - p3 = (uint32_t)(dst.w[2]) * (uint32_t)(src.w[2]); - p4 = (uint32_t)(dst.w[3]) * (uint32_t)(src.w[3]); - - dst.w[0] = p1 & 0xffff; - dst.w[1] = p2 & 0xffff; - dst.w[2] = p3 & 0xffff; - dst.w[3] = p4 & 0xffff; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].w[0] *= cpu_state.MM[cpu_rm].w[0]; - cpu_state.MM[cpu_reg].w[1] *= cpu_state.MM[cpu_rm].w[1]; - cpu_state.MM[cpu_reg].w[2] *= cpu_state.MM[cpu_rm].w[2]; - cpu_state.MM[cpu_reg].w[3] *= cpu_state.MM[cpu_rm].w[3]; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - src.l[0] = readmeml(easeg, cpu_state.eaaddr); - src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); - if (cpu_state.abrt) - return 0; - cpu_state.MM[cpu_reg].w[0] *= src.w[0]; - cpu_state.MM[cpu_reg].w[1] *= src.w[1]; - cpu_state.MM[cpu_reg].w[2] *= src.w[2]; - cpu_state.MM[cpu_reg].w[3] *= src.w[3]; - CLOCK_CYCLES(2); - } } + + if (cpu_mod == 3) + src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm]; + else { + SEG_CHECK_READ(cpu_state.ea_seg); + src.l[0] = readmeml(easeg, cpu_state.eaaddr); + src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); + if (cpu_state.abrt) + return 0; + CLOCK_CYCLES(1); + } + dst->w[0] *= src.w[0]; + dst->w[1] *= src.w[1]; + dst->w[2] *= src.w[2]; + dst->w[3] *= src.w[3]; + CLOCK_CYCLES(1); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPMULHW_a16(uint32_t fetchdat) { - int32_t p1, p2, p3, p4; - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - - MMX_GETSRC(); - fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - p1 = (int32_t)(dst.w[0]) * (int32_t)(src.sw[0]); - p2 = (int32_t)(dst.w[1]) * (int32_t)(src.sw[1]); - p3 = (int32_t)(dst.w[2]) * (int32_t)(src.sw[2]); - p4 = (int32_t)(dst.w[3]) * (int32_t)(src.sw[3]); - - dst.w[0] = (uint16_t)(p1 >> 16); - dst.w[1] = (uint16_t)(p2 >> 16); - dst.w[2] = (uint16_t)(p3 >> 16); - dst.w[3] = (uint16_t)(p4 >> 16); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].w[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) cpu_state.MM[cpu_rm].sw[0]) >> 16; - cpu_state.MM[cpu_reg].w[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) cpu_state.MM[cpu_rm].sw[1]) >> 16; - cpu_state.MM[cpu_reg].w[2] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) cpu_state.MM[cpu_rm].sw[2]) >> 16; - cpu_state.MM[cpu_reg].w[3] = ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) cpu_state.MM[cpu_rm].sw[3]) >> 16; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - src.l[0] = readmeml(easeg, cpu_state.eaaddr); - src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); - if (cpu_state.abrt) - return 0; - cpu_state.MM[cpu_reg].w[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) >> 16; - cpu_state.MM[cpu_reg].w[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]) >> 16; - cpu_state.MM[cpu_reg].w[2] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) >> 16; - cpu_state.MM[cpu_reg].w[3] = ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]) >> 16; - CLOCK_CYCLES(2); - } } + + if (cpu_mod == 3) + src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm]; + else { + SEG_CHECK_READ(cpu_state.ea_seg); + src.l[0] = readmeml(easeg, cpu_state.eaaddr); + src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); + if (cpu_state.abrt) + return 0; + CLOCK_CYCLES(1); + } + dst->w[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) >> 16; + dst->w[1] = ((int32_t) dst->sw[1] * (int32_t) src.sw[1]) >> 16; + dst->w[2] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) >> 16; + dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16; + CLOCK_CYCLES(1); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPMULHW_a32(uint32_t fetchdat) { - int32_t p1, p2, p3, p4; - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - - MMX_GETSRC(); - fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - p1 = (int32_t)(dst.w[0]) * (int32_t)(src.sw[0]); - p2 = (int32_t)(dst.w[1]) * (int32_t)(src.sw[1]); - p3 = (int32_t)(dst.w[2]) * (int32_t)(src.sw[2]); - p4 = (int32_t)(dst.w[3]) * (int32_t)(src.sw[3]); - - dst.w[0] = (uint16_t)(p1 >> 16); - dst.w[1] = (uint16_t)(p2 >> 16); - dst.w[2] = (uint16_t)(p3 >> 16); - dst.w[3] = (uint16_t)(p4 >> 16); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].w[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) cpu_state.MM[cpu_rm].sw[0]) >> 16; - cpu_state.MM[cpu_reg].w[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) cpu_state.MM[cpu_rm].sw[1]) >> 16; - cpu_state.MM[cpu_reg].w[2] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) cpu_state.MM[cpu_rm].sw[2]) >> 16; - cpu_state.MM[cpu_reg].w[3] = ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) cpu_state.MM[cpu_rm].sw[3]) >> 16; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - src.l[0] = readmeml(easeg, cpu_state.eaaddr); - src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); - if (cpu_state.abrt) - return 0; - cpu_state.MM[cpu_reg].w[0] = ((int32_t) cpu_state.MM[cpu_reg].sw[0] * (int32_t) src.sw[0]) >> 16; - cpu_state.MM[cpu_reg].w[1] = ((int32_t) cpu_state.MM[cpu_reg].sw[1] * (int32_t) src.sw[1]) >> 16; - cpu_state.MM[cpu_reg].w[2] = ((int32_t) cpu_state.MM[cpu_reg].sw[2] * (int32_t) src.sw[2]) >> 16; - cpu_state.MM[cpu_reg].w[3] = ((int32_t) cpu_state.MM[cpu_reg].sw[3] * (int32_t) src.sw[3]) >> 16; - CLOCK_CYCLES(2); - } } + + if (cpu_mod == 3) + src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm]; + else { + SEG_CHECK_READ(cpu_state.ea_seg); + src.l[0] = readmeml(easeg, cpu_state.eaaddr); + src.l[1] = readmeml(easeg, cpu_state.eaaddr + 4); + if (cpu_state.abrt) + return 0; + CLOCK_CYCLES(1); + } + dst->w[0] = ((int32_t) dst->sw[0] * (int32_t) src.sw[0]) >> 16; + dst->w[1] = ((int32_t) dst->sw[1] * (int32_t) src.sw[1]) >> 16; + dst->w[2] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) >> 16; + dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16; + CLOCK_CYCLES(1); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBB_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.b[0] -= src.b[0]; - dst.b[1] -= src.b[1]; - dst.b[2] -= src.b[2]; - dst.b[3] -= src.b[3]; - dst.b[4] -= src.b[4]; - dst.b[5] -= src.b[5]; - dst.b[6] -= src.b[6]; - dst.b[7] -= src.b[7]; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] -= src.b[0]; - cpu_state.MM[cpu_reg].b[1] -= src.b[1]; - cpu_state.MM[cpu_reg].b[2] -= src.b[2]; - cpu_state.MM[cpu_reg].b[3] -= src.b[3]; - cpu_state.MM[cpu_reg].b[4] -= src.b[4]; - cpu_state.MM[cpu_reg].b[5] -= src.b[5]; - cpu_state.MM[cpu_reg].b[6] -= src.b[6]; - cpu_state.MM[cpu_reg].b[7] -= src.b[7]; } + + dst->b[0] -= src.b[0]; + dst->b[1] -= src.b[1]; + dst->b[2] -= src.b[2]; + dst->b[3] -= src.b[3]; + dst->b[4] -= src.b[4]; + dst->b[5] -= src.b[5]; + dst->b[6] -= src.b[6]; + dst->b[7] -= src.b[7]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBB_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.b[0] -= src.b[0]; - dst.b[1] -= src.b[1]; - dst.b[2] -= src.b[2]; - dst.b[3] -= src.b[3]; - dst.b[4] -= src.b[4]; - dst.b[5] -= src.b[5]; - dst.b[6] -= src.b[6]; - dst.b[7] -= src.b[7]; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] -= src.b[0]; - cpu_state.MM[cpu_reg].b[1] -= src.b[1]; - cpu_state.MM[cpu_reg].b[2] -= src.b[2]; - cpu_state.MM[cpu_reg].b[3] -= src.b[3]; - cpu_state.MM[cpu_reg].b[4] -= src.b[4]; - cpu_state.MM[cpu_reg].b[5] -= src.b[5]; - cpu_state.MM[cpu_reg].b[6] -= src.b[6]; - cpu_state.MM[cpu_reg].b[7] -= src.b[7]; } + + dst->b[0] -= src.b[0]; + dst->b[1] -= src.b[1]; + dst->b[2] -= src.b[2]; + dst->b[3] -= src.b[3]; + dst->b[4] -= src.b[4]; + dst->b[5] -= src.b[5]; + dst->b[6] -= src.b[6]; + dst->b[7] -= src.b[7]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBW_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.w[0] -= src.w[0]; - dst.w[1] -= src.w[1]; - dst.w[2] -= src.w[2]; - dst.w[3] -= src.w[3]; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] -= src.w[0]; - cpu_state.MM[cpu_reg].w[1] -= src.w[1]; - cpu_state.MM[cpu_reg].w[2] -= src.w[2]; - cpu_state.MM[cpu_reg].w[3] -= src.w[3]; } + + dst->w[0] -= src.w[0]; + dst->w[1] -= src.w[1]; + dst->w[2] -= src.w[2]; + dst->w[3] -= src.w[3]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBW_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.w[0] -= src.w[0]; - dst.w[1] -= src.w[1]; - dst.w[2] -= src.w[2]; - dst.w[3] -= src.w[3]; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] -= src.w[0]; - cpu_state.MM[cpu_reg].w[1] -= src.w[1]; - cpu_state.MM[cpu_reg].w[2] -= src.w[2]; - cpu_state.MM[cpu_reg].w[3] -= src.w[3]; } + + dst->w[0] -= src.w[0]; + dst->w[1] -= src.w[1]; + dst->w[2] -= src.w[2]; + dst->w[3] -= src.w[3]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBD_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.l[0] -= src.l[0]; - dst.l[1] -= src.l[1]; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].l[0] -= src.l[0]; - cpu_state.MM[cpu_reg].l[1] -= src.l[1]; } + + dst->l[0] -= src.l[0]; + dst->l[1] -= src.l[1]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBD_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.l[0] -= src.l[0]; - dst.l[1] -= src.l[1]; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].l[0] -= src.l[0]; - cpu_state.MM[cpu_reg].l[1] -= src.l[1]; } + + dst->l[0] -= src.l[0]; + dst->l[1] -= src.l[1]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBSB_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.sb[0] = SSATB(dst.sb[0] - src.sb[0]); - dst.sb[1] = SSATB(dst.sb[1] - src.sb[1]); - dst.sb[2] = SSATB(dst.sb[2] - src.sb[2]); - dst.sb[3] = SSATB(dst.sb[3] - src.sb[3]); - dst.sb[4] = SSATB(dst.sb[4] - src.sb[4]); - dst.sb[5] = SSATB(dst.sb[5] - src.sb[5]); - dst.sb[6] = SSATB(dst.sb[6] - src.sb[6]); - dst.sb[7] = SSATB(dst.sb[7] - src.sb[7]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].sb[0] = SSATB(cpu_state.MM[cpu_reg].sb[0] - src.sb[0]); - cpu_state.MM[cpu_reg].sb[1] = SSATB(cpu_state.MM[cpu_reg].sb[1] - src.sb[1]); - cpu_state.MM[cpu_reg].sb[2] = SSATB(cpu_state.MM[cpu_reg].sb[2] - src.sb[2]); - cpu_state.MM[cpu_reg].sb[3] = SSATB(cpu_state.MM[cpu_reg].sb[3] - src.sb[3]); - cpu_state.MM[cpu_reg].sb[4] = SSATB(cpu_state.MM[cpu_reg].sb[4] - src.sb[4]); - cpu_state.MM[cpu_reg].sb[5] = SSATB(cpu_state.MM[cpu_reg].sb[5] - src.sb[5]); - cpu_state.MM[cpu_reg].sb[6] = SSATB(cpu_state.MM[cpu_reg].sb[6] - src.sb[6]); - cpu_state.MM[cpu_reg].sb[7] = SSATB(cpu_state.MM[cpu_reg].sb[7] - src.sb[7]); } + + dst->sb[0] = SSATB(dst->sb[0] - src.sb[0]); + dst->sb[1] = SSATB(dst->sb[1] - src.sb[1]); + dst->sb[2] = SSATB(dst->sb[2] - src.sb[2]); + dst->sb[3] = SSATB(dst->sb[3] - src.sb[3]); + dst->sb[4] = SSATB(dst->sb[4] - src.sb[4]); + dst->sb[5] = SSATB(dst->sb[5] - src.sb[5]); + dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]); + dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBSB_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.sb[0] = SSATB(dst.sb[0] - src.sb[0]); - dst.sb[1] = SSATB(dst.sb[1] - src.sb[1]); - dst.sb[2] = SSATB(dst.sb[2] - src.sb[2]); - dst.sb[3] = SSATB(dst.sb[3] - src.sb[3]); - dst.sb[4] = SSATB(dst.sb[4] - src.sb[4]); - dst.sb[5] = SSATB(dst.sb[5] - src.sb[5]); - dst.sb[6] = SSATB(dst.sb[6] - src.sb[6]); - dst.sb[7] = SSATB(dst.sb[7] - src.sb[7]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].sb[0] = SSATB(cpu_state.MM[cpu_reg].sb[0] - src.sb[0]); - cpu_state.MM[cpu_reg].sb[1] = SSATB(cpu_state.MM[cpu_reg].sb[1] - src.sb[1]); - cpu_state.MM[cpu_reg].sb[2] = SSATB(cpu_state.MM[cpu_reg].sb[2] - src.sb[2]); - cpu_state.MM[cpu_reg].sb[3] = SSATB(cpu_state.MM[cpu_reg].sb[3] - src.sb[3]); - cpu_state.MM[cpu_reg].sb[4] = SSATB(cpu_state.MM[cpu_reg].sb[4] - src.sb[4]); - cpu_state.MM[cpu_reg].sb[5] = SSATB(cpu_state.MM[cpu_reg].sb[5] - src.sb[5]); - cpu_state.MM[cpu_reg].sb[6] = SSATB(cpu_state.MM[cpu_reg].sb[6] - src.sb[6]); - cpu_state.MM[cpu_reg].sb[7] = SSATB(cpu_state.MM[cpu_reg].sb[7] - src.sb[7]); } + + dst->sb[0] = SSATB(dst->sb[0] - src.sb[0]); + dst->sb[1] = SSATB(dst->sb[1] - src.sb[1]); + dst->sb[2] = SSATB(dst->sb[2] - src.sb[2]); + dst->sb[3] = SSATB(dst->sb[3] - src.sb[3]); + dst->sb[4] = SSATB(dst->sb[4] - src.sb[4]); + dst->sb[5] = SSATB(dst->sb[5] - src.sb[5]); + dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]); + dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBUSB_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }, result; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - result.q = 0; - - result.b[0] = USATB(dst.b[0] - src.b[0]); - result.b[1] = USATB(dst.b[1] - src.b[1]); - result.b[2] = USATB(dst.b[2] - src.b[2]); - result.b[3] = USATB(dst.b[3] - src.b[3]); - result.b[4] = USATB(dst.b[4] - src.b[4]); - result.b[5] = USATB(dst.b[5] - src.b[5]); - result.b[6] = USATB(dst.b[6] - src.b[6]); - result.b[7] = USATB(dst.b[7] - src.b[7]); - - fpu_state.st_space[cpu_reg].fraction = result.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] - src.b[0]); - cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] - src.b[1]); - cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] - src.b[2]); - cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] - src.b[3]); - cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] - src.b[4]); - cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] - src.b[5]); - cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] - src.b[6]); - cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] - src.b[7]); } + + dst->b[0] = USATB(dst->b[0] - src.b[0]); + dst->b[1] = USATB(dst->b[1] - src.b[1]); + dst->b[2] = USATB(dst->b[2] - src.b[2]); + dst->b[3] = USATB(dst->b[3] - src.b[3]); + dst->b[4] = USATB(dst->b[4] - src.b[4]); + dst->b[5] = USATB(dst->b[5] - src.b[5]); + dst->b[6] = USATB(dst->b[6] - src.b[6]); + dst->b[7] = USATB(dst->b[7] - src.b[7]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBUSB_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }, result; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - result.q = 0; - - result.b[0] = USATB(dst.b[0] - src.b[0]); - result.b[1] = USATB(dst.b[1] - src.b[1]); - result.b[2] = USATB(dst.b[2] - src.b[2]); - result.b[3] = USATB(dst.b[3] - src.b[3]); - result.b[4] = USATB(dst.b[4] - src.b[4]); - result.b[5] = USATB(dst.b[5] - src.b[5]); - result.b[6] = USATB(dst.b[6] - src.b[6]); - result.b[7] = USATB(dst.b[7] - src.b[7]); - - fpu_state.st_space[cpu_reg].fraction = result.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] = USATB(cpu_state.MM[cpu_reg].b[0] - src.b[0]); - cpu_state.MM[cpu_reg].b[1] = USATB(cpu_state.MM[cpu_reg].b[1] - src.b[1]); - cpu_state.MM[cpu_reg].b[2] = USATB(cpu_state.MM[cpu_reg].b[2] - src.b[2]); - cpu_state.MM[cpu_reg].b[3] = USATB(cpu_state.MM[cpu_reg].b[3] - src.b[3]); - cpu_state.MM[cpu_reg].b[4] = USATB(cpu_state.MM[cpu_reg].b[4] - src.b[4]); - cpu_state.MM[cpu_reg].b[5] = USATB(cpu_state.MM[cpu_reg].b[5] - src.b[5]); - cpu_state.MM[cpu_reg].b[6] = USATB(cpu_state.MM[cpu_reg].b[6] - src.b[6]); - cpu_state.MM[cpu_reg].b[7] = USATB(cpu_state.MM[cpu_reg].b[7] - src.b[7]); } + + dst->b[0] = USATB(dst->b[0] - src.b[0]); + dst->b[1] = USATB(dst->b[1] - src.b[1]); + dst->b[2] = USATB(dst->b[2] - src.b[2]); + dst->b[3] = USATB(dst->b[3] - src.b[3]); + dst->b[4] = USATB(dst->b[4] - src.b[4]); + dst->b[5] = USATB(dst->b[5] - src.b[5]); + dst->b[6] = USATB(dst->b[6] - src.b[6]); + dst->b[7] = USATB(dst->b[7] - src.b[7]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBSW_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.sw[0] = SSATW(dst.sw[0] - src.sw[0]); - dst.sw[1] = SSATW(dst.sw[1] - src.sw[1]); - dst.sw[2] = SSATW(dst.sw[2] - src.sw[2]); - dst.sw[3] = SSATW(dst.sw[3] - src.sw[3]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].sw[0] = SSATW(cpu_state.MM[cpu_reg].sw[0] - src.sw[0]); - cpu_state.MM[cpu_reg].sw[1] = SSATW(cpu_state.MM[cpu_reg].sw[1] - src.sw[1]); - cpu_state.MM[cpu_reg].sw[2] = SSATW(cpu_state.MM[cpu_reg].sw[2] - src.sw[2]); - cpu_state.MM[cpu_reg].sw[3] = SSATW(cpu_state.MM[cpu_reg].sw[3] - src.sw[3]); } + + dst->sw[0] = SSATW(dst->sw[0] - src.sw[0]); + dst->sw[1] = SSATW(dst->sw[1] - src.sw[1]); + dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]); + dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBSW_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.sw[0] = SSATW(dst.sw[0] - src.sw[0]); - dst.sw[1] = SSATW(dst.sw[1] - src.sw[1]); - dst.sw[2] = SSATW(dst.sw[2] - src.sw[2]); - dst.sw[3] = SSATW(dst.sw[3] - src.sw[3]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].sw[0] = SSATW(cpu_state.MM[cpu_reg].sw[0] - src.sw[0]); - cpu_state.MM[cpu_reg].sw[1] = SSATW(cpu_state.MM[cpu_reg].sw[1] - src.sw[1]); - cpu_state.MM[cpu_reg].sw[2] = SSATW(cpu_state.MM[cpu_reg].sw[2] - src.sw[2]); - cpu_state.MM[cpu_reg].sw[3] = SSATW(cpu_state.MM[cpu_reg].sw[3] - src.sw[3]); } + + dst->sw[0] = SSATW(dst->sw[0] - src.sw[0]); + dst->sw[1] = SSATW(dst->sw[1] - src.sw[1]); + dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]); + dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBUSW_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }, result; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - result.q = 0; - - result.w[0] = USATW(dst.w[0] - src.w[0]); - result.w[1] = USATW(dst.w[1] - src.w[1]); - result.w[2] = USATW(dst.w[2] - src.w[2]); - result.w[3] = USATW(dst.w[3] - src.w[3]); - - fpu_state.st_space[cpu_reg].fraction = result.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] = USATW(cpu_state.MM[cpu_reg].w[0] - src.w[0]); - cpu_state.MM[cpu_reg].w[1] = USATW(cpu_state.MM[cpu_reg].w[1] - src.w[1]); - cpu_state.MM[cpu_reg].w[2] = USATW(cpu_state.MM[cpu_reg].w[2] - src.w[2]); - cpu_state.MM[cpu_reg].w[3] = USATW(cpu_state.MM[cpu_reg].w[3] - src.w[3]); } + + dst->w[0] = USATW(dst->w[0] - src.w[0]); + dst->w[1] = USATW(dst->w[1] - src.w[1]); + dst->w[2] = USATW(dst->w[2] - src.w[2]); + dst->w[3] = USATW(dst->w[3] - src.w[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSUBUSW_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }, result; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - result.q = 0; - - result.w[0] = USATW(dst.w[0] - src.w[0]); - result.w[1] = USATW(dst.w[1] - src.w[1]); - result.w[2] = USATW(dst.w[2] - src.w[2]); - result.w[3] = USATW(dst.w[3] - src.w[3]); - - fpu_state.st_space[cpu_reg].fraction = result.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] = USATW(cpu_state.MM[cpu_reg].w[0] - src.w[0]); - cpu_state.MM[cpu_reg].w[1] = USATW(cpu_state.MM[cpu_reg].w[1] - src.w[1]); - cpu_state.MM[cpu_reg].w[2] = USATW(cpu_state.MM[cpu_reg].w[2] - src.w[2]); - cpu_state.MM[cpu_reg].w[3] = USATW(cpu_state.MM[cpu_reg].w[3] - src.w[3]); } + + dst->w[0] = USATW(dst->w[0] - src.w[0]); + dst->w[1] = USATW(dst->w[1] - src.w[1]); + dst->w[2] = USATW(dst->w[2] - src.w[2]); + dst->w[3] = USATW(dst->w[3] - src.w[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } diff --git a/src/cpu/x86_ops_mmx_cmp.h b/src/cpu/x86_ops_mmx_cmp.h index cdee0cfb5..4f64119a3 100644 --- a/src/cpu/x86_ops_mmx_cmp.h +++ b/src/cpu/x86_ops_mmx_cmp.h @@ -1,393 +1,349 @@ static int opPCMPEQB_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.b[0] = (dst.b[0] == src.b[0]) ? 0xff : 0; - dst.b[1] = (dst.b[1] == src.b[1]) ? 0xff : 0; - dst.b[2] = (dst.b[2] == src.b[2]) ? 0xff : 0; - dst.b[3] = (dst.b[3] == src.b[3]) ? 0xff : 0; - dst.b[4] = (dst.b[4] == src.b[4]) ? 0xff : 0; - dst.b[5] = (dst.b[5] == src.b[5]) ? 0xff : 0; - dst.b[6] = (dst.b[6] == src.b[6]) ? 0xff : 0; - dst.b[7] = (dst.b[7] == src.b[7]) ? 0xff : 0; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0; } + + dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0; + dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0; + dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0; + dst->b[3] = (dst->b[3] == src.b[3]) ? 0xff : 0; + dst->b[4] = (dst->b[4] == src.b[4]) ? 0xff : 0; + dst->b[5] = (dst->b[5] == src.b[5]) ? 0xff : 0; + dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0; + dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPCMPEQB_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.b[0] = (dst.b[0] == src.b[0]) ? 0xff : 0; - dst.b[1] = (dst.b[1] == src.b[1]) ? 0xff : 0; - dst.b[2] = (dst.b[2] == src.b[2]) ? 0xff : 0; - dst.b[3] = (dst.b[3] == src.b[3]) ? 0xff : 0; - dst.b[4] = (dst.b[4] == src.b[4]) ? 0xff : 0; - dst.b[5] = (dst.b[5] == src.b[5]) ? 0xff : 0; - dst.b[6] = (dst.b[6] == src.b[6]) ? 0xff : 0; - dst.b[7] = (dst.b[7] == src.b[7]) ? 0xff : 0; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0; } + + dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0; + dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0; + dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0; + dst->b[3] = (dst->b[3] == src.b[3]) ? 0xff : 0; + dst->b[4] = (dst->b[4] == src.b[4]) ? 0xff : 0; + dst->b[5] = (dst->b[5] == src.b[5]) ? 0xff : 0; + dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0; + dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPCMPGTB_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.b[0] = (dst.sb[0] > src.sb[0]) ? 0xff : 0; - dst.b[1] = (dst.sb[1] > src.sb[1]) ? 0xff : 0; - dst.b[2] = (dst.sb[2] > src.sb[2]) ? 0xff : 0; - dst.b[3] = (dst.sb[3] > src.sb[3]) ? 0xff : 0; - dst.b[4] = (dst.sb[4] > src.sb[4]) ? 0xff : 0; - dst.b[5] = (dst.sb[5] > src.sb[5]) ? 0xff : 0; - dst.b[6] = (dst.sb[6] > src.sb[6]) ? 0xff : 0; - dst.b[7] = (dst.sb[7] > src.sb[7]) ? 0xff : 0; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0; } + + dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0; + dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0; + dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0; + dst->b[3] = (dst->sb[3] > src.sb[3]) ? 0xff : 0; + dst->b[4] = (dst->sb[4] > src.sb[4]) ? 0xff : 0; + dst->b[5] = (dst->sb[5] > src.sb[5]) ? 0xff : 0; + dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0; + dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPCMPGTB_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.b[0] = (dst.sb[0] > src.sb[0]) ? 0xff : 0; - dst.b[1] = (dst.sb[1] > src.sb[1]) ? 0xff : 0; - dst.b[2] = (dst.sb[2] > src.sb[2]) ? 0xff : 0; - dst.b[3] = (dst.sb[3] > src.sb[3]) ? 0xff : 0; - dst.b[4] = (dst.sb[4] > src.sb[4]) ? 0xff : 0; - dst.b[5] = (dst.sb[5] > src.sb[5]) ? 0xff : 0; - dst.b[6] = (dst.sb[6] > src.sb[6]) ? 0xff : 0; - dst.b[7] = (dst.sb[7] > src.sb[7]) ? 0xff : 0; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0; - cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0; } + + dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0; + dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0; + dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0; + dst->b[3] = (dst->sb[3] > src.sb[3]) ? 0xff : 0; + dst->b[4] = (dst->sb[4] > src.sb[4]) ? 0xff : 0; + dst->b[5] = (dst->sb[5] > src.sb[5]) ? 0xff : 0; + dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0; + dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPCMPEQW_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.w[0] = (dst.w[0] == src.w[0]) ? 0xffff : 0; - dst.w[1] = (dst.w[1] == src.w[1]) ? 0xffff : 0; - dst.w[2] = (dst.w[2] == src.w[2]) ? 0xffff : 0; - dst.w[3] = (dst.w[3] == src.w[3]) ? 0xffff : 0; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0; } + + dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0; + dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0; + dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0; + dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPCMPEQW_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.w[0] = (dst.w[0] == src.w[0]) ? 0xffff : 0; - dst.w[1] = (dst.w[1] == src.w[1]) ? 0xffff : 0; - dst.w[2] = (dst.w[2] == src.w[2]) ? 0xffff : 0; - dst.w[3] = (dst.w[3] == src.w[3]) ? 0xffff : 0; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0; } + + dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0; + dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0; + dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0; + dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPCMPGTW_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.w[0] = (dst.sw[0] > src.sw[0]) ? 0xffff : 0; - dst.w[1] = (dst.sw[1] > src.sw[1]) ? 0xffff : 0; - dst.w[2] = (dst.sw[2] > src.sw[2]) ? 0xffff : 0; - dst.w[3] = (dst.sw[3] > src.sw[3]) ? 0xffff : 0; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0; } + + dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0; + dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0; + dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0; + dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPCMPGTW_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.w[0] = (dst.sw[0] > src.sw[0]) ? 0xffff : 0; - dst.w[1] = (dst.sw[1] > src.sw[1]) ? 0xffff : 0; - dst.w[2] = (dst.sw[2] > src.sw[2]) ? 0xffff : 0; - dst.w[3] = (dst.sw[3] > src.sw[3]) ? 0xffff : 0; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0; - cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0; } + + dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0; + dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0; + dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0; + dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPCMPEQD_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.l[0] = (dst.l[0] == src.l[0]) ? 0xffffffff : 0; - dst.l[1] = (dst.l[1] == src.l[1]) ? 0xffffffff : 0; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0; - cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0; } + + dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0; + dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPCMPEQD_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.l[0] = (dst.l[0] == src.l[0]) ? 0xffffffff : 0; - dst.l[1] = (dst.l[1] == src.l[1]) ? 0xffffffff : 0; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0; - cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0; } + + dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0; + dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPCMPGTD_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.l[0] = (dst.sl[0] > src.sl[0]) ? 0xffffffff : 0; - dst.l[1] = (dst.sl[1] > src.sl[1]) ? 0xffffffff : 0; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0; - cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0; } + + dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0; + dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPCMPGTD_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.l[0] = (dst.sl[0] > src.sl[0]) ? 0xffffffff : 0; - dst.l[1] = (dst.sl[1] > src.sl[1]) ? 0xffffffff : 0; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0; - cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0; } + + dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0; + dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } diff --git a/src/cpu/x86_ops_mmx_logic.h b/src/cpu/x86_ops_mmx_logic.h index 9a9a9ee01..67622a3df 100644 --- a/src/cpu/x86_ops_mmx_logic.h +++ b/src/cpu/x86_ops_mmx_logic.h @@ -1,50 +1,50 @@ static int opPAND_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } - dst.q &= src.q; + dst->q &= src.q; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else - cpu_state.MM[cpu_reg].q &= src.q; return 0; } static int opPAND_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } - dst.q &= src.q; + dst->q &= src.q; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else - cpu_state.MM[cpu_reg].q &= src.q; return 0; } @@ -52,50 +52,50 @@ opPAND_a32(uint32_t fetchdat) static int opPANDN_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } - dst.q = ~dst.q & src.q; + dst->q = ~dst->q & src.q; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else - cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q; return 0; } static int opPANDN_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } - dst.q = ~dst.q & src.q; + dst->q = ~dst->q & src.q; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else - cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q; return 0; } @@ -103,50 +103,50 @@ opPANDN_a32(uint32_t fetchdat) static int opPOR_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } - dst.q |= src.q; + dst->q |= src.q; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else - cpu_state.MM[cpu_reg].q |= src.q; return 0; } static int opPOR_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } - dst.q |= src.q; + dst->q |= src.q; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else - cpu_state.MM[cpu_reg].q |= src.q; return 0; } @@ -154,50 +154,50 @@ opPOR_a32(uint32_t fetchdat) static int opPXOR_a16(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } - dst.q ^= src.q; + dst->q ^= src.q; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else - cpu_state.MM[cpu_reg].q ^= src.q; return 0; } static int opPXOR_a32(uint32_t fetchdat) { - MMX_REG src, dst = { 0 }; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } - dst.q ^= src.q; + dst->q ^= src.q; - fpu_state.st_space[cpu_reg].fraction = dst.q; + if (fpu_softfloat) fpu_state.st_space[cpu_reg].exp = 0xffff; - } else - cpu_state.MM[cpu_reg].q ^= src.q; return 0; } diff --git a/src/cpu/x86_ops_mmx_mov.h b/src/cpu/x86_ops_mmx_mov.h index fad58898f..c631c6444 100644 --- a/src/cpu/x86_ops_mmx_mov.h +++ b/src/cpu/x86_ops_mmx_mov.h @@ -2,175 +2,153 @@ static int opMOVD_l_mm_a16(uint32_t fetchdat) { uint32_t dst; - MMX_REG op; + MMX_REG *op; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - if (cpu_mod == 3) { + + op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (cpu_mod == 3) { + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - op.l[0] = cpu_state.regs[cpu_rm].l; - op.l[1] = 0; - fpu_state.st_space[cpu_reg].fraction = op.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - dst = readmeml(easeg, cpu_state.eaaddr); - if (cpu_state.abrt) - return 1; - fpu_state.tag = 0; - fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - op.l[0] = dst; - op.l[1] = 0; - fpu_state.st_space[cpu_reg].fraction = op.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - CLOCK_CYCLES(2); } + + op->l[0] = cpu_state.regs[cpu_rm].l; + op->l[1] = 0; + CLOCK_CYCLES(1); } else { - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l; - cpu_state.MM[cpu_reg].l[1] = 0; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - dst = readmeml(easeg, cpu_state.eaaddr); - if (cpu_state.abrt) - return 1; - cpu_state.MM[cpu_reg].l[0] = dst; - cpu_state.MM[cpu_reg].l[1] = 0; - CLOCK_CYCLES(2); + SEG_CHECK_READ(cpu_state.ea_seg); + dst = readmeml(easeg, cpu_state.eaaddr); + if (cpu_state.abrt) + return 1; + + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } + + op->l[0] = dst; + op->l[1] = 0; + CLOCK_CYCLES(2); } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opMOVD_l_mm_a32(uint32_t fetchdat) { uint32_t dst; - MMX_REG op; + MMX_REG *op; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - if (cpu_mod == 3) { + + op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (cpu_mod == 3) { + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - op.l[0] = cpu_state.regs[cpu_rm].l; - op.l[1] = 0; - fpu_state.st_space[cpu_reg].fraction = op.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - dst = readmeml(easeg, cpu_state.eaaddr); - if (cpu_state.abrt) - return 1; - fpu_state.tag = 0; - fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - op.l[0] = dst; - op.l[1] = 0; - fpu_state.st_space[cpu_reg].fraction = op.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - CLOCK_CYCLES(2); } + + op->l[0] = cpu_state.regs[cpu_rm].l; + op->l[1] = 0; + CLOCK_CYCLES(1); } else { - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l; - cpu_state.MM[cpu_reg].l[1] = 0; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - dst = readmeml(easeg, cpu_state.eaaddr); - if (cpu_state.abrt) - return 1; - cpu_state.MM[cpu_reg].l[0] = dst; - cpu_state.MM[cpu_reg].l[1] = 0; - CLOCK_CYCLES(2); + SEG_CHECK_READ(cpu_state.ea_seg); + dst = readmeml(easeg, cpu_state.eaaddr); + if (cpu_state.abrt) + return 1; + + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } + + op->l[0] = dst; + op->l[1] = 0; + CLOCK_CYCLES(2); } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opMOVD_mm_l_a16(uint32_t fetchdat) { - MMX_REG op; + MMX_REG *op; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - if (cpu_mod == 3) { + + op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (cpu_mod == 3) { + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - cpu_state.regs[cpu_rm].l = op.l[0]; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_WRITE(cpu_state.ea_seg); - CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); - op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - writememl(easeg, cpu_state.eaaddr, op.l[0]); - if (cpu_state.abrt) - return 1; - fpu_state.tag = 0; - fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - CLOCK_CYCLES(2); } + + cpu_state.regs[cpu_rm].l = op->l[0]; + CLOCK_CYCLES(1); } else { - if (cpu_mod == 3) { - cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0]; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_WRITE(cpu_state.ea_seg); - CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); - writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]); - if (cpu_state.abrt) - return 1; - CLOCK_CYCLES(2); + SEG_CHECK_WRITE(cpu_state.ea_seg); + CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); + writememl(easeg, cpu_state.eaaddr, op->l[0]); + if (cpu_state.abrt) + return 1; + + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } + + CLOCK_CYCLES(2); } + return 0; } static int opMOVD_mm_l_a32(uint32_t fetchdat) { - MMX_REG op; + MMX_REG *op; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - if (cpu_mod == 3) { + + op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (cpu_mod == 3) { + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - cpu_state.regs[cpu_rm].l = op.l[0]; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_WRITE(cpu_state.ea_seg); - CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); - op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - writememl(easeg, cpu_state.eaaddr, op.l[0]); - if (cpu_state.abrt) - return 1; - fpu_state.tag = 0; - fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - CLOCK_CYCLES(2); } + + cpu_state.regs[cpu_rm].l = op->l[0]; + CLOCK_CYCLES(1); } else { - if (cpu_mod == 3) { - cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0]; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_WRITE(cpu_state.ea_seg); - CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); - writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]); - if (cpu_state.abrt) - return 1; - CLOCK_CYCLES(2); + SEG_CHECK_WRITE(cpu_state.ea_seg); + CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); + writememl(easeg, cpu_state.eaaddr, op->l[0]); + if (cpu_state.abrt) + return 1; + + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } + + CLOCK_CYCLES(2); } + return 0; } @@ -179,45 +157,79 @@ opMOVD_mm_l_a32(uint32_t fetchdat) static int opMOVD_mm_l_a16_cx(uint32_t fetchdat) { + MMX_REG *op; + if (in_smm) return opSMINT(fetchdat); MMX_ENTER(); fetch_ea_16(fetchdat); + + op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + if (cpu_mod == 3) { - cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0]; + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } + + cpu_state.regs[cpu_rm].l = op->l[0]; CLOCK_CYCLES(1); } else { SEG_CHECK_WRITE(cpu_state.ea_seg); CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); - writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]); + writememl(easeg, cpu_state.eaaddr, op->l[0]); if (cpu_state.abrt) return 1; + + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } + CLOCK_CYCLES(2); } + return 0; } static int opMOVD_mm_l_a32_cx(uint32_t fetchdat) { + MMX_REG *op; + if (in_smm) return opSMINT(fetchdat); MMX_ENTER(); fetch_ea_32(fetchdat); + + op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + if (cpu_mod == 3) { - cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0]; + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } + + cpu_state.regs[cpu_rm].l = op->l[0]; CLOCK_CYCLES(1); } else { SEG_CHECK_WRITE(cpu_state.ea_seg); CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3); - writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]); + writememl(easeg, cpu_state.eaaddr, op->l[0]); if (cpu_state.abrt) return 1; + + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } + CLOCK_CYCLES(2); } + return 0; } #endif @@ -226,162 +238,164 @@ static int opMOVQ_q_mm_a16(uint32_t fetchdat) { uint64_t dst; - MMX_REG src, op; + MMX_REG src; + MMX_REG *op; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - if (cpu_mod == 3) { + + src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm]; + op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (cpu_mod == 3) { + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction; - op.q = src.q; - fpu_state.st_space[cpu_reg].fraction = op.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - dst = readmemq(easeg, cpu_state.eaaddr); - if (cpu_state.abrt) - return 1; - fpu_state.tag = 0; - fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - op.q = dst; - fpu_state.st_space[cpu_reg].fraction = op.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - CLOCK_CYCLES(2); } + + op->q = src.q; + CLOCK_CYCLES(1); } else { - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - dst = readmemq(easeg, cpu_state.eaaddr); - if (cpu_state.abrt) - return 1; - cpu_state.MM[cpu_reg].q = dst; - CLOCK_CYCLES(2); + SEG_CHECK_READ(cpu_state.ea_seg); + dst = readmemq(easeg, cpu_state.eaaddr); + if (cpu_state.abrt) + return 1; + + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } + + op->q = dst; + CLOCK_CYCLES(2); } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opMOVQ_q_mm_a32(uint32_t fetchdat) { uint64_t dst; - MMX_REG src, op; + MMX_REG src; + MMX_REG *op; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - if (cpu_mod == 3) { + + src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm]; + op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (cpu_mod == 3) { + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction; - op.q = src.q; - fpu_state.st_space[cpu_reg].fraction = op.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - dst = readmemq(easeg, cpu_state.eaaddr); - if (cpu_state.abrt) - return 1; - fpu_state.tag = 0; - fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - op.q = dst; - fpu_state.st_space[cpu_reg].fraction = op.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - CLOCK_CYCLES(2); } + + op->q = src.q; + CLOCK_CYCLES(1); } else { - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - dst = readmemq(easeg, cpu_state.eaaddr); - if (cpu_state.abrt) - return 1; - cpu_state.MM[cpu_reg].q = dst; - CLOCK_CYCLES(2); + SEG_CHECK_READ(cpu_state.ea_seg); + dst = readmemq(easeg, cpu_state.eaaddr); + if (cpu_state.abrt) + return 1; + + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } + + op->q = dst; + CLOCK_CYCLES(2); } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opMOVQ_mm_q_a16(uint32_t fetchdat) { + MMX_REG src; + MMX_REG *dst; + MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - if (cpu_mod == 3) { + + src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : cpu_state.MM[cpu_reg]; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : &(cpu_state.MM[cpu_rm]); + + if (cpu_mod == 3) { + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - fpu_state.st_space[cpu_rm].fraction = fpu_state.st_space[cpu_reg].fraction; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_WRITE(cpu_state.ea_seg); - CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); - writememq(easeg, cpu_state.eaaddr, fpu_state.st_space[cpu_reg].fraction); - if (cpu_state.abrt) - return 1; - fpu_state.tag = 0; - fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - CLOCK_CYCLES(2); } + + dst->q = src.q; + CLOCK_CYCLES(1); + + if (fpu_softfloat) + fpu_state.st_space[cpu_rm].exp = 0xffff; } else { - if (cpu_mod == 3) { - cpu_state.MM[cpu_rm].q = cpu_state.MM[cpu_reg].q; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_WRITE(cpu_state.ea_seg); - CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); - writememq(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].q); - if (cpu_state.abrt) - return 1; - CLOCK_CYCLES(2); + SEG_CHECK_WRITE(cpu_state.ea_seg); + CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); + writememq(easeg, cpu_state.eaaddr, src.q); + if (cpu_state.abrt) + return 1; + + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } + + CLOCK_CYCLES(2); } + return 0; } static int opMOVQ_mm_q_a32(uint32_t fetchdat) { + MMX_REG src; + MMX_REG *dst; + MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - if (cpu_mod == 3) { + + src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : cpu_state.MM[cpu_reg]; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : &(cpu_state.MM[cpu_rm]); + + if (cpu_mod == 3) { + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - fpu_state.st_space[cpu_rm].fraction = fpu_state.st_space[cpu_reg].fraction; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_WRITE(cpu_state.ea_seg); - CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); - writememq(easeg, cpu_state.eaaddr, fpu_state.st_space[cpu_reg].fraction); - if (cpu_state.abrt) - return 1; - fpu_state.tag = 0; - fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - CLOCK_CYCLES(2); } + + dst->q = src.q; + CLOCK_CYCLES(1); + + if (fpu_softfloat) + fpu_state.st_space[cpu_rm].exp = 0xffff; } else { - if (cpu_mod == 3) { - cpu_state.MM[cpu_rm].q = cpu_state.MM[cpu_reg].q; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_WRITE(cpu_state.ea_seg); - CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); - writememq(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].q); - if (cpu_state.abrt) - return 1; - CLOCK_CYCLES(2); + SEG_CHECK_WRITE(cpu_state.ea_seg); + CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7); + writememq(easeg, cpu_state.eaaddr, src.q); + if (cpu_state.abrt) + return 1; + + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } + + CLOCK_CYCLES(2); } + return 0; } diff --git a/src/cpu/x86_ops_mmx_pack.h b/src/cpu/x86_ops_mmx_pack.h index 25bc85a9a..a768a0183 100644 --- a/src/cpu/x86_ops_mmx_pack.h +++ b/src/cpu/x86_ops_mmx_pack.h @@ -2,635 +2,563 @@ static int opPUNPCKLDQ_a16(uint32_t fetchdat) { uint32_t usrc; - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - if (cpu_mod == 3) { - src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction; - fpu_state.tag = 0; - fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.l[1] = src.l[0]; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - src.l[0] = readmeml(easeg, cpu_state.eaaddr); - if (cpu_state.abrt) - return 1; - fpu_state.tag = 0; - fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.l[1] = src.l[0]; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - CLOCK_CYCLES(2); - } - } else { - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].l[1] = cpu_state.MM[cpu_rm].l[0]; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - usrc = readmeml(easeg, cpu_state.eaaddr); - if (cpu_state.abrt) - return 0; - cpu_state.MM[cpu_reg].l[1] = usrc; - CLOCK_CYCLES(2); + src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm]; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (cpu_mod == 3) { + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } + dst->l[1] = src.l[0]; + CLOCK_CYCLES(1); + } else { + SEG_CHECK_READ(cpu_state.ea_seg); + usrc = readmeml(easeg, cpu_state.eaaddr); + if (cpu_state.abrt) + return 0; + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } + dst->l[1] = usrc; + + CLOCK_CYCLES(2); } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPUNPCKLDQ_a32(uint32_t fetchdat) { uint32_t usrc; - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - if (cpu_mod == 3) { - src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction; - fpu_state.tag = 0; - fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.l[1] = src.l[0]; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - src.l[0] = readmeml(easeg, cpu_state.eaaddr); - if (cpu_state.abrt) - return 1; - fpu_state.tag = 0; - fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.l[1] = src.l[0]; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - CLOCK_CYCLES(2); - } - } else { - if (cpu_mod == 3) { - cpu_state.MM[cpu_reg].l[1] = cpu_state.MM[cpu_rm].l[0]; - CLOCK_CYCLES(1); - } else { - SEG_CHECK_READ(cpu_state.ea_seg); - usrc = readmeml(easeg, cpu_state.eaaddr); - if (cpu_state.abrt) - return 0; - cpu_state.MM[cpu_reg].l[1] = usrc; - CLOCK_CYCLES(2); + src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm]; + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (cpu_mod == 3) { + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } + dst->l[1] = src.l[0]; + CLOCK_CYCLES(1); + } else { + SEG_CHECK_READ(cpu_state.ea_seg); + usrc = readmeml(easeg, cpu_state.eaaddr); + if (cpu_state.abrt) + return 0; + if (fpu_softfloat) { + fpu_state.tag = 0; + fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ + } + dst->l[1] = usrc; + + CLOCK_CYCLES(2); } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPUNPCKHDQ_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + MMX_GETSRC(); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.l[0] = dst.l[1]; - dst.l[1] = src.l[1]; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1]; - cpu_state.MM[cpu_reg].l[1] = src.l[1]; } + + dst->l[0] = dst->l[1]; + dst->l[1] = src.l[1]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPUNPCKHDQ_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + MMX_GETSRC(); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.l[0] = dst.l[1]; - dst.l[1] = src.l[1]; - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1]; - cpu_state.MM[cpu_reg].l[1] = src.l[1]; } + + dst->l[0] = dst->l[1]; + dst->l[1] = src.l[1]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPUNPCKLBW_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.b[7] = src.b[3]; - dst.b[6] = dst.b[3]; - dst.b[5] = src.b[2]; - dst.b[4] = dst.b[2]; - dst.b[3] = src.b[1]; - dst.b[2] = dst.b[1]; - dst.b[1] = src.b[0]; - dst.b[0] = dst.b[0]; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[7] = src.b[3]; - cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3]; - cpu_state.MM[cpu_reg].b[5] = src.b[2]; - cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[2]; - cpu_state.MM[cpu_reg].b[3] = src.b[1]; - cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1]; - cpu_state.MM[cpu_reg].b[1] = src.b[0]; - cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0]; } + + dst->b[7] = src.b[3]; + dst->b[6] = dst->b[3]; + dst->b[5] = src.b[2]; + dst->b[4] = dst->b[2]; + dst->b[3] = src.b[1]; + dst->b[2] = dst->b[1]; + dst->b[1] = src.b[0]; + dst->b[0] = dst->b[0]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPUNPCKLBW_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.b[7] = src.b[3]; - dst.b[6] = dst.b[3]; - dst.b[5] = src.b[2]; - dst.b[4] = dst.b[2]; - dst.b[3] = src.b[1]; - dst.b[2] = dst.b[1]; - dst.b[1] = src.b[0]; - dst.b[0] = dst.b[0]; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[7] = src.b[3]; - cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3]; - cpu_state.MM[cpu_reg].b[5] = src.b[2]; - cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[2]; - cpu_state.MM[cpu_reg].b[3] = src.b[1]; - cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1]; - cpu_state.MM[cpu_reg].b[1] = src.b[0]; - cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0]; } + + dst->b[7] = src.b[3]; + dst->b[6] = dst->b[3]; + dst->b[5] = src.b[2]; + dst->b[4] = dst->b[2]; + dst->b[3] = src.b[1]; + dst->b[2] = dst->b[1]; + dst->b[1] = src.b[0]; + dst->b[0] = dst->b[0]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPUNPCKHBW_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.b[0] = dst.b[4]; - dst.b[1] = src.b[4]; - dst.b[2] = dst.b[5]; - dst.b[3] = src.b[5]; - dst.b[4] = dst.b[6]; - dst.b[5] = src.b[6]; - dst.b[6] = dst.b[7]; - dst.b[7] = src.b[7]; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[4]; - cpu_state.MM[cpu_reg].b[1] = src.b[4]; - cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[5]; - cpu_state.MM[cpu_reg].b[3] = src.b[5]; - cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[6]; - cpu_state.MM[cpu_reg].b[5] = src.b[6]; - cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[7]; - cpu_state.MM[cpu_reg].b[7] = src.b[7]; } + + dst->b[0] = dst->b[4]; + dst->b[1] = src.b[4]; + dst->b[2] = dst->b[5]; + dst->b[3] = src.b[5]; + dst->b[4] = dst->b[6]; + dst->b[5] = src.b[6]; + dst->b[6] = dst->b[7]; + dst->b[7] = src.b[7]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPUNPCKHBW_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.b[0] = dst.b[4]; - dst.b[1] = src.b[4]; - dst.b[2] = dst.b[5]; - dst.b[3] = src.b[5]; - dst.b[4] = dst.b[6]; - dst.b[5] = src.b[6]; - dst.b[6] = dst.b[7]; - dst.b[7] = src.b[7]; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[4]; - cpu_state.MM[cpu_reg].b[1] = src.b[4]; - cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[5]; - cpu_state.MM[cpu_reg].b[3] = src.b[5]; - cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[6]; - cpu_state.MM[cpu_reg].b[5] = src.b[6]; - cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[7]; - cpu_state.MM[cpu_reg].b[7] = src.b[7]; } + + dst->b[0] = dst->b[4]; + dst->b[1] = src.b[4]; + dst->b[2] = dst->b[5]; + dst->b[3] = src.b[5]; + dst->b[4] = dst->b[6]; + dst->b[5] = src.b[6]; + dst->b[6] = dst->b[7]; + dst->b[7] = src.b[7]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPUNPCKLWD_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.w[3] = src.w[1]; - dst.w[2] = dst.w[1]; - dst.w[1] = src.w[0]; - dst.w[0] = dst.w[0]; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[3] = src.w[1]; - cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[1]; - cpu_state.MM[cpu_reg].w[1] = src.w[0]; - cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[0]; } + + dst->w[3] = src.w[1]; + dst->w[2] = dst->w[1]; + dst->w[1] = src.w[0]; + dst->w[0] = dst->w[0]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPUNPCKLWD_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.w[3] = src.w[1]; - dst.w[2] = dst.w[1]; - dst.w[1] = src.w[0]; - dst.w[0] = dst.w[0]; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[3] = src.w[1]; - cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[1]; - cpu_state.MM[cpu_reg].w[1] = src.w[0]; - cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[0]; } + + dst->w[3] = src.w[1]; + dst->w[2] = dst->w[1]; + dst->w[1] = src.w[0]; + dst->w[0] = dst->w[0]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPUNPCKHWD_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.w[0] = dst.w[2]; - dst.w[1] = src.w[2]; - dst.w[2] = dst.w[3]; - dst.w[3] = src.w[3]; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[2]; - cpu_state.MM[cpu_reg].w[1] = src.w[2]; - cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[3]; - cpu_state.MM[cpu_reg].w[3] = src.w[3]; } + + dst->w[0] = dst->w[2]; + dst->w[1] = src.w[2]; + dst->w[2] = dst->w[3]; + dst->w[3] = src.w[3]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPUNPCKHWD_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); MMX_GETSRC(); if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.w[0] = dst.w[2]; - dst.w[1] = src.w[2]; - dst.w[2] = dst.w[3]; - dst.w[3] = src.w[3]; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[2]; - cpu_state.MM[cpu_reg].w[1] = src.w[2]; - cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[3]; - cpu_state.MM[cpu_reg].w[3] = src.w[3]; } + + dst->w[0] = dst->w[2]; + dst->w[1] = src.w[2]; + dst->w[2] = dst->w[3]; + dst->w[3] = src.w[3]; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPACKSSWB_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + MMX_GETSRC(); if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.sb[0] = SSATB(dst.sw[0]); - dst.sb[1] = SSATB(dst.sw[1]); - dst.sb[2] = SSATB(dst.sw[2]); - dst.sb[3] = SSATB(dst.sw[3]); - dst.sb[4] = SSATB(src.sw[0]); - dst.sb[5] = SSATB(src.sw[1]); - dst.sb[6] = SSATB(src.sw[2]); - dst.sb[7] = SSATB(src.sw[3]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - dst = cpu_state.MM[cpu_reg]; - - cpu_state.MM[cpu_reg].sb[0] = SSATB(dst.sw[0]); - cpu_state.MM[cpu_reg].sb[1] = SSATB(dst.sw[1]); - cpu_state.MM[cpu_reg].sb[2] = SSATB(dst.sw[2]); - cpu_state.MM[cpu_reg].sb[3] = SSATB(dst.sw[3]); - cpu_state.MM[cpu_reg].sb[4] = SSATB(src.sw[0]); - cpu_state.MM[cpu_reg].sb[5] = SSATB(src.sw[1]); - cpu_state.MM[cpu_reg].sb[6] = SSATB(src.sw[2]); - cpu_state.MM[cpu_reg].sb[7] = SSATB(src.sw[3]); } + + dst->sb[0] = SSATB(dst->sw[0]); + dst->sb[1] = SSATB(dst->sw[1]); + dst->sb[2] = SSATB(dst->sw[2]); + dst->sb[3] = SSATB(dst->sw[3]); + dst->sb[4] = SSATB(src.sw[0]); + dst->sb[5] = SSATB(src.sw[1]); + dst->sb[6] = SSATB(src.sw[2]); + dst->sb[7] = SSATB(src.sw[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPACKSSWB_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + MMX_GETSRC(); if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.sb[0] = SSATB(dst.sw[0]); - dst.sb[1] = SSATB(dst.sw[1]); - dst.sb[2] = SSATB(dst.sw[2]); - dst.sb[3] = SSATB(dst.sw[3]); - dst.sb[4] = SSATB(src.sw[0]); - dst.sb[5] = SSATB(src.sw[1]); - dst.sb[6] = SSATB(src.sw[2]); - dst.sb[7] = SSATB(src.sw[3]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - dst = cpu_state.MM[cpu_reg]; - - cpu_state.MM[cpu_reg].sb[0] = SSATB(dst.sw[0]); - cpu_state.MM[cpu_reg].sb[1] = SSATB(dst.sw[1]); - cpu_state.MM[cpu_reg].sb[2] = SSATB(dst.sw[2]); - cpu_state.MM[cpu_reg].sb[3] = SSATB(dst.sw[3]); - cpu_state.MM[cpu_reg].sb[4] = SSATB(src.sw[0]); - cpu_state.MM[cpu_reg].sb[5] = SSATB(src.sw[1]); - cpu_state.MM[cpu_reg].sb[6] = SSATB(src.sw[2]); - cpu_state.MM[cpu_reg].sb[7] = SSATB(src.sw[3]); } + + dst->sb[0] = SSATB(dst->sw[0]); + dst->sb[1] = SSATB(dst->sw[1]); + dst->sb[2] = SSATB(dst->sw[2]); + dst->sb[3] = SSATB(dst->sw[3]); + dst->sb[4] = SSATB(src.sw[0]); + dst->sb[5] = SSATB(src.sw[1]); + dst->sb[6] = SSATB(src.sw[2]); + dst->sb[7] = SSATB(src.sw[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPACKUSWB_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + MMX_GETSRC(); if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.b[0] = USATB(dst.sw[0]); - dst.b[1] = USATB(dst.sw[1]); - dst.b[2] = USATB(dst.sw[2]); - dst.b[3] = USATB(dst.sw[3]); - dst.b[4] = USATB(src.sw[0]); - dst.b[5] = USATB(src.sw[1]); - dst.b[6] = USATB(src.sw[2]); - dst.b[7] = USATB(src.sw[3]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - dst = cpu_state.MM[cpu_reg]; - - cpu_state.MM[cpu_reg].b[0] = USATB(dst.sw[0]); - cpu_state.MM[cpu_reg].b[1] = USATB(dst.sw[1]); - cpu_state.MM[cpu_reg].b[2] = USATB(dst.sw[2]); - cpu_state.MM[cpu_reg].b[3] = USATB(dst.sw[3]); - cpu_state.MM[cpu_reg].b[4] = USATB(src.sw[0]); - cpu_state.MM[cpu_reg].b[5] = USATB(src.sw[1]); - cpu_state.MM[cpu_reg].b[6] = USATB(src.sw[2]); - cpu_state.MM[cpu_reg].b[7] = USATB(src.sw[3]); } + + dst->b[0] = USATB(dst->sw[0]); + dst->b[1] = USATB(dst->sw[1]); + dst->b[2] = USATB(dst->sw[2]); + dst->b[3] = USATB(dst->sw[3]); + dst->b[4] = USATB(src.sw[0]); + dst->b[5] = USATB(src.sw[1]); + dst->b[6] = USATB(src.sw[2]); + dst->b[7] = USATB(src.sw[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPACKUSWB_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + MMX_GETSRC(); if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - dst.b[0] = USATB(dst.sw[0]); - dst.b[1] = USATB(dst.sw[1]); - dst.b[2] = USATB(dst.sw[2]); - dst.b[3] = USATB(dst.sw[3]); - dst.b[4] = USATB(src.sw[0]); - dst.b[5] = USATB(src.sw[1]); - dst.b[6] = USATB(src.sw[2]); - dst.b[7] = USATB(src.sw[3]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - dst = cpu_state.MM[cpu_reg]; - - cpu_state.MM[cpu_reg].b[0] = USATB(dst.sw[0]); - cpu_state.MM[cpu_reg].b[1] = USATB(dst.sw[1]); - cpu_state.MM[cpu_reg].b[2] = USATB(dst.sw[2]); - cpu_state.MM[cpu_reg].b[3] = USATB(dst.sw[3]); - cpu_state.MM[cpu_reg].b[4] = USATB(src.sw[0]); - cpu_state.MM[cpu_reg].b[5] = USATB(src.sw[1]); - cpu_state.MM[cpu_reg].b[6] = USATB(src.sw[2]); - cpu_state.MM[cpu_reg].b[7] = USATB(src.sw[3]); } + + dst->b[0] = USATB(dst->sw[0]); + dst->b[1] = USATB(dst->sw[1]); + dst->b[2] = USATB(dst->sw[2]); + dst->b[3] = USATB(dst->sw[3]); + dst->b[4] = USATB(src.sw[0]); + dst->b[5] = USATB(src.sw[1]); + dst->b[6] = USATB(src.sw[2]); + dst->b[7] = USATB(src.sw[3]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPACKSSDW_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst, dst2; MMX_ENTER(); fetch_ea_16(fetchdat); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + dst2 = *dst; + MMX_GETSRC(); if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.sw[0] = SSATW(dst.sl[0]); - dst.sw[1] = SSATW(dst.sl[1]); - dst.sw[2] = SSATW(src.sl[0]); - dst.sw[3] = SSATW(src.sl[1]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - dst = cpu_state.MM[cpu_reg]; - - cpu_state.MM[cpu_reg].sw[0] = SSATW(dst.sl[0]); - cpu_state.MM[cpu_reg].sw[1] = SSATW(dst.sl[1]); - cpu_state.MM[cpu_reg].sw[2] = SSATW(src.sl[0]); - cpu_state.MM[cpu_reg].sw[3] = SSATW(src.sl[1]); } + + dst->sw[0] = SSATW(dst2.sl[0]); + dst->sw[1] = SSATW(dst2.sl[1]); + dst->sw[2] = SSATW(src.sl[0]); + dst->sw[3] = SSATW(src.sl[1]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPACKSSDW_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG src; + MMX_REG *dst, dst2; MMX_ENTER(); fetch_ea_32(fetchdat); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + dst2 = *dst; + MMX_GETSRC(); if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - - dst.sw[0] = SSATW(dst.sl[0]); - dst.sw[1] = SSATW(dst.sl[1]); - dst.sw[2] = SSATW(src.sl[0]); - dst.sw[3] = SSATW(src.sl[1]); - - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - dst = cpu_state.MM[cpu_reg]; - - cpu_state.MM[cpu_reg].sw[0] = SSATW(dst.sl[0]); - cpu_state.MM[cpu_reg].sw[1] = SSATW(dst.sl[1]); - cpu_state.MM[cpu_reg].sw[2] = SSATW(src.sl[0]); - cpu_state.MM[cpu_reg].sw[3] = SSATW(src.sl[1]); } + + dst->sw[0] = SSATW(dst2.sl[0]); + dst->sw[1] = SSATW(dst2.sl[1]); + dst->sw[2] = SSATW(src.sl[0]); + dst->sw[3] = SSATW(src.sl[1]); + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } diff --git a/src/cpu/x86_ops_mmx_shift.h b/src/cpu/x86_ops_mmx_shift.h index a3ede0021..e0c9f89a5 100644 --- a/src/cpu/x86_ops_mmx_shift.h +++ b/src/cpu/x86_ops_mmx_shift.h @@ -1,13 +1,13 @@ -#define MMX_GETSHIFT() \ - if (cpu_mod == 3) { \ - shift = cpu_state.MM[cpu_rm].b[0]; \ - CLOCK_CYCLES(1); \ - } else { \ - SEG_CHECK_READ(cpu_state.ea_seg); \ - shift = readmemb(easeg, cpu_state.eaaddr); \ - if (cpu_state.abrt) \ - return 0; \ - CLOCK_CYCLES(2); \ +#define MMX_GETSHIFT() \ + if (cpu_mod == 3) { \ + shift = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction).b[0] : cpu_state.MM[cpu_rm].b[0]; \ + CLOCK_CYCLES(1); \ + } else { \ + SEG_CHECK_READ(cpu_state.ea_seg); \ + shift = readmemb(easeg, cpu_state.eaaddr); \ + if (cpu_state.abrt) \ + return 0; \ + CLOCK_CYCLES(2); \ } static int @@ -16,80 +16,44 @@ opPSxxW_imm(uint32_t fetchdat) int reg = fetchdat & 7; int op = fetchdat & 0x38; int shift = (fetchdat >> 8) & 0xff; - MMX_REG dst; + MMX_REG *dst; cpu_state.pc += 2; MMX_ENTER(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[reg].fraction) : &(cpu_state.MM[reg]); + if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[reg].fraction; fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } switch (op) { case 0x10: /*PSRLW*/ - if (fpu_softfloat) { - if (shift > 15) - dst.q = 0; - else { - dst.w[0] >>= shift; - dst.w[1] >>= shift; - dst.w[2] >>= shift; - dst.w[3] >>= shift; - } - fpu_state.st_space[reg].fraction = dst.q; - fpu_state.st_space[reg].exp = 0xffff; - } else { - if (shift > 15) - cpu_state.MM[reg].q = 0; - else { - cpu_state.MM[reg].w[0] >>= shift; - cpu_state.MM[reg].w[1] >>= shift; - cpu_state.MM[reg].w[2] >>= shift; - cpu_state.MM[reg].w[3] >>= shift; - } + if (shift > 15) + dst->q = 0; + else { + dst->w[0] >>= shift; + dst->w[1] >>= shift; + dst->w[2] >>= shift; + dst->w[3] >>= shift; } break; case 0x20: /*PSRAW*/ - if (fpu_softfloat) { - if (shift > 15) - shift = 15; - dst.sw[0] >>= shift; - dst.sw[1] >>= shift; - dst.sw[2] >>= shift; - dst.sw[3] >>= shift; - fpu_state.st_space[reg].fraction = dst.q; - fpu_state.st_space[reg].exp = 0xffff; - } else { - if (shift > 15) - shift = 15; - cpu_state.MM[reg].sw[0] >>= shift; - cpu_state.MM[reg].sw[1] >>= shift; - cpu_state.MM[reg].sw[2] >>= shift; - cpu_state.MM[reg].sw[3] >>= shift; - } + if (shift > 15) + shift = 15; + dst->sw[0] >>= shift; + dst->sw[1] >>= shift; + dst->sw[2] >>= shift; + dst->sw[3] >>= shift; break; case 0x30: /*PSLLW*/ - if (fpu_softfloat) { - if (shift > 15) - dst.q = 0; - else { - dst.w[0] <<= shift; - dst.w[1] <<= shift; - dst.w[2] <<= shift; - dst.w[3] <<= shift; - } - fpu_state.st_space[reg].fraction = dst.q; - fpu_state.st_space[reg].exp = 0xffff; - } else { - if (shift > 15) - cpu_state.MM[reg].q = 0; - else { - cpu_state.MM[reg].w[0] <<= shift; - cpu_state.MM[reg].w[1] <<= shift; - cpu_state.MM[reg].w[2] <<= shift; - cpu_state.MM[reg].w[3] <<= shift; - } + if (shift > 15) + dst->q = 0; + else { + dst->w[0] <<= shift; + dst->w[1] <<= shift; + dst->w[2] <<= shift; + dst->w[3] <<= shift; } break; default: @@ -98,6 +62,9 @@ opPSxxW_imm(uint32_t fetchdat) return 0; } + if (fpu_softfloat) + fpu_state.st_space[reg].exp = 0xffff; + CLOCK_CYCLES(1); return 0; } @@ -105,239 +72,199 @@ opPSxxW_imm(uint32_t fetchdat) static int opPSLLW_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + MMX_GETSHIFT(); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 15) { - dst.q = 0; - } else { - shift = src.b[0]; - dst.w[0] <<= shift; - dst.w[1] <<= shift; - dst.w[2] <<= shift; - dst.w[3] <<= shift; - } - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 15) - cpu_state.MM[cpu_reg].q = 0; - else { - cpu_state.MM[cpu_reg].w[0] <<= shift; - cpu_state.MM[cpu_reg].w[1] <<= shift; - cpu_state.MM[cpu_reg].w[2] <<= shift; - cpu_state.MM[cpu_reg].w[3] <<= shift; - } } + + if (shift > 15) + dst->q = 0; + else { + dst->w[0] <<= shift; + dst->w[1] <<= shift; + dst->w[2] <<= shift; + dst->w[3] <<= shift; + } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSLLW_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + MMX_GETSHIFT(); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 15) { - dst.q = 0; - } else { - shift = src.b[0]; - dst.w[0] <<= shift; - dst.w[1] <<= shift; - dst.w[2] <<= shift; - dst.w[3] <<= shift; - } - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 15) - cpu_state.MM[cpu_reg].q = 0; - else { - cpu_state.MM[cpu_reg].w[0] <<= shift; - cpu_state.MM[cpu_reg].w[1] <<= shift; - cpu_state.MM[cpu_reg].w[2] <<= shift; - cpu_state.MM[cpu_reg].w[3] <<= shift; - } } + + if (shift > 15) + dst->q = 0; + else { + dst->w[0] <<= shift; + dst->w[1] <<= shift; + dst->w[2] <<= shift; + dst->w[3] <<= shift; + } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSRLW_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 15) { - dst.q = 0; - } else { - shift = src.b[0]; - dst.w[0] >>= shift; - dst.w[1] >>= shift; - dst.w[2] >>= shift; - dst.w[3] >>= shift; - } - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 15) - cpu_state.MM[cpu_reg].q = 0; - else { - cpu_state.MM[cpu_reg].w[0] >>= shift; - cpu_state.MM[cpu_reg].w[1] >>= shift; - cpu_state.MM[cpu_reg].w[2] >>= shift; - cpu_state.MM[cpu_reg].w[3] >>= shift; - } } + + MMX_GETSHIFT(); + + if (shift > 15) + dst->q = 0; + else { + dst->w[0] >>= shift; + dst->w[1] >>= shift; + dst->w[2] >>= shift; + dst->w[3] >>= shift; + } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSRLW_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 15) { - dst.q = 0; - } else { - shift = src.b[0]; - dst.w[0] >>= shift; - dst.w[1] >>= shift; - dst.w[2] >>= shift; - dst.w[3] >>= shift; - } - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 15) - cpu_state.MM[cpu_reg].q = 0; - else { - cpu_state.MM[cpu_reg].w[0] >>= shift; - cpu_state.MM[cpu_reg].w[1] >>= shift; - cpu_state.MM[cpu_reg].w[2] >>= shift; - cpu_state.MM[cpu_reg].w[3] >>= shift; - } } + + MMX_GETSHIFT(); + + if (shift > 15) + dst->q = 0; + else { + dst->w[0] >>= shift; + dst->w[1] >>= shift; + dst->w[2] >>= shift; + dst->w[3] >>= shift; + } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSRAW_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 15) { - src.q = 15; - } - shift = src.b[0]; - dst.sw[0] >>= shift; - dst.sw[1] >>= shift; - dst.sw[2] >>= shift; - dst.sw[3] >>= shift; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 15) - shift = 15; - - cpu_state.MM[cpu_reg].sw[0] >>= shift; - cpu_state.MM[cpu_reg].sw[1] >>= shift; - cpu_state.MM[cpu_reg].sw[2] >>= shift; - cpu_state.MM[cpu_reg].sw[3] >>= shift; } + + MMX_GETSHIFT(); + + if (shift > 15) + shift = 15; + + dst->sw[0] >>= shift; + dst->sw[1] >>= shift; + dst->sw[2] >>= shift; + dst->sw[3] >>= shift; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSRAW_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 15) { - src.q = 15; - } - shift = src.b[0]; - dst.sw[0] >>= shift; - dst.sw[1] >>= shift; - dst.sw[2] >>= shift; - dst.sw[3] >>= shift; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 15) - shift = 15; - - cpu_state.MM[cpu_reg].sw[0] >>= shift; - cpu_state.MM[cpu_reg].sw[1] >>= shift; - cpu_state.MM[cpu_reg].sw[2] >>= shift; - cpu_state.MM[cpu_reg].sw[3] >>= shift; } + + MMX_GETSHIFT(); + + if (shift > 15) + shift = 15; + + dst->sw[0] >>= shift; + dst->sw[1] >>= shift; + dst->sw[2] >>= shift; + dst->sw[3] >>= shift; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } @@ -347,68 +274,39 @@ opPSxxD_imm(uint32_t fetchdat) int reg = fetchdat & 7; int op = fetchdat & 0x38; int shift = (fetchdat >> 8) & 0xff; - MMX_REG dst; + MMX_REG *dst; cpu_state.pc += 2; MMX_ENTER(); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[reg].fraction) : &(cpu_state.MM[reg]); + if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[reg].fraction; fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } switch (op) { case 0x10: /*PSRLD*/ - if (fpu_softfloat) { - if (shift > 31) - dst.q = 0; - else { - dst.l[0] >>= shift; - dst.l[1] >>= shift; - } - fpu_state.st_space[reg].fraction = dst.q; - fpu_state.st_space[reg].exp = 0xffff; - } else { - if (shift > 31) - cpu_state.MM[reg].q = 0; - else { - cpu_state.MM[reg].l[0] >>= shift; - cpu_state.MM[reg].l[1] >>= shift; - } + if (shift > 31) + dst->q = 0; + else { + dst->l[0] >>= shift; + dst->l[1] >>= shift; } break; case 0x20: /*PSRAD*/ - if (fpu_softfloat) { - if (shift > 31) - shift = 31; - dst.sl[0] >>= shift; - dst.sl[1] >>= shift; - fpu_state.st_space[reg].fraction = dst.q; - fpu_state.st_space[reg].exp = 0xffff; - } else { - if (shift > 31) - shift = 31; - cpu_state.MM[reg].sl[0] >>= shift; - cpu_state.MM[reg].sl[1] >>= shift; - } + if (shift > 31) + shift = 31; + dst->sl[0] >>= shift; + dst->sl[1] >>= shift; break; case 0x30: /*PSLLD*/ - if (fpu_softfloat) { - if (shift > 31) - dst.q = 0; - else { - dst.l[0] <<= shift; - dst.l[1] <<= shift; - } - fpu_state.st_space[reg].fraction = dst.q; - fpu_state.st_space[reg].exp = 0xffff; - } else { - if (shift > 31) - cpu_state.MM[reg].q = 0; - else { - cpu_state.MM[reg].l[0] <<= shift; - cpu_state.MM[reg].l[1] <<= shift; - } + if (shift > 31) + dst->q = 0; + else { + dst->l[0] <<= shift; + dst->l[1] <<= shift; } break; default: @@ -417,6 +315,9 @@ opPSxxD_imm(uint32_t fetchdat) return 0; } + if (fpu_softfloat) + fpu_state.st_space[reg].exp = 0xffff; + CLOCK_CYCLES(1); return 0; } @@ -424,215 +325,187 @@ opPSxxD_imm(uint32_t fetchdat) static int opPSLLD_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 31) { - dst.q = 0; - } else { - shift = src.b[0]; - dst.l[0] <<= shift; - dst.l[1] <<= shift; - } - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 31) - cpu_state.MM[cpu_reg].q = 0; - else { - cpu_state.MM[cpu_reg].l[0] <<= shift; - cpu_state.MM[cpu_reg].l[1] <<= shift; - } } + + MMX_GETSHIFT(); + + if (shift > 31) + dst->q = 0; + else { + dst->l[0] <<= shift; + dst->l[1] <<= shift; + } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSLLD_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 31) { - dst.q = 0; - } else { - shift = src.b[0]; - dst.l[0] <<= shift; - dst.l[1] <<= shift; - } - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 31) - cpu_state.MM[cpu_reg].q = 0; - else { - cpu_state.MM[cpu_reg].l[0] <<= shift; - cpu_state.MM[cpu_reg].l[1] <<= shift; - } } + + MMX_GETSHIFT(); + + if (shift > 31) + dst->q = 0; + else { + dst->l[0] <<= shift; + dst->l[1] <<= shift; + } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSRLD_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 31) { - dst.q = 0; - } else { - shift = src.b[0]; - dst.l[0] >>= shift; - dst.l[1] >>= shift; - } - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 31) - cpu_state.MM[cpu_reg].q = 0; - else { - cpu_state.MM[cpu_reg].l[0] >>= shift; - cpu_state.MM[cpu_reg].l[1] >>= shift; - } } + + MMX_GETSHIFT(); + + if (shift > 31) + dst->q = 0; + else { + dst->l[0] >>= shift; + dst->l[1] >>= shift; + } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSRLD_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 31) { - dst.q = 0; - } else { - shift = src.b[0]; - dst.l[0] >>= shift; - dst.l[1] >>= shift; - } - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 31) - cpu_state.MM[cpu_reg].q = 0; - else { - cpu_state.MM[cpu_reg].l[0] >>= shift; - cpu_state.MM[cpu_reg].l[1] >>= shift; - } } + + MMX_GETSHIFT(); + + if (shift > 31) + dst->q = 0; + else { + dst->l[0] >>= shift; + dst->l[1] >>= shift; + } + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSRAD_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 31) { - src.q = 31; - } - shift = src.b[0]; - dst.sl[0] >>= shift; - dst.sl[1] >>= shift; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 31) - shift = 31; - - cpu_state.MM[cpu_reg].sl[0] >>= shift; - cpu_state.MM[cpu_reg].sl[1] >>= shift; } + + MMX_GETSHIFT(); + + if (shift > 31) + shift = 31; + + dst->sl[0] >>= shift; + dst->sl[1] >>= shift; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSRAD_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 31) { - src.q = 31; - } - shift = src.b[0]; - dst.sl[0] >>= shift; - dst.sl[1] >>= shift; - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 31) - shift = 31; - - cpu_state.MM[cpu_reg].sl[0] >>= shift; - cpu_state.MM[cpu_reg].sl[1] >>= shift; } + + MMX_GETSHIFT(); + + if (shift > 31) + shift = 31; + + dst->sl[0] >>= shift; + dst->sl[1] >>= shift; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } @@ -642,59 +515,37 @@ opPSxxQ_imm(uint32_t fetchdat) int reg = fetchdat & 7; int op = fetchdat & 0x38; int shift = (fetchdat >> 8) & 0xff; - MMX_REG dst; + MMX_REG *dst; cpu_state.pc += 2; + MMX_ENTER(); + + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[reg].fraction) : &(cpu_state.MM[reg]); + if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[reg].fraction; fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ } switch (op) { case 0x10: /*PSRLW*/ - if (fpu_softfloat) { - if (shift > 63) - dst.q = 0; - else - dst.q >>= shift; - - fpu_state.st_space[reg].fraction = dst.q; - fpu_state.st_space[reg].exp = 0xffff; - } else { - if (shift > 63) - cpu_state.MM[reg].q = 0; - else - cpu_state.MM[reg].q >>= shift; - } + if (shift > 63) + dst->q = 0; + else + dst->q >>= shift; break; case 0x20: /*PSRAW*/ if (shift > 63) shift = 63; - if (fpu_softfloat) { - dst.sq >>= shift; - fpu_state.st_space[reg].fraction = dst.q; - fpu_state.st_space[reg].exp = 0xffff; - } else - cpu_state.MM[reg].sq >>= shift; + dst->sq >>= shift; break; case 0x30: /*PSLLW*/ - if (fpu_softfloat) { - if (shift > 63) - dst.q = 0; - else - dst.q <<= shift; - - fpu_state.st_space[reg].fraction = dst.q; - fpu_state.st_space[reg].exp = 0xffff; - } else { - if (shift > 63) - cpu_state.MM[reg].q = 0; - else - cpu_state.MM[reg].q <<= shift; - } + if (shift > 63) + dst->q = 0; + else + dst->q <<= shift; break; default: cpu_state.pc = cpu_state.oldpc; @@ -702,6 +553,9 @@ opPSxxQ_imm(uint32_t fetchdat) return 0; } + if (fpu_softfloat) + fpu_state.st_space[reg].exp = 0xffff; + CLOCK_CYCLES(1); return 0; } @@ -709,133 +563,117 @@ opPSxxQ_imm(uint32_t fetchdat) static int opPSLLQ_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 63) { - dst.q = 0; - } else { - shift = src.b[0]; - dst.q <<= shift; - } - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 63) - cpu_state.MM[cpu_reg].q = 0; - else - cpu_state.MM[cpu_reg].q <<= shift; } + + MMX_GETSHIFT(); + + if (shift > 63) + dst->q = 0; + else + dst->q <<= shift; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSLLQ_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 63) { - dst.q = 0; - } else { - shift = src.b[0]; - dst.q <<= shift; - } - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 63) - cpu_state.MM[cpu_reg].q = 0; - else - cpu_state.MM[cpu_reg].q <<= shift; } + + MMX_GETSHIFT(); + + if (shift > 63) + dst->q = 0; + else + dst->q <<= shift; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSRLQ_a16(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_16(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 63) { - dst.q = 0; - } else { - shift = src.b[0]; - dst.q >>= shift; - } - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 63) - cpu_state.MM[cpu_reg].q = 0; - else - cpu_state.MM[cpu_reg].q >>= shift; } + + MMX_GETSHIFT(); + + if (shift > 63) + dst->q = 0; + else + dst->q >>= shift; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; } static int opPSRLQ_a32(uint32_t fetchdat) { - MMX_REG src, dst; + MMX_REG *dst; int shift; MMX_ENTER(); fetch_ea_32(fetchdat); - if (fpu_softfloat) { - dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction; - MMX_GETSRC(); + dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]); + + if (fpu_softfloat) { fpu_state.tag = 0; fpu_state.tos = 0; /* reset FPU Top-Of-Stack */ - if (src.q > 63) { - dst.q = 0; - } else { - shift = src.b[0]; - dst.q >>= shift; - } - fpu_state.st_space[cpu_reg].fraction = dst.q; - fpu_state.st_space[cpu_reg].exp = 0xffff; - } else { - MMX_GETSHIFT(); - - if (shift > 63) - cpu_state.MM[cpu_reg].q = 0; - else - cpu_state.MM[cpu_reg].q >>= shift; } + + MMX_GETSHIFT(); + + if (shift > 63) + dst->q = 0; + else + dst->q >>= shift; + + if (fpu_softfloat) + fpu_state.st_space[cpu_reg].exp = 0xffff; + return 0; }