Merge pull request #4233 from 86Box/tc1995
IDE/ATAPI port/irq changes for MCA:
This commit is contained in:
@@ -2793,6 +2793,7 @@ ide_board_init(int board, int irq, int base_main, int side_main, int type, int b
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ide_boards[board]->base[0] = base_main;
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ide_boards[board]->base[0] = base_main;
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ide_boards[board]->base[1] = side_main;
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ide_boards[board]->base[1] = side_main;
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if (!(bus & DEVICE_MCA))
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ide_set_handlers(board);
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ide_set_handlers(board);
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timer_add(&ide_boards[board]->timer, ide_board_callback, ide_boards[board], 0);
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timer_add(&ide_boards[board]->timer, ide_board_callback, ide_boards[board], 0);
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@@ -3065,10 +3066,18 @@ mcide_mca_write(int port, uint8_t val, void *priv)
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ide_readb, ide_readw, ide_readl,
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ide_readb, ide_readw, ide_readl,
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ide_writeb, ide_writew, ide_writel,
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ide_writeb, ide_writew, ide_writel,
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ide_boards[0]);
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ide_boards[0]);
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io_handler(0, ide_boards[0]->base[1], 1,
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ide_read_alt_status, NULL, NULL,
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ide_write_devctl, NULL, NULL,
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ide_boards[0]);
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io_handler(0, ide_boards[1]->base[0], 8,
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io_handler(0, ide_boards[1]->base[0], 8,
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ide_readb, ide_readw, ide_readl,
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ide_readb, ide_readw, ide_readl,
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ide_writeb, ide_writew, ide_writel,
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ide_writeb, ide_writew, ide_writel,
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ide_boards[1]);
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ide_boards[1]);
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io_handler(0, ide_boards[1]->base[1], 1,
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ide_read_alt_status, NULL, NULL,
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ide_write_devctl, NULL, NULL,
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ide_boards[1]);
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mem_mapping_disable(&dev->bios_rom.mapping);
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mem_mapping_disable(&dev->bios_rom.mapping);
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if (dev->pos_regs[2] & 0x80) {
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if (dev->pos_regs[2] & 0x80) {
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@@ -3105,37 +3114,43 @@ mcide_mca_write(int port, uint8_t val, void *priv)
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}
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}
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if (dev->pos_regs[3] & 0x08) {
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if (dev->pos_regs[3] & 0x08) {
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switch ((dev->pos_regs[3] & 3)) {
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switch (dev->pos_regs[3] & 3) {
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case 0:
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case 0:
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ide_boards[0]->base[0] = 0x1f0;
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ide_boards[0]->base[0] = 0x1f0;
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ide_boards[0]->base[1] = 0x3f6;
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break;
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break;
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case 1:
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case 1:
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ide_boards[0]->base[0] = 0x170;
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ide_boards[0]->base[0] = 0x170;
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ide_boards[0]->base[1] = 0x376;
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break;
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break;
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case 2:
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case 2:
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ide_boards[0]->base[0] = 0x1e8;
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ide_boards[0]->base[0] = 0x1e8;
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ide_boards[0]->base[1] = 0x3ee;
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break;
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break;
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case 3:
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case 3:
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ide_boards[0]->base[0] = 0x168;
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ide_boards[0]->base[0] = 0x168;
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ide_boards[0]->base[1] = 0x36e;
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break;
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break;
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default:
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default:
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break;
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break;
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}
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}
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} else
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} else {
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ide_boards[0]->base[0] = 0;
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ide_boards[0]->base[0] = 0;
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ide_boards[0]->base[1] = 0;
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}
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if (dev->pos_regs[3] & 0x80) {
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if (dev->pos_regs[3] & 0x80) {
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switch ((dev->pos_regs[3] >> 5) & 3) {
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switch (dev->pos_regs[3] & 0x30) {
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case 0:
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case 0x00:
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ide_boards[0]->irq = 10;
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ide_boards[0]->irq = 10;
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break;
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break;
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case 1:
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case 0x10:
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ide_boards[0]->irq = 11;
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ide_boards[0]->irq = 11;
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break;
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break;
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case 2:
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case 0x20:
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ide_boards[0]->irq = 14;
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ide_boards[0]->irq = 14;
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break;
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break;
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case 3:
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case 0x30:
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ide_boards[0]->irq = 15;
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ide_boards[0]->irq = 15;
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break;
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break;
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@@ -3149,34 +3164,40 @@ mcide_mca_write(int port, uint8_t val, void *priv)
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switch ((dev->pos_regs[4] & 3)) {
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switch ((dev->pos_regs[4] & 3)) {
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case 0:
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case 0:
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ide_boards[1]->base[0] = 0x1f0;
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ide_boards[1]->base[0] = 0x1f0;
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ide_boards[1]->base[1] = 0x3f6;
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break;
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break;
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case 1:
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case 1:
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ide_boards[1]->base[0] = 0x170;
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ide_boards[1]->base[0] = 0x170;
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ide_boards[1]->base[1] = 0x376;
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break;
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break;
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case 2:
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case 2:
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ide_boards[1]->base[0] = 0x1e8;
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ide_boards[1]->base[0] = 0x1e8;
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ide_boards[1]->base[1] = 0x3ee;
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break;
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break;
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case 3:
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case 3:
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ide_boards[1]->base[0] = 0x168;
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ide_boards[1]->base[0] = 0x168;
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ide_boards[1]->base[1] = 0x36e;
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break;
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break;
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default:
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default:
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break;
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break;
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}
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}
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} else
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} else {
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ide_boards[1]->base[0] = 0;
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ide_boards[1]->base[0] = 0;
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ide_boards[1]->base[1] = 0;
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}
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if (dev->pos_regs[4] & 0x80) {
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if (dev->pos_regs[4] & 0x80) {
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switch ((dev->pos_regs[4] >> 5) & 3) {
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switch (dev->pos_regs[4] & 0x30) {
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case 0:
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case 0x00:
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ide_boards[1]->irq = 10;
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ide_boards[1]->irq = 10;
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break;
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break;
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case 1:
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case 0x10:
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ide_boards[1]->irq = 11;
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ide_boards[1]->irq = 11;
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break;
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break;
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case 2:
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case 0x20:
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ide_boards[1]->irq = 14;
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ide_boards[1]->irq = 14;
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break;
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break;
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case 3:
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case 0x30:
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ide_boards[1]->irq = 15;
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ide_boards[1]->irq = 15;
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break;
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break;
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@@ -3187,26 +3208,36 @@ mcide_mca_write(int port, uint8_t val, void *priv)
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ide_boards[1]->irq = -1;
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ide_boards[1]->irq = -1;
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if (dev->pos_regs[2] & 1) {
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if (dev->pos_regs[2] & 1) {
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if ((dev->pos_regs[3] & 0x88) == 0x88)
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if (ide_boards[0]->base[0] && ide_boards[0]->base[1]) {
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io_handler(1, ide_boards[0]->base[0], 8,
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io_handler(1, ide_boards[0]->base[0], 8,
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ide_readb, ide_readw, ide_readl,
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ide_readb, ide_readw, ide_readl,
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ide_writeb, ide_writew, ide_writel,
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ide_writeb, ide_writew, ide_writel,
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ide_boards[0]);
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ide_boards[0]);
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io_handler(1, ide_boards[0]->base[1], 1,
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ide_read_alt_status, NULL, NULL,
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ide_write_devctl, NULL, NULL,
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ide_boards[0]);
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}
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if ((dev->pos_regs[4] & 0x88) == 0x88)
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if (ide_boards[1]->base[0] && ide_boards[1]->base[1]) {
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io_handler(1, ide_boards[1]->base[0], 8,
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io_handler(1, ide_boards[1]->base[0], 8,
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ide_readb, ide_readw, ide_readl,
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ide_readb, ide_readw, ide_readl,
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ide_writeb, ide_writew, ide_writel,
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ide_writeb, ide_writew, ide_writel,
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ide_boards[1]);
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ide_boards[1]);
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io_handler(1, ide_boards[1]->base[1], 1,
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ide_read_alt_status, NULL, NULL,
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ide_write_devctl, NULL, NULL,
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ide_boards[1]);
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}
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if (dev->pos_regs[2] & 0x80) {
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if (dev->bios_addr) {
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mem_mapping_enable(&dev->bios_rom.mapping);
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mem_mapping_enable(&dev->bios_rom.mapping);
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mem_mapping_set_addr(&dev->bios_rom.mapping,
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mem_mapping_set_addr(&dev->bios_rom.mapping,
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dev->bios_addr, 0x2000);
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dev->bios_addr, 0x4000);
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}
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}
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/* Say hello. */
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/* Say hello. */
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ide_log("McIDE: Primary I/O=%03x, Primary IRQ=%i, Secondary I/O=%03x, Secondary IRQ=%d, BIOS @%05X\n",
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ide_log("McIDE: Primary Master I/O=%03x, Primary IRQ=%i, Secondary Master I/O=%03x, Secondary IRQ=%d, BIOS @%05X\n",
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ide_boards[0]->base[0], ide_boards[0]->irq, ide_boards[1]->base[0], ide_boards[1]->irq, dev->bios_addr);
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ide_boards[0]->base[0], ide_boards[0]->irq, ide_boards[1]->base[0], ide_boards[1]->irq, dev->bios_addr);
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}
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}
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}
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}
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@@ -3255,7 +3286,7 @@ mcide_init(const device_t *info)
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ide_board_init(1, -1, 0, 0, info->local, info->flags);
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ide_board_init(1, -1, 0, 0, info->local, info->flags);
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rom_init(&dev->bios_rom, ROM_PATH_MCIDE,
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rom_init(&dev->bios_rom, ROM_PATH_MCIDE,
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0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL);
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0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
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mem_mapping_disable(&dev->bios_rom.mapping);
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mem_mapping_disable(&dev->bios_rom.mapping);
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/* Set the MCA ID for this controller, 0xF171. */
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/* Set the MCA ID for this controller, 0xF171. */
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@@ -3375,7 +3406,7 @@ const device_t ide_pci_2ch_device = {
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const device_t mcide_device = {
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const device_t mcide_device = {
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.name = "MCA McIDE Controller",
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.name = "MCA McIDE Controller",
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.internal_name = "mcide",
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.internal_name = "ide_mcide",
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.flags = DEVICE_MCA,
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.flags = DEVICE_MCA,
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.local = 0,
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.local = 0,
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.init = mcide_init,
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.init = mcide_init,
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