From 298d25a6da38ace2d74873af76ba2c0533b48ce6 Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Fri, 12 Jun 2020 20:58:13 +0300 Subject: [PATCH] Added 2 missing MSR's. Fixes the Tyan Tsunami ATX & SuperMicro P6SBA hate on i686 CPU's --- src/cpu_common/cpu.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/src/cpu_common/cpu.c b/src/cpu_common/cpu.c index 67fa82234..099658875 100644 --- a/src/cpu_common/cpu.c +++ b/src/cpu_common/cpu.c @@ -60,7 +60,7 @@ # include "codegen.h" #endif -/* #define ENABLE_CPU_LOG 1 */ +/*#define ENABLE_CPU_LOG 1*/ static void cpu_write(uint16_t addr, uint8_t val, void *priv); static uint8_t cpu_read(uint16_t addr, void *priv); @@ -212,6 +212,13 @@ uint64_t ecx410_msr = 0; uint64_t ecx570_msr = 0; uint64_t ecx83_msr = 0; /* AMD K5 and K6 MSR's. */ + +/* Some weird long MSR's used by the Tyan Tsunami ATX */ +/* Will respond with: 0404040404040404. It'll be nice */ +/* If somebody could check them. */ +uint64_t ecxf0f00250_msr = 0; +uint64_t ecxf0f00258_msr = 0; + uint64_t star = 0; /* AMD K6-2+. */ uint64_t amd_efer = 0, amd_whcr = 0, @@ -2903,6 +2910,14 @@ void cpu_RDMSR() EAX = ecx570_msr & 0xffffffff; EDX = ecx570_msr >> 32; break; + case 0xf0f00250: + EAX = ecxf0f00250_msr & 0xffffffff; + EDX = ecxf0f00250_msr >> 32; + break; + case 0xf0f00258: + EAX = ecxf0f00258_msr & 0xffffffff; + EDX = ecxf0f00258_msr >> 32; + break; default: i686_invalid_rdmsr: cpu_log("RDMSR: Invalid MSR: %08X\n", ECX); @@ -3333,6 +3348,12 @@ void cpu_WRMSR() case 0x570: ecx570_msr = EAX | ((uint64_t)EDX << 32); break; + case 0xf0f00250: + ecxf0f00250_msr = EAX | ((uint64_t)EDX << 32); + break; + case 0xf0f00258: + ecxf0f00258_msr = EAX | ((uint64_t)EDX << 32); + break; default: i686_invalid_wrmsr: cpu_log("WRMSR: Invalid MSR: %08X\n", ECX);