From 2bfa946244f4b952ec9b1d3145acf6d367b618f1 Mon Sep 17 00:00:00 2001 From: anabate123 <62159176+anabate123@users.noreply.github.com> Date: Thu, 26 Mar 2020 16:59:43 -0400 Subject: [PATCH] Added more speeds to Celeron (Slot 1/Socket 370) What would preliminary Mendocino emulation be without the remaining speeds? --- src/cpu_common/cpu_table.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/src/cpu_common/cpu_table.c b/src/cpu_common/cpu_table.c index d13877db7..46289be47 100644 --- a/src/cpu_common/cpu_table.c +++ b/src/cpu_common/cpu_table.c @@ -723,8 +723,16 @@ CPU cpus_Celeron[] = { // Mendocino Celerons. Exact architecture as the P2D seri // The 100Mhz Mendocino is only meant to not cause any struggle // to the recompiler. - {"Celeron Mendocino 100", CPU_PENTIUM2D, 100000000, 3/2, 0x665, 0x665, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10, 6, 6, 12}, + {"Celeron Mendocino 66", CPU_PENTIUM2D, 66666666, 1, 0x665, 0x665, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6, 6, 3, 3, 8}, + {"Celeron Mendocino 100", CPU_PENTIUM2D, 100000000, 3/2, 0x665, 0x665, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10, 6, 6, 12}, + {"Celeron Mendocino 300/66", CPU_PENTIUM2D, 300000000, 9/2, 0x665, 0x665, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 25,25,12,12, 36}, {"Celeron Mendocino 333", CPU_PENTIUM2D, 333333333, 5, 0x665, 0x665, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 40}, + {"Celeron Mendocino 366", CPU_PENTIUM2D, 366666666, 11/2, 0x665, 0x665, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 33,33,17,17, 44}, + {"Celeron Mendocino 400", CPU_PENTIUM2D, 400000000, 4, 0x665, 0x665, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 36,36,12,12, 48}, + {"Celeron Mendocino 433", CPU_PENTIUM2D, 433333333, 9/2, 0x665, 0x665, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 39,39,13,13, 51}, + {"Celeron Mendocino 466", CPU_PENTIUM2D, 466666666, 5, 0x665, 0x665, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 43,43,15,15, 57}, + {"Celeron Mendocino 500", CPU_PENTIUM2D, 500000000, 5, 0x665, 0x665, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 45,45,15,15, 60}, + {"Celeron Mendocino 533", CPU_PENTIUM2D, 533333333, 11/2, 0x665, 0x665, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 48,48,17,17, 64}, {"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} }; #endif @@ -745,4 +753,4 @@ CPU cpus_Cyrix3[] = { {"Cyrix III 650", CPU_CYRIX3S, 650000000, 6.5, 0x662, 0x662, 0, CPU_SUPPORTS_DYNAREC, 58, 58, 20, 20, 78}, {"Cyrix III 700", CPU_CYRIX3S, 700000000, 7, 0x662, 0x662, 0, CPU_SUPPORTS_DYNAREC, 62, 62, 21, 21, 84}, {"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} -}; \ No newline at end of file +};