diff --git a/src/intel_piix.c b/src/intel_piix.c index db76455dc..369d4166b 100644 --- a/src/intel_piix.c +++ b/src/intel_piix.c @@ -10,7 +10,7 @@ * word 0 - base address * word 1 - bits 1-15 = byte count, bit 31 = end of transfer * - * Version: @(#)intel_piix.c 1.0.12 2018/02/14 + * Version: @(#)intel_piix.c 1.0.13 2018/02/23 * * Authors: Sarah Walker, * Miran Grca, @@ -77,24 +77,12 @@ void piix_write(int func, int addr, uint8_t val, void *priv) card_piix_ide[0x40] = val; break; case 0x41: - if ((val ^ card_piix_ide[0x41]) & 0x80) - { - ide_pri_disable(); - if (val & 0x80) - ide_pri_enable(); - } card_piix_ide[0x41] = val; break; case 0x42: card_piix_ide[0x42] = val; break; case 0x43: - if ((val ^ card_piix_ide[0x43]) & 0x80) - { - ide_sec_disable(); - if (val & 0x80) - ide_sec_enable(); - } card_piix_ide[0x43] = val; break; case 0x44: @@ -109,6 +97,18 @@ void piix_write(int func, int addr, uint8_t val, void *priv) if ((card_piix_ide[0x04] & 1) && base) io_sethandler(base, 0x10, piix_bus_master_read, NULL, NULL, piix_bus_master_write, NULL, NULL, NULL); } + if (addr == 4 || addr == 0x41 || addr == 0x43) + { + ide_pri_disable(); + ide_sec_disable(); + if (card_piix_ide[0x04] & 1) + { + if (card_piix_ide[0x41] & 0x80) + ide_pri_enable(); + if (card_piix_ide[0x43] & 0x80) + ide_sec_enable(); + } + } } else { @@ -673,7 +673,7 @@ void piix_reset(void) card_piix_ide[0x00] = 0x86; card_piix_ide[0x01] = 0x80; /*Intel*/ card_piix_ide[0x02] = 0x30; card_piix_ide[0x03] = 0x12; /*82371FB (PIIX)*/ - card_piix_ide[0x04] = 0x07; card_piix_ide[0x05] = 0x00; + card_piix_ide[0x04] = 0x02; card_piix_ide[0x05] = 0x00; card_piix_ide[0x06] = 0x80; card_piix_ide[0x07] = 0x02; card_piix_ide[0x08] = 0x00; card_piix_ide[0x09] = 0x80; card_piix_ide[0x0a] = 0x01; card_piix_ide[0x0b] = 0x01; @@ -685,6 +685,9 @@ void piix_reset(void) pci_set_mirq_routing(PCI_MIRQ0, PCI_IRQ_DISABLED); pci_set_mirq_routing(PCI_MIRQ1, PCI_IRQ_DISABLED); + + ide_pri_disable(); + ide_sec_disable(); } void piix3_reset(void) @@ -717,7 +720,7 @@ void piix3_reset(void) card_piix_ide[0x00] = 0x86; card_piix_ide[0x01] = 0x80; /*Intel*/ card_piix_ide[0x02] = 0x10; card_piix_ide[0x03] = 0x70; /*82371SB (PIIX3)*/ - card_piix_ide[0x04] = 0x07; card_piix_ide[0x05] = 0x00; + card_piix_ide[0x04] = 0x02; card_piix_ide[0x05] = 0x00; card_piix_ide[0x06] = 0x80; card_piix_ide[0x07] = 0x02; card_piix_ide[0x08] = 0x00; card_piix_ide[0x09] = 0x80; card_piix_ide[0x0a] = 0x01; card_piix_ide[0x0b] = 0x01; @@ -729,6 +732,9 @@ void piix3_reset(void) card_piix_ide[0x44] = 0x00; pci_set_mirq_routing(PCI_MIRQ0, PCI_IRQ_DISABLED); + + ide_pri_disable(); + ide_sec_disable(); } void piix_init(int card) diff --git a/src/machine/m_at_430fx.c b/src/machine/m_at_430fx.c index 3cc00aa3b..258a4ff7a 100644 --- a/src/machine/m_at_430fx.c +++ b/src/machine/m_at_430fx.c @@ -8,7 +8,7 @@ * * Implementation of the Intel 430FX PCISet chip. * - * Version: @(#)m_at_430fx.c 1.0.12 2018/02/14 + * Version: @(#)m_at_430fx.c 1.0.13 2018/02/23 * * Authors: Sarah Walker, * Miran Grca, @@ -31,6 +31,7 @@ #include "../intel_flash.h" #include "../sio.h" #include "../video/video.h" +#include "../video/vid_cl54xx.h" #include "../video/vid_s3.h" #include "machine.h" @@ -158,7 +159,7 @@ static void i430fx_reset(void) { memset(card_i430fx, 0, 256); card_i430fx[0x00] = 0x86; card_i430fx[0x01] = 0x80; /*Intel*/ - card_i430fx[0x02] = 0x22; card_i430fx[0x03] = 0x01; /*SB82437FX-66*/ + card_i430fx[0x02] = 0x2d; card_i430fx[0x03] = 0x16; /*SB82437FX-66*/ card_i430fx[0x04] = 0x06; card_i430fx[0x05] = 0x00; card_i430fx[0x06] = 0x00; card_i430fx[0x07] = 0x82; if (romset == ROM_MB500N) card_i430fx[0x07] = 0x02; diff --git a/src/video/video.c b/src/video/video.c index bc699d519..bfb36cede 100644 --- a/src/video/video.c +++ b/src/video/video.c @@ -40,7 +40,7 @@ * W = 3 bus clocks * L = 4 bus clocks * - * Version: @(#)video.c 1.0.14 2018/02/01 + * Version: @(#)video.c 1.0.15 2018/02/23 * * Authors: Sarah Walker, * Miran Grca, @@ -351,6 +351,7 @@ static video_timings_t timing_wd90c11 = {VIDEO_ISA, 3, 3, 6, 5, 5,10}; static video_timings_t timing_vga = {VIDEO_ISA, 8,16,32, 8,16,32}; static video_timings_t timing_ps1_svga = {VIDEO_ISA, 6, 8,16, 6, 8,16}; static video_timings_t timing_t3100e = {VIDEO_ISA, 8,16,32, 8,16,32}; +static video_timings_t timing_endeavor = {VIDEO_BUS, 3, 2, 4,25,25,40}; void video_update_timing(void) @@ -402,6 +403,9 @@ video_update_timing(void) case ROM_T3100E: timing = &timing_t3100e; break; + case ROM_ENDEAVOR: + timing = &timing_endeavor; + break; default: new_gfxcard = video_old_to_new(gfxcard); timing = video_card_gettiming(new_gfxcard);