diff --git a/src/chipset/opti291.c b/src/chipset/opti291.c index cad4341a9..f9dadc72f 100644 --- a/src/chipset/opti291.c +++ b/src/chipset/opti291.c @@ -35,33 +35,41 @@ typedef struct { uint8_t index, regs[256]; + port_92_t *port_92; } opti291_t; static void opti291_recalc(opti291_t *dev) { uint32_t base; - uint32_t i, shflags, write = 0; - + uint32_t i, shflags, write, writef = 0; + + + writef = (dev->regs[0x27] & 0x80) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + if (!(dev->regs[0x23] & 0x40)) + mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | writef); + else + mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTANY | writef); + for (i = 0; i < 4; i++) { base = 0xe0000 + (i << 14); shflags = (dev->regs[0x24] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - shflags |= (dev->regs[0x24] & (1 << (i))) ? write : MEM_WRITE_EXTANY; - write = (dev->regs[0x27] & 0x40) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + write = (dev->regs[0x24] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + shflags |= (dev->regs[0x27] & 0x40) ? MEM_WRITE_DISABLED : write; mem_set_mem_state(base, 0x4000, shflags); } for (i = 0; i < 4; i++) { base = 0xd0000 + (i << 14); shflags = (dev->regs[0x25] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - shflags |= (dev->regs[0x25] & (1 << (i))) ? write : MEM_WRITE_EXTANY; - write = (dev->regs[0x27] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + write = (dev->regs[0x25] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + shflags |= (dev->regs[0x27] & 0x20) ? MEM_WRITE_DISABLED : write; mem_set_mem_state(base, 0x4000, shflags); } for (i = 0; i < 4; i++) { base = 0xc0000 + (i << 14); shflags = (dev->regs[0x26] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - shflags |= (dev->regs[0x26] & (1 << i)) ? write : MEM_WRITE_EXTANY; - write = (dev->regs[0x27] & 0x10) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + write = (dev->regs[0x26] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + shflags |= (dev->regs[0x27] & 0x10) ? MEM_WRITE_DISABLED : write; mem_set_mem_state(base, 0x4000, shflags); } flushmmucache(); @@ -83,10 +91,11 @@ opti291_write(uint16_t addr, uint8_t val, void *priv) case 0x21: cpu_update_waitstates(); break; + case 0x23: case 0x24: case 0x25: case 0x26: - case 0x27: + case 0x27: opti291_recalc(dev); break; } @@ -103,6 +112,7 @@ opti291_read(uint16_t addr, void *priv) switch (addr) { case 0x24: +// pclog("OPTi 291: read from dev->regs[%02x]\n", dev->index); ret = dev->regs[dev->index]; break; } @@ -128,7 +138,8 @@ opti291_init(const device_t *info) io_sethandler(0x022, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev); io_sethandler(0x024, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev); - + dev->regs[0x23] = 0x40; + dev->port_92 = device_add(&port_92_device); opti291_recalc(dev); return dev; diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 3cc76ad1a..01524ead3 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -171,10 +171,11 @@ const machine_t machines[] = { { "[NEAT] DTK 386SX clone", "dtk386", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_neat_init, NULL }, { "[NEAT] Goldstar 386", "goldstar386", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_goldstar386_init, NULL }, { "[SCAT] KMX-C-02", "kmxc02", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 512, 127, machine_at_kmxc02_init, NULL }, - { "[Intel 82335] Shuttle 386SX", "shuttle386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_shuttle386sx_init, NULL }, - { "[Intel 82335] ADI 386SX", "adi386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_adi386sx_init, NULL }, - { "[OPTi 291] DTK Award 386SX", "awardsx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_awardsx_init, NULL }, - + + { "[Intel 82335] Shuttle 386SX", "shuttle386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_shuttle386sx_init, NULL }, + { "[Intel 82335] ADI 386SX", "adi386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_adi386sx_init, NULL }, + { "[OPTi 291] DTK Award 386SX", "awardsx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_awardsx_init, NULL }, + /* 386SX machines which utilize the MCA bus */ { "[MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"IBM",cpus_IBM486SLC},{"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL },