From f29e48d2d76a33da68e0ec3410a07e706b4c2278 Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Tue, 23 Jun 2020 14:00:34 +0300 Subject: [PATCH] Restored the Intel 82335 chipset Restored the old Intel 82335 code remnant of the PCem-X era. --- src/chipset/i82335.c | 334 +++++++++++++++++++++--------------- src/include/86box/chipset.h | 3 +- src/include/86box/machine.h | 1 + src/machine/machine_table.c | 1 + src/win/Makefile.mingw | 2 +- 5 files changed, 202 insertions(+), 139 deletions(-) diff --git a/src/chipset/i82335.c b/src/chipset/i82335.c index b5594f4da..4817a53b6 100644 --- a/src/chipset/i82335.c +++ b/src/chipset/i82335.c @@ -1,137 +1,197 @@ -/* Intel 82335 SX emulation, used by the Phoenix 386 clone. */ - -#include -#include -#include -#include -#include <86box/io.h> -#include <86box/mem.h> - -typedef struct -{ - uint8_t reg_22; - uint8_t reg_23; -} i82335_t; - -i82335_t i82335; - -uint8_t i82335_read(uint16_t addr, void *priv); - -void i82335_write(uint16_t addr, uint8_t val, void *priv) -{ - int i = 0; - - int mem_write = 0; - - // pclog("i82335_write(%04X, %02X)\n", addr, val); - - switch (addr) - { - case 0x22: - if ((val ^ i82335.reg_22) & 1) - { - if (val & 1) - { - for (i = 0; i < 8; i++) - { - mem_set_mem_state(0xe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - shadowbios = 1; - } - } - else - { - for (i = 0; i < 8; i++) - { - mem_set_mem_state(0xe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - shadowbios = 0; - } - } - - flushmmucache(); - } - - i82335.reg_22 = val | 0xd8; - break; - case 0x23: - i82335.reg_23 = val; - - if ((val ^ i82335.reg_22) & 2) - { - if (val & 2) - { - for (i = 0; i < 8; i++) - { - mem_set_mem_state(0xc0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - shadowbios = 1; - } - } - else - { - for (i = 0; i < 8; i++) - { - mem_set_mem_state(0xc0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - shadowbios = 0; - } - } - } - - if ((val ^ i82335.reg_22) & 0xc) - { - if (val & 2) - { - for (i = 0; i < 8; i++) - { - mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | mem_write); - shadowbios = 1; - } - } - else - { - for (i = 0; i < 8; i++) - { - mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY; - mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTANY | mem_write); - shadowbios = 0; - } - } - } - - if ((val ^ i82335.reg_22) & 0xe) - { - flushmmucache(); - } - - if (val & 0x80) - { - io_removehandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL); - } - break; - } -} - -uint8_t i82335_read(uint16_t addr, void *priv) -{ - // pclog("i82335_read(%04X)\n", addr); - if (addr == 0x22) - { - return i82335.reg_22; - } - else if (addr == 0x23) - { - return i82335.reg_23; - } - else - { - return 0; - } -} - -void i82335_init() -{ - memset(&i82335, 0, sizeof(i82335_t)); - - i82335.reg_22 = 0xd8; - - io_sethandler(0x0022, 0x0014, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL); -} +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the Intel 82335(KU82335) chipset. + * + * + * + * Authors: Sarah Walker, + * Miran Grca, + * + * Copyright 2008-2020 Sarah Walker. + * Copyright 2016-2020 Miran Grca. + * Copyright 2020 Tiseno100 + * + */ + +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include "cpu.h" +#include <86box/timer.h> +#include <86box/io.h> +#include <86box/device.h> +#include <86box/keyboard.h> +#include <86box/mem.h> +#include <86box/fdd.h> +#include <86box/fdc.h> +#include <86box/chipset.h> + + +typedef struct +{ + uint8_t reg_22; + uint8_t reg_23; +} i82335_t; + +static uint8_t i82335_read(uint16_t addr, void *priv); + +static void +i82335_write(uint16_t addr, uint8_t val, void *priv) +{ + i82335_t *dev = (i82335_t *) priv; + + int mem_write = 0; + + switch (addr) + { + case 0x22: + if ((val ^ dev->reg_22) & 1) + { + if (val & 1) + { + for (int i = 0; i < 8; i++) + { + mem_set_mem_state(0xe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + shadowbios = 1; + } + } + else + { + for (int i = 0; i < 8; i++) + { + mem_set_mem_state(0xe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + shadowbios = 0; + } + } + + flushmmucache(); + } + + dev->reg_22 = val | 0xd8; + break; + + case 0x23: + dev->reg_23 = val; + + if ((val ^ dev->reg_22) & 2) + { + if (val & 2) + { + for (int i = 0; i < 8; i++) + { + mem_set_mem_state(0xc0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + shadowbios = 1; + } + } + else + { + for (int i = 0; i < 8; i++) + { + mem_set_mem_state(0xc0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + shadowbios = 0; + } + } + } + + if ((val ^ dev->reg_22) & 0xc) + { + if (val & 2) + { + for (int i = 0; i < 8; i++) + { + mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | mem_write); + shadowbios = 1; + } + } + else + { + for (int i = 0; i < 8; i++) + { + mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY; + mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTANY | mem_write); + shadowbios = 0; + } + } + } + + if ((val ^ dev->reg_22) & 0xe) + { + flushmmucache(); + } + + if (val & 0x80) + { + io_removehandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL); + io_removehandler(0x0023, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL); + } + break; + } +} + + +static uint8_t +i82335_read(uint16_t addr, void *priv) +{ + uint8_t ret = 0xff; + i82335_t *dev = (i82335_t *) priv; + + switch(addr){ + case 0x22: + return dev->reg_22; + break; + case 0x23: + return dev->reg_23; + break; + default: + return 0; + break; + } + + return ret; +} + + +static void +i82335_close(void *priv) +{ + i82335_t *dev = (i82335_t *) priv; + + free(dev); +} + + +static void * +i82335_init(const device_t *info) +{ + i82335_t *dev = (i82335_t *) malloc(sizeof(i82335_t)); + memset(dev, 0, sizeof(i82335_t)); + + dev->reg_22 = 0xd8; + + io_sethandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, dev); + io_sethandler(0x0023, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, dev); + + return dev; +} + + +const device_t i82335_device = { + "Intel 82335", + 0, + 0, + i82335_init, i82335_close, NULL, + NULL, NULL, NULL, + NULL +}; diff --git a/src/include/86box/chipset.h b/src/include/86box/chipset.h index e0d7b178c..210ec241d 100644 --- a/src/include/86box/chipset.h +++ b/src/include/86box/chipset.h @@ -31,7 +31,8 @@ extern const device_t ali1429_device; extern const device_t headland_device; extern const device_t headland_386_device; -/* Intel 4x0xX */ +/* Intel */ +extern const device_t i82335_device; extern const device_t i420ex_device; extern const device_t i420tx_device; extern const device_t i420zx_device; diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 343046f82..96b684b41 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -235,6 +235,7 @@ extern int machine_at_spc4216p_init(const machine_t *); extern int machine_at_kmxc02_init(const machine_t *); extern int machine_at_deskmaster286_init(const machine_t *); +extern int machine_at_shuttle386sx_init(const machine_t *); extern int machine_at_commodore_sl386sx_init(const machine_t *); extern int machine_at_wd76c10_init(const machine_t *); diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 4316dfabe..ef1a0db74 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -171,6 +171,7 @@ const machine_t machines[] = { { "[NEAT] DTK 386SX clone", "dtk386", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_neat_init, NULL }, { "[NEAT] Goldstar 386", "goldstar386", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_goldstar386_init, NULL }, { "[SCAT] KMX-C-02", "kmxc02", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 512, 127, machine_at_kmxc02_init, NULL }, + { "[Intel 82335] Shuttle 386SX", "shuttle386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_shuttle386sx_init, NULL }, /* 386SX machines which utilize the MCA bus */ { "[MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"IBM",cpus_IBM486SLC},{"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL }, diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 08122e8aa..361e961fd 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -559,7 +559,7 @@ CPUOBJ := cpu.o cpu_table.o \ x86seg.o x87.o x87_timings.o \ $(DYNARECOBJ) -CHIPSETOBJ := acc2168.o acer_m3a.o cs8230.o ali1429.o headland.o \ +CHIPSETOBJ := acc2168.o acer_m3a.o cs8230.o ali1429.o headland.o i82335.o\ intel_420ex.o intel_4x0.o intel_sio.o intel_piix.o ioapic.o \ neat.o opti495.o opti5x7.o scamp.o scat.o \ sis_85c310.o sis_85c471.o sis_85c496.o \