From 326b329c971070b49167ff8d3f668c760fc75ef4 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 16 May 2023 00:46:39 +0200 Subject: [PATCH] (REP) MOVS*, CMPS*: Make sure to do the segment checks first to ensure GPF has priority over page fault. --- src/cpu/x86_ops_rep.h | 12 +++++----- src/cpu/x86_ops_rep_dyn.h | 12 +++++----- src/cpu/x86_ops_string.h | 48 +++++++++++++++++++-------------------- 3 files changed, 36 insertions(+), 36 deletions(-) diff --git a/src/cpu/x86_ops_rep.h b/src/cpu/x86_ops_rep.h index 4b8f42185..a49db7e81 100644 --- a/src/cpu/x86_ops_rep.h +++ b/src/cpu/x86_ops_rep.h @@ -226,11 +226,11 @@ uint8_t temp; \ \ CHECK_READ_REP(cpu_state.ea_seg, SRC_REG, SRC_REG); \ + CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG); \ high_page = 0; \ do_mmut_rb(cpu_state.ea_seg->base, SRC_REG, &addr64); \ if (cpu_state.abrt) \ break; \ - CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG); \ do_mmut_wb(es, DEST_REG, &addr64_2); \ if (cpu_state.abrt) \ break; \ @@ -280,11 +280,11 @@ uint16_t temp; \ \ CHECK_READ_REP(cpu_state.ea_seg, SRC_REG, SRC_REG + 1UL); \ + CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL); \ high_page = 0; \ do_mmut_rw(cpu_state.ea_seg->base, SRC_REG, addr64a); \ if (cpu_state.abrt) \ break; \ - CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL); \ do_mmut_ww(es, DEST_REG, addr64a_2); \ if (cpu_state.abrt) \ break; \ @@ -334,11 +334,11 @@ uint32_t temp; \ \ CHECK_READ_REP(cpu_state.ea_seg, SRC_REG, SRC_REG + 3UL); \ + CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL); \ high_page = 0; \ do_mmut_rl(cpu_state.ea_seg->base, SRC_REG, addr64a); \ if (cpu_state.abrt) \ break; \ - CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL); \ do_mmut_wl(es, DEST_REG, addr64a_2); \ if (cpu_state.abrt) \ break; \ @@ -582,11 +582,11 @@ SEG_CHECK_READ(cpu_state.ea_seg); \ SEG_CHECK_READ(&cpu_state.seg_es); \ CHECK_READ(cpu_state.ea_seg, SRC_REG, SRC_REG); \ + CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG); \ high_page = uncached = 0; \ do_mmut_rb(cpu_state.ea_seg->base, SRC_REG, &addr64); \ if (cpu_state.abrt) \ return 1; \ - CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG); \ do_mmut_rb2(es, DEST_REG, &addr64_2); \ if (cpu_state.abrt) \ return 1; \ @@ -636,11 +636,11 @@ SEG_CHECK_READ(cpu_state.ea_seg); \ SEG_CHECK_READ(&cpu_state.seg_es); \ CHECK_READ(cpu_state.ea_seg, SRC_REG, SRC_REG + 1UL); \ + CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL); \ high_page = uncached = 0; \ do_mmut_rw(cpu_state.ea_seg->base, SRC_REG, addr64a); \ if (cpu_state.abrt) \ return 1; \ - CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL); \ do_mmut_rw2(es, DEST_REG, addr64a_2); \ if (cpu_state.abrt) \ return 1; \ @@ -690,11 +690,11 @@ SEG_CHECK_READ(cpu_state.ea_seg); \ SEG_CHECK_READ(&cpu_state.seg_es); \ CHECK_READ(cpu_state.ea_seg, SRC_REG, SRC_REG + 3UL); \ + CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL); \ high_page = uncached = 0; \ do_mmut_rl(cpu_state.ea_seg->base, SRC_REG, addr64a); \ if (cpu_state.abrt) \ return 1; \ - CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL); \ do_mmut_rl2(es, DEST_REG, addr64a_2); \ if (cpu_state.abrt) \ return 1; \ diff --git a/src/cpu/x86_ops_rep_dyn.h b/src/cpu/x86_ops_rep_dyn.h index 5c64ed94d..cf32209cc 100644 --- a/src/cpu/x86_ops_rep_dyn.h +++ b/src/cpu/x86_ops_rep_dyn.h @@ -189,11 +189,11 @@ uint8_t temp; \ \ CHECK_READ_REP(cpu_state.ea_seg, SRC_REG, SRC_REG); \ + CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG); \ high_page = 0; \ do_mmut_rb(cpu_state.ea_seg->base, SRC_REG, &addr64); \ if (cpu_state.abrt) \ break; \ - CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG); \ do_mmut_wb(es, DEST_REG, &addr64_2); \ if (cpu_state.abrt) \ break; \ @@ -238,11 +238,11 @@ uint16_t temp; \ \ CHECK_READ_REP(cpu_state.ea_seg, SRC_REG, SRC_REG + 1UL); \ + CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL); \ high_page = 0; \ do_mmut_rw(cpu_state.ea_seg->base, SRC_REG, addr64a); \ if (cpu_state.abrt) \ break; \ - CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL); \ do_mmut_ww(es, DEST_REG, addr64a_2); \ if (cpu_state.abrt) \ break; \ @@ -287,11 +287,11 @@ uint32_t temp; \ \ CHECK_READ_REP(cpu_state.ea_seg, SRC_REG, SRC_REG + 3UL); \ + CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL); \ high_page = 0; \ do_mmut_rl(cpu_state.ea_seg->base, SRC_REG, addr64a); \ if (cpu_state.abrt) \ break; \ - CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL); \ do_mmut_wl(es, DEST_REG, addr64a_2); \ if (cpu_state.abrt) \ break; \ @@ -507,11 +507,11 @@ SEG_CHECK_READ(cpu_state.ea_seg); \ SEG_CHECK_READ(&cpu_state.seg_es); \ CHECK_READ(cpu_state.ea_seg, SRC_REG, SRC_REG); \ + CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG); \ high_page = uncached = 0; \ do_mmut_rb(cpu_state.ea_seg->base, SRC_REG, &addr64); \ if (cpu_state.abrt) \ return 1; \ - CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG); \ do_mmut_rb2(es, DEST_REG, &addr64_2); \ if (cpu_state.abrt) \ return 1; \ @@ -558,11 +558,11 @@ SEG_CHECK_READ(cpu_state.ea_seg); \ SEG_CHECK_READ(&cpu_state.seg_es); \ CHECK_READ(cpu_state.ea_seg, SRC_REG, SRC_REG + 1UL); \ + CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL); \ high_page = uncached = 0; \ do_mmut_rw(cpu_state.ea_seg->base, SRC_REG, addr64a); \ if (cpu_state.abrt) \ return 1; \ - CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 1UL); \ do_mmut_rw2(es, DEST_REG, addr64a_2); \ if (cpu_state.abrt) \ return 1; \ @@ -609,11 +609,11 @@ SEG_CHECK_READ(cpu_state.ea_seg); \ SEG_CHECK_READ(&cpu_state.seg_es); \ CHECK_READ(cpu_state.ea_seg, SRC_REG, SRC_REG + 3UL); \ + CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL); \ high_page = uncached = 0; \ do_mmut_rl(cpu_state.ea_seg->base, SRC_REG, addr64a); \ if (cpu_state.abrt) \ return 1; \ - CHECK_READ(&cpu_state.seg_es, DEST_REG, DEST_REG + 3UL); \ do_mmut_rl2(es, DEST_REG, addr64a_2); \ if (cpu_state.abrt) \ return 1; \ diff --git a/src/cpu/x86_ops_string.h b/src/cpu/x86_ops_string.h index c3875a648..c9ba94760 100644 --- a/src/cpu/x86_ops_string.h +++ b/src/cpu/x86_ops_string.h @@ -6,13 +6,13 @@ opMOVSB_a16(uint32_t fetchdat) addr64 = addr64_2 = 0x00000000; SEG_CHECK_READ(cpu_state.ea_seg); + SEG_CHECK_WRITE(&cpu_state.seg_es); CHECK_READ(cpu_state.ea_seg, SI, SI); + CHECK_WRITE(&cpu_state.seg_es, DI, DI); high_page = 0; do_mmut_rb(cpu_state.ea_seg->base, SI, &addr64); if (cpu_state.abrt) return 1; - SEG_CHECK_WRITE(&cpu_state.seg_es); - CHECK_WRITE(&cpu_state.seg_es, DI, DI); do_mmut_wb(es, DI, &addr64_2); if (cpu_state.abrt) @@ -42,13 +42,13 @@ opMOVSB_a32(uint32_t fetchdat) addr64 = addr64_2 = 0x00000000; SEG_CHECK_READ(cpu_state.ea_seg); + SEG_CHECK_WRITE(&cpu_state.seg_es); CHECK_READ(cpu_state.ea_seg, ESI, ESI); + CHECK_WRITE(&cpu_state.seg_es, EDI, EDI); high_page = 0; do_mmut_rb(cpu_state.ea_seg->base, ESI, &addr64); if (cpu_state.abrt) return 1; - SEG_CHECK_WRITE(&cpu_state.seg_es); - CHECK_WRITE(&cpu_state.seg_es, EDI, EDI); do_mmut_wb(es, EDI, &addr64_2); if (cpu_state.abrt) return 1; @@ -79,13 +79,13 @@ opMOVSW_a16(uint32_t fetchdat) addr64a_2[0] = addr64a_2[1] = 0x00000000; SEG_CHECK_READ(cpu_state.ea_seg); + SEG_CHECK_WRITE(&cpu_state.seg_es); CHECK_READ(cpu_state.ea_seg, SI, SI + 1UL); + CHECK_WRITE(&cpu_state.seg_es, DI, DI + 1UL); high_page = 0; do_mmut_rw(cpu_state.ea_seg->base, SI, addr64a); if (cpu_state.abrt) return 1; - SEG_CHECK_WRITE(&cpu_state.seg_es); - CHECK_WRITE(&cpu_state.seg_es, DI, DI + 1UL); do_mmut_ww(es, DI, addr64a_2); if (cpu_state.abrt) return 1; @@ -115,13 +115,13 @@ opMOVSW_a32(uint32_t fetchdat) addr64a_2[0] = addr64a_2[1] = 0x00000000; SEG_CHECK_READ(cpu_state.ea_seg); + SEG_CHECK_WRITE(&cpu_state.seg_es); CHECK_READ(cpu_state.ea_seg, ESI, ESI + 1UL); + CHECK_WRITE(&cpu_state.seg_es, EDI, EDI + 1UL); high_page = 0; do_mmut_rw(cpu_state.ea_seg->base, ESI, addr64a); if (cpu_state.abrt) return 1; - SEG_CHECK_WRITE(&cpu_state.seg_es); - CHECK_WRITE(&cpu_state.seg_es, EDI, EDI + 1UL); do_mmut_ww(es, EDI, addr64a_2); if (cpu_state.abrt) return 1; @@ -152,13 +152,13 @@ opMOVSL_a16(uint32_t fetchdat) addr64a_2[0] = addr64a_2[1] = addr64a_2[2] = addr64a_2[3] = 0x00000000; SEG_CHECK_READ(cpu_state.ea_seg); + SEG_CHECK_WRITE(&cpu_state.seg_es); CHECK_READ(cpu_state.ea_seg, SI, SI + 3UL); + CHECK_WRITE(&cpu_state.seg_es, DI, DI + 3UL); high_page = 0; do_mmut_rl(cpu_state.ea_seg->base, SI, addr64a); if (cpu_state.abrt) return 1; - SEG_CHECK_WRITE(&cpu_state.seg_es); - CHECK_WRITE(&cpu_state.seg_es, DI, DI + 3UL); do_mmut_wl(es, DI, addr64a_2); if (cpu_state.abrt) return 1; @@ -188,13 +188,13 @@ opMOVSL_a32(uint32_t fetchdat) addr64a_2[0] = addr64a_2[1] = addr64a_2[2] = addr64a_2[3] = 0x00000000; SEG_CHECK_READ(cpu_state.ea_seg); + SEG_CHECK_WRITE(&cpu_state.seg_es); CHECK_READ(cpu_state.ea_seg, ESI, ESI + 3UL); + CHECK_WRITE(&cpu_state.seg_es, EDI, EDI + 3UL); high_page = 0; do_mmut_rl(cpu_state.ea_seg->base, ESI, addr64a); if (cpu_state.abrt) return 1; - SEG_CHECK_WRITE(&cpu_state.seg_es); - CHECK_WRITE(&cpu_state.seg_es, EDI, EDI + 3UL); do_mmut_wl(es, EDI, addr64a_2); if (cpu_state.abrt) return 1; @@ -224,13 +224,13 @@ opCMPSB_a16(uint32_t fetchdat) addr64 = addr64_2 = 0x00000000; SEG_CHECK_READ(cpu_state.ea_seg); + SEG_CHECK_READ(&cpu_state.seg_es); CHECK_READ(cpu_state.ea_seg, SI, SI); + CHECK_READ(&cpu_state.seg_es, DI, DI); high_page = uncached = 0; do_mmut_rb(cpu_state.ea_seg->base, SI, &addr64); if (cpu_state.abrt) return 1; - SEG_CHECK_READ(&cpu_state.seg_es); - CHECK_READ(&cpu_state.seg_es, DI, DI); do_mmut_rb2(es, DI, &addr64_2); if (cpu_state.abrt) return 1; @@ -264,13 +264,13 @@ opCMPSB_a32(uint32_t fetchdat) addr64 = addr64_2 = 0x00000000; SEG_CHECK_READ(cpu_state.ea_seg); + SEG_CHECK_READ(&cpu_state.seg_es); CHECK_READ(cpu_state.ea_seg, ESI, ESI); + CHECK_READ(&cpu_state.seg_es, EDI, EDI); high_page = uncached = 0; do_mmut_rb(cpu_state.ea_seg->base, ESI, &addr64); if (cpu_state.abrt) return 1; - SEG_CHECK_READ(&cpu_state.seg_es); - CHECK_READ(&cpu_state.seg_es, EDI, EDI); do_mmut_rb2(es, EDI, &addr64_2); if (cpu_state.abrt) return 1; @@ -306,13 +306,13 @@ opCMPSW_a16(uint32_t fetchdat) addr64a_2[0] = addr64a_2[1] = 0x00000000; SEG_CHECK_READ(cpu_state.ea_seg); + SEG_CHECK_READ(&cpu_state.seg_es); CHECK_READ(cpu_state.ea_seg, SI, SI + 1UL); + CHECK_READ(&cpu_state.seg_es, DI, DI + 1UL); high_page = uncached = 0; do_mmut_rw(cpu_state.ea_seg->base, SI, addr64a); if (cpu_state.abrt) return 1; - SEG_CHECK_READ(&cpu_state.seg_es); - CHECK_READ(&cpu_state.seg_es, DI, DI + 1UL); do_mmut_rw2(es, DI, addr64a_2); if (cpu_state.abrt) return 1; @@ -347,13 +347,13 @@ opCMPSW_a32(uint32_t fetchdat) addr64a_2[0] = addr64a_2[1] = 0x00000000; SEG_CHECK_READ(cpu_state.ea_seg); + SEG_CHECK_READ(&cpu_state.seg_es); CHECK_READ(cpu_state.ea_seg, ESI, ESI + 1UL); + CHECK_READ(&cpu_state.seg_es, EDI, EDI + 1UL); high_page = uncached = 0; do_mmut_rw(cpu_state.ea_seg->base, ESI, addr64a); if (cpu_state.abrt) return 1; - SEG_CHECK_READ(&cpu_state.seg_es); - CHECK_READ(&cpu_state.seg_es, EDI, EDI + 1UL); do_mmut_rw2(es, EDI, addr64a_2); if (cpu_state.abrt) return 1; @@ -389,13 +389,13 @@ opCMPSL_a16(uint32_t fetchdat) addr64a_2[0] = addr64a_2[1] = addr64a_2[2] = addr64a_2[3] = 0x00000000; SEG_CHECK_READ(cpu_state.ea_seg); + SEG_CHECK_READ(&cpu_state.seg_es); CHECK_READ(cpu_state.ea_seg, SI, SI + 3UL); + CHECK_READ(&cpu_state.seg_es, DI, DI + 3UL); high_page = uncached = 0; do_mmut_rl(cpu_state.ea_seg->base, SI, addr64a); if (cpu_state.abrt) return 1; - SEG_CHECK_READ(&cpu_state.seg_es); - CHECK_READ(&cpu_state.seg_es, DI, DI + 3UL); do_mmut_rl2(es, DI, addr64a_2); if (cpu_state.abrt) return 1; @@ -430,13 +430,13 @@ opCMPSL_a32(uint32_t fetchdat) addr64a_2[0] = addr64a_2[1] = addr64a_2[2] = addr64a_2[3] = 0x00000000; SEG_CHECK_READ(cpu_state.ea_seg); + SEG_CHECK_READ(&cpu_state.seg_es); CHECK_READ(cpu_state.ea_seg, ESI, ESI + 3UL); + CHECK_READ(&cpu_state.seg_es, EDI, EDI + 3UL); high_page = uncached = 0; do_mmut_rl(cpu_state.ea_seg->base, ESI, addr64a); if (cpu_state.abrt) return 1; - SEG_CHECK_READ(&cpu_state.seg_es); - CHECK_READ(&cpu_state.seg_es, EDI, EDI + 3UL); do_mmut_rl2(es, EDI, addr64a_2); if (cpu_state.abrt) return 1;