From 32bc2a02b3e5ebceaf2e60b53d3f018be4e2ba9f Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 7 Jan 2018 20:36:30 +0100 Subject: [PATCH] Disabling the PS/2 mouse via the KBC command byte now also disables the "Write to mouse output buffer" and "Write to mouse" commands, fixes hang when entering CMOS Setup on the P55T2S; Unified the various machines' identical port 92h implementations. --- src/keyboard_at.c | 6 +++--- src/machine/m_at_scat.c | 31 ++++++++++++++----------------- src/machine/m_ps2_isa.c | 15 +++++---------- src/machine/m_ps2_mca.c | 19 +++++-------------- src/machine/machine_table.c | 4 ++-- src/mem.c | 6 +++--- src/mem.h | 4 +++- 7 files changed, 35 insertions(+), 50 deletions(-) diff --git a/src/keyboard_at.c b/src/keyboard_at.c index e5842ddc0..57ac177f0 100644 --- a/src/keyboard_at.c +++ b/src/keyboard_at.c @@ -8,7 +8,7 @@ * * Intel 8042 (AT keyboard controller) emulation. * - * Version: @(#)keyboard_at.c 1.0.19 2018/01/07 + * Version: @(#)keyboard_at.c 1.0.20 2018/01/07 * * Authors: Sarah Walker, * Miran Grca, @@ -729,14 +729,14 @@ kbd_write64_generic(void *p, uint8_t val) kbd->input_port = ((kbd->input_port + 1) & 3) | (kbd->input_port & 0xfc) | fdc_ps1_525(); return 0; case 0xd3: /*Write mouse output buffer*/ - if ((kbd->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1) { + if (((kbd->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1) && mouse_scan) { kbdlog("ATkbd: write mouse output buffer\n"); kbd->want60 = 1; return 0; } break; case 0xd4: /*Write to mouse*/ - if ((kbd->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1) { + if (((kbd->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1) && mouse_scan) { kbdlog("ATkbd: write to mouse\n"); kbd->want60 = 1; return 0; diff --git a/src/machine/m_at_scat.c b/src/machine/m_at_scat.c index 1cf3aeb4a..b74571c43 100644 --- a/src/machine/m_at_scat.c +++ b/src/machine/m_at_scat.c @@ -10,12 +10,12 @@ * * Re-worked version based on the 82C235 datasheet and errata. * - * Version: @(#)m_at_scat.c 1.0.5 2017/11/04 + * Version: @(#)m_at_scat.c 1.0.7 2018/01/05 * * Authors: Original by GreatPsycho for PCem. * Fred N. van Kempen, * - * Copyright 2017 Fred N. van Kempen. + * Copyright 2018 Fred N. van Kempen. */ #include #include @@ -449,6 +449,10 @@ scat_read(uint16_t port, void *priv) val = (scat_regs[scat_index] & 0x8f) | (cpu_waitstates == 1 ? 0 : 0x10); break; + case SCAT_SYS_CTL: + val = port_92_read(0x0092, priv); + break; + default: val = scat_regs[scat_index]; break; @@ -564,6 +568,10 @@ ics_write(uint8_t idx, uint8_t val) shadow_update = 1; break; + case SCAT_SYS_CTL: + port_92_write(0x0092, val, NULL); + break; + default: break; } @@ -598,19 +606,6 @@ scat_write(uint16_t port, uint8_t val, void *priv) case 0x23: ics_write(scat_index, val); break; - - case 0x92: - if ((mem_a20_alt ^ val) & 2) { - mem_a20_alt = val & 2; - mem_a20_recalc(); - } - - if ((~scat_regs[SCAT_SYS_CTL] & val) & 1) { - softresetx86(); - cpu_set_edx(); - } - scat_regs[SCAT_SYS_CTL] = val; - break; } } @@ -625,8 +620,10 @@ scat_init(void) #endif io_sethandler(0x0022, 2, scat_read, NULL, NULL, scat_write, NULL, NULL, NULL); - io_sethandler(0x0092, 1, - scat_read, NULL, NULL, scat_write, NULL, NULL, NULL); + + port_92_reset(); + + port_92_add(); for (i=0; i<128; i++) scat_regs[i] = 0xff; diff --git a/src/machine/m_ps2_isa.c b/src/machine/m_ps2_isa.c index 0f4e0a718..9b9e6c6fc 100644 --- a/src/machine/m_ps2_isa.c +++ b/src/machine/m_ps2_isa.c @@ -22,7 +22,7 @@ #include "machine.h" -static uint8_t ps2_92, ps2_94, ps2_102, ps2_103, ps2_104, ps2_105, ps2_190; +static uint8_t ps2_94, ps2_102, ps2_103, ps2_104, ps2_105, ps2_190; static struct @@ -40,8 +40,6 @@ static uint8_t ps2_read(uint16_t port, void *p) { case 0x91: return 0; - case 0x92: - return ps2_92; case 0x94: return ps2_94; case 0x102: @@ -75,11 +73,6 @@ static void ps2_write(uint16_t port, uint8_t val, void *p) { switch (port) { - case 0x0092: - ps2_92 = val; - mem_a20_alt = val & 2; - mem_a20_recalc(); - break; case 0x94: ps2_94 = val; break; @@ -136,7 +129,6 @@ static void ps2_write(uint16_t port, uint8_t val, void *p) static void ps2board_init(void) { io_sethandler(0x0091, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); - io_sethandler(0x0092, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); io_sethandler(0x0094, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); io_sethandler(0x0102, 0x0004, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); io_sethandler(0x0190, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); @@ -144,7 +136,10 @@ static void ps2board_init(void) io_sethandler(0x0322, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); io_sethandler(0x0324, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL); - ps2_92 = 0; + port_92_reset(); + + port_92_add(); + ps2_190 = 0; lpt1_init(0x3bc); diff --git a/src/machine/m_ps2_mca.c b/src/machine/m_ps2_mca.c index 6e6d37e31..c4641ff89 100644 --- a/src/machine/m_ps2_mca.c +++ b/src/machine/m_ps2_mca.c @@ -356,9 +356,6 @@ uint8_t ps2_mca_read(uint16_t port, void *p) { case 0x91: fatal("Read 91 setup=%02x adapter=%02x\n", ps2.setup, ps2.adapter_setup); - case 0x92: - temp = ps2.sys_ctrl_port_a; - break; case 0x94: temp = ps2.setup; break; @@ -452,16 +449,6 @@ static void ps2_mca_write(uint16_t port, uint8_t val, void *p) switch (port) { - case 0x0092: - if ((val & 1) && !(ps2.sys_ctrl_port_a & 1)) - { - softresetx86(); - cpu_set_edx(); - } - ps2.sys_ctrl_port_a = val; - mem_a20_alt = val & 2; - mem_a20_recalc(); - break; case 0x94: ps2.setup = val; break; @@ -524,11 +511,15 @@ static void ps2_mca_write(uint16_t port, uint8_t val, void *p) static void ps2_mca_board_common_init() { - io_sethandler(0x0091, 0x0002, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); + io_sethandler(0x0091, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); io_sethandler(0x0094, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); io_sethandler(0x0096, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); io_sethandler(0x0100, 0x0008, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL); + port_92_reset(); + + port_92_add(); + ps2.setup = 0xff; lpt1_init(0x3bc); diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index dd1dd78dd..b950d44fe 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -11,7 +11,7 @@ * NOTES: OpenAT wip for 286-class machine with open BIOS. * PS2_M80-486 wip, pending receipt of TRM's for machine. * - * Version: @(#)machine_table.c 1.0.11 2018/01/04 + * Version: @(#)machine_table.c 1.0.12 2018/01/05 * * Authors: Sarah Walker, * Miran Grca, @@ -90,7 +90,7 @@ machine_t machines[] = { { "[386SX MCA] IBM PS/2 model 55SX", ROM_IBMPS2_M55SX, "ibmps2_m55sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL, nvr_at_close }, { "[386DX ISA] AMI 386DX clone", ROM_AMI386DX_OPTI495, "ami386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_ami_init, NULL, nvr_at_close }, - { "[386DX ISA] Amstrad MegaPC 386DX", ROM_MEGAPCDX, "megapcdx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 1, 16, 1, 127, machine_at_wd76c10_init, NULL, nvr_at_close }, + { "[386DX ISA] Amstrad MegaPC 386DX", ROM_MEGAPCDX, "megapcdx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 1, 32, 1, 127, machine_at_wd76c10_init, NULL, nvr_at_close }, { "[386DX ISA] Award 386DX clone", ROM_AWARD386DX_OPTI495, "award386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL, nvr_at_close }, { "[386DX ISA] MR 386DX clone", ROM_MR386DX_OPTI495, "mr386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_ami_init, NULL, nvr_at_close }, #ifdef DEV_BRANCH diff --git a/src/mem.c b/src/mem.c index 64616e964..8ddddffdf 100644 --- a/src/mem.c +++ b/src/mem.c @@ -1677,17 +1677,17 @@ void mem_a20_recalc(void) } -static uint8_t port_92_read(uint16_t port, void *priv) +uint8_t port_92_read(uint16_t port, void *priv) { return port_92_reg; } -static void port_92_write(uint16_t port, uint8_t val, void *priv) +void port_92_write(uint16_t port, uint8_t val, void *priv) { if ((mem_a20_alt ^ val) & 2) { - mem_a20_alt = (val & 2) ? 0 : 2; + mem_a20_alt = (val & 2); mem_a20_recalc(); } diff --git a/src/mem.h b/src/mem.h index ea1166455..2366a2ab6 100644 --- a/src/mem.h +++ b/src/mem.h @@ -238,10 +238,12 @@ extern void mem_add_bios(void); extern void mem_init(void); extern void mem_resize(void); -extern void port_92_reset(void); +extern uint8_t port_92_read(uint16_t port, void *priv); +extern void port_92_write(uint16_t port, uint8_t val, void *priv); extern void port_92_clear_reset(void); extern void port_92_add(void); extern void port_92_remove(void); +extern void port_92_reset(void); #endif /*EMU_MEM_H*/