From 3727dd9981adbd95fa7165f2f672993d916d7aac Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Fri, 1 Mar 2024 13:45:23 +0100
Subject: [PATCH] SiS 496/497: Implement the reset control bits.

---
 src/chipset/sis_85c496.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/chipset/sis_85c496.c b/src/chipset/sis_85c496.c
index b9b2544c8..1e9b74f41 100644
--- a/src/chipset/sis_85c496.c
+++ b/src/chipset/sis_85c496.c
@@ -480,6 +480,8 @@ sis_85c49x_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
             break;
         case 0xc6: /* 85C497 Post / INIT Configuration */
             dev->pci_conf[addr] = val & 0x0f;
+            cpu_cpurst_on_sr = !(val & 0x08);
+            soft_reset_pci = !!(val & 0x04);
             break;
         case 0xc8:
         case 0xc9:
@@ -614,6 +616,9 @@ sis_85c496_reset(void *priv)
     nvr_bank_set(0, 0, dev->nvr);
 
     sis_85c497_isa_reset(dev);
+
+    cpu_cpurst_on_sr = 1;
+    soft_reset_pci = 0;
 }
 
 static void