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ALi M6117 CPU fixes.

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This commit is contained in:
OBattler
2024-02-02 05:31:33 +01:00
parent 91ca927618
commit 3ceda105ef
2 changed files with 14 additions and 14 deletions
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4
src/cpu/cpu_table.c
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@@ -1070,8 +1070,8 @@ const cpu_family_t cpu_families[] = {
.name = "M6117", .name = "M6117",
.internal_name = "m6117", .internal_name = "m6117",
.cpus = (const CPU[]) { /* All timings and edx_reset values assumed. */ .cpus = (const CPU[]) { /* All timings and edx_reset values assumed. */
{"33", CPU_386SX, fpus_none, 33333333, 1, 5000, 0x2308, 0, 0, 0, 6,6,3,3, 4}, {"33", CPU_386SX, fpus_none, 33333333, 1, 5000, 0x2309, 0, 0, 0, 6,6,3,3, 4},
{"40", CPU_386SX, fpus_none, 40000000, 1, 5000, 0x2308, 0, 0, 0, 7,7,3,3, 5}, {"40", CPU_386SX, fpus_none, 40000000, 1, 5000, 0x2309, 0, 0, 0, 7,7,3,3, 5},
{"", 0} {"", 0}
} }
}, { }, {

24
src/cpu/x86_ops_misc.h
View File

@@ -129,7 +129,7 @@ opF6_a16(uint32_t fetchdat)
if (dst && !(tempw & 0xff00)) { if (dst && !(tempw & 0xff00)) {
AH = src16 % dst; AH = src16 % dst;
AL = (src16 / dst) & 0xff; AL = (src16 / dst) & 0xff;
if (!cpu_iscyrix) { if (!cpu_iscyrix && !is6117) {
flags_rebuild(); flags_rebuild();
cpu_state.flags |= 0x8D5; /*Not a Cyrix*/ cpu_state.flags |= 0x8D5; /*Not a Cyrix*/
cpu_state.flags &= ~1; cpu_state.flags &= ~1;
@@ -149,7 +149,7 @@ opF6_a16(uint32_t fetchdat)
if (dst && ((int) temps == tempws2)) { if (dst && ((int) temps == tempws2)) {
AH = (tempws % (int) ((int8_t) dst)) & 0xff; AH = (tempws % (int) ((int8_t) dst)) & 0xff;
AL = tempws2 & 0xff; AL = tempws2 & 0xff;
if (!cpu_iscyrix) { if (!cpu_iscyrix && !is6117) {
flags_rebuild(); flags_rebuild();
cpu_state.flags |= 0x8D5; /*Not a Cyrix*/ cpu_state.flags |= 0x8D5; /*Not a Cyrix*/
cpu_state.flags &= ~1; cpu_state.flags &= ~1;
@@ -246,7 +246,7 @@ opF6_a32(uint32_t fetchdat)
if (dst && !(tempw & 0xff00)) { if (dst && !(tempw & 0xff00)) {
AH = src16 % dst; AH = src16 % dst;
AL = (src16 / dst) & 0xff; AL = (src16 / dst) & 0xff;
if (!cpu_iscyrix) { if (!cpu_iscyrix && !is6117) {
flags_rebuild(); flags_rebuild();
cpu_state.flags |= 0x8D5; /*Not a Cyrix*/ cpu_state.flags |= 0x8D5; /*Not a Cyrix*/
cpu_state.flags &= ~1; cpu_state.flags &= ~1;
@@ -266,7 +266,7 @@ opF6_a32(uint32_t fetchdat)
if (dst && ((int) temps == tempws2)) { if (dst && ((int) temps == tempws2)) {
AH = (tempws % (int) ((int8_t) dst)) & 0xff; AH = (tempws % (int) ((int8_t) dst)) & 0xff;
AL = tempws2 & 0xff; AL = tempws2 & 0xff;
if (!cpu_iscyrix) { if (!cpu_iscyrix && !is6117) {
flags_rebuild(); flags_rebuild();
cpu_state.flags |= 0x8D5; /*Not a Cyrix*/ cpu_state.flags |= 0x8D5; /*Not a Cyrix*/
cpu_state.flags &= ~1; cpu_state.flags &= ~1;
@@ -366,7 +366,7 @@ opF7_w_a16(uint32_t fetchdat)
if (dst && !(templ2 & 0xffff0000)) { if (dst && !(templ2 & 0xffff0000)) {
DX = templ % dst; DX = templ % dst;
AX = (templ / dst) & 0xffff; AX = (templ / dst) & 0xffff;
if (!cpu_iscyrix) if (!cpu_iscyrix && !is6117)
setznp16(AX); /*Not a Cyrix*/ setznp16(AX); /*Not a Cyrix*/
} else { } else {
x86_int(0); x86_int(0);
@@ -383,7 +383,7 @@ opF7_w_a16(uint32_t fetchdat)
if ((dst != 0) && ((int) temps16 == tempws2)) { if ((dst != 0) && ((int) temps16 == tempws2)) {
DX = tempws % (int) ((int16_t) dst); DX = tempws % (int) ((int16_t) dst);
AX = tempws2 & 0xffff; AX = tempws2 & 0xffff;
if (!cpu_iscyrix) if (!cpu_iscyrix && !is6117)
setznp16(AX); /*Not a Cyrix*/ setznp16(AX); /*Not a Cyrix*/
} else { } else {
x86_int(0); x86_int(0);
@@ -479,7 +479,7 @@ opF7_w_a32(uint32_t fetchdat)
if (dst && !(templ2 & 0xffff0000)) { if (dst && !(templ2 & 0xffff0000)) {
DX = templ % dst; DX = templ % dst;
AX = (templ / dst) & 0xffff; AX = (templ / dst) & 0xffff;
if (!cpu_iscyrix) if (!cpu_iscyrix && !is6117)
setznp16(AX); /*Not a Cyrix*/ setznp16(AX); /*Not a Cyrix*/
} else { } else {
// fatal("DIVw BY 0 %04X:%04X %i\n",cs>>4,pc,ins); // fatal("DIVw BY 0 %04X:%04X %i\n",cs>>4,pc,ins);
@@ -497,7 +497,7 @@ opF7_w_a32(uint32_t fetchdat)
if ((dst != 0) && ((int) temps16 == tempws2)) { if ((dst != 0) && ((int) temps16 == tempws2)) {
DX = tempws % (int) ((int16_t) dst); DX = tempws % (int) ((int16_t) dst);
AX = tempws2 & 0xffff; AX = tempws2 & 0xffff;
if (!cpu_iscyrix) if (!cpu_iscyrix && !is6117)
setznp16(AX); /*Not a Cyrix*/ setznp16(AX); /*Not a Cyrix*/
} else { } else {
x86_int(0); x86_int(0);
@@ -587,7 +587,7 @@ opF7_l_a16(uint32_t fetchdat)
case 0x30: /*DIV EAX,l*/ case 0x30: /*DIV EAX,l*/
if (divl(dst)) if (divl(dst))
return 1; return 1;
if (!cpu_iscyrix) if (!cpu_iscyrix && !is6117)
setznp32(EAX); /*Not a Cyrix*/ setznp32(EAX); /*Not a Cyrix*/
CLOCK_CYCLES((is486) ? 40 : 38); CLOCK_CYCLES((is486) ? 40 : 38);
PREFETCH_RUN(is486 ? 40 : 38, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1, 0, 0, 0); PREFETCH_RUN(is486 ? 40 : 38, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1, 0, 0, 0);
@@ -595,7 +595,7 @@ opF7_l_a16(uint32_t fetchdat)
case 0x38: /*IDIV EAX,l*/ case 0x38: /*IDIV EAX,l*/
if (idivl((int32_t) dst)) if (idivl((int32_t) dst))
return 1; return 1;
if (!cpu_iscyrix) if (!cpu_iscyrix && !is6117)
setznp32(EAX); /*Not a Cyrix*/ setznp32(EAX); /*Not a Cyrix*/
CLOCK_CYCLES(43); CLOCK_CYCLES(43);
PREFETCH_RUN(43, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1, 0, 0, 0); PREFETCH_RUN(43, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1, 0, 0, 0);
@@ -680,7 +680,7 @@ opF7_l_a32(uint32_t fetchdat)
case 0x30: /*DIV EAX,l*/ case 0x30: /*DIV EAX,l*/
if (divl(dst)) if (divl(dst))
return 1; return 1;
if (!cpu_iscyrix) if (!cpu_iscyrix && !is6117)
setznp32(EAX); /*Not a Cyrix*/ setznp32(EAX); /*Not a Cyrix*/
CLOCK_CYCLES((is486) ? 40 : 38); CLOCK_CYCLES((is486) ? 40 : 38);
PREFETCH_RUN(is486 ? 40 : 38, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1, 0, 0, 1); PREFETCH_RUN(is486 ? 40 : 38, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1, 0, 0, 1);
@@ -688,7 +688,7 @@ opF7_l_a32(uint32_t fetchdat)
case 0x38: /*IDIV EAX,l*/ case 0x38: /*IDIV EAX,l*/
if (idivl((int32_t) dst)) if (idivl((int32_t) dst))
return 1; return 1;
if (!cpu_iscyrix) if (!cpu_iscyrix && !is6117)
setznp32(EAX); /*Not a Cyrix*/ setznp32(EAX); /*Not a Cyrix*/
CLOCK_CYCLES(43); CLOCK_CYCLES(43);
PREFETCH_RUN(43, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1, 0, 0, 1); PREFETCH_RUN(43, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1, 0, 0, 1);