PCI changes to accomodate the SiS TRC stuff.

src/include/86box/pci.h

@@ -71,6 +71,7 @@
 #define FLAG_CONFIG_M1_IO_ON      0x00000020
 #define FLAG_NO_IRQ_STEERING      0x00000040
 #define FLAG_NO_BRIDGES           0x00000080
+#define FLAG_TRC_CONTROLS_SRST    0x00000100
 
 #define FLAG_MECHANISM_MASK       FLAG_MECHANISM_1 | FLAG_MECHANISM_2
 #define FLAG_MASK                 0x0000007f

src/pci.c

@@ -424,6 +424,9 @@ pci_write(uint16_t port, uint8_t val, UNUSED(void *priv))
             }
             break;
         case 0xcf9:
+            if (pci_flags & FLAG_TRC_CONTROLS_SRST)
+                cpu_cpusrst_on_sr = !(val & 0x10);
+
             if (!(pci_trc_reg & 4) && (val & 4))
                 pci_trc_reset(val);