From dd5c5f4a07d808728534cec2ed6b3552f24f4680 Mon Sep 17 00:00:00 2001
From: TC1995 <mariogplayer90@gmail.com>
Date: Thu, 29 Aug 2024 00:51:28 +0200
Subject: [PATCH] More ViRGE fixes (August 29th, 2024)

Apparently the extended sequencer registers (>= 0x20) are required to have sane values on the STREAMS engine on GX2 and probably other chips in the ViRGE range.
---
 src/video/vid_s3_virge.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c
index 3719d2591..fea538864 100644
--- a/src/video/vid_s3_virge.c
+++ b/src/video/vid_s3_virge.c
@@ -471,7 +471,8 @@ s3_virge_update_irqs(virge_t *virge) {
 }
 
 static void
-s3_virge_out(uint16_t addr, uint8_t val, void *priv) {
+s3_virge_out(uint16_t addr, uint8_t val, void *priv)
+{
     virge_t *virge = (virge_t *) priv;
     svga_t * svga = &virge->svga;
     uint8_t  old;
@@ -483,7 +484,7 @@ s3_virge_out(uint16_t addr, uint8_t val, void *priv) {
     switch (addr) {
         case 0x3c5:
             if (svga->seqaddr >= 0x10) {
-                svga->seqregs[svga->seqaddr & 0x1f] = val;
+                svga->seqregs[svga->seqaddr] = val;
                 svga_recalctimings(svga);
                 return;
             }
@@ -519,8 +520,6 @@ s3_virge_out(uint16_t addr, uint8_t val, void *priv) {
                 return;
             if ((svga->crtcreg == 0x36) && (svga->crtc[0x39] != 0xa5))
                 return;
-            if (svga->crtcreg >= 0x80)
-                return;
 
             old = svga->crtc[svga->crtcreg];
             svga->crtc[svga->crtcreg] = val;
@@ -707,7 +706,7 @@ s3_virge_in(uint16_t addr, void *priv) {
 
         case 0x3c5:
             if (svga->seqaddr >= 8)
-                ret = svga->seqregs[svga->seqaddr & 0x1f];
+                ret = svga->seqregs[svga->seqaddr];
             else if (svga->seqaddr <= 4)
                 ret = svga_in(addr, svga);
             else