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The Intel Flash device with inverted high bit pin now again correctly responds to reads and writes on the high BIOS mapping, fixes programming the Flash with the AMI BIOS Flash utility;

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Added internal graphics card option for the Intel Advanced/EV for the on-board S3 Trio64;
Fixed configuration for internal graphics card options (using the machine's Configure button) for some machines (PCjr, Tandy 1000, Tandy 1000 HX, and now also the Intel Advanced/EV).
This commit is contained in:
OBattler
2018-02-09 05:42:40 +01:00
parent 4115cf1399
commit 4677cf600b
8 changed files with 217 additions and 135 deletions
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55
src/intel_flash.c
View File

@@ -8,13 +8,13 @@
*
* Implementation of the Intel 2 Mbit 8-bit flash devices.
*
* Version: @(#)intel_flash.c 1.0.12 2017/12/28
* Version: @(#)intel_flash.c 1.0.13 2018/02/09
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
@@ -67,13 +67,9 @@ static uint8_t flash_read(uint32_t addr, void *p)
{
flash_t *flash = (flash_t *)p;
if (flash->invert_high_pin)
{
addr ^= 0x10000;
if (addr & 0xfff00000) return flash->array[addr & 0x1ffff];
}
addr &= 0x1ffff;
switch (flash->command)
{
switch (flash->command) {
case CMD_READ_ARRAY:
default:
return flash->array[addr];
@@ -114,19 +110,13 @@ static void flash_write(uint32_t addr, uint8_t val, void *p)
int i;
if (flash->invert_high_pin)
{
addr ^= 0x10000;
if (addr & 0xfff00000) return;
}
addr &= 0x1ffff;
switch (flash->command)
{
switch (flash->command) {
case CMD_ERASE_SETUP:
if (val == CMD_ERASE_CONFIRM)
{
for (i = 0; i < 3; i++)
{
if (val == CMD_ERASE_CONFIRM) {
for (i = 0; i < 3; i++) {
if ((addr >= flash->block_start[i]) && (addr <= flash->block_end[i]))
memset(&(flash->array[flash->block_start[i]]), 0xff, flash->block_len[i]);
}
@@ -146,8 +136,7 @@ static void flash_write(uint32_t addr, uint8_t val, void *p)
default:
flash->command = val;
switch (val)
{
switch (val) {
case CMD_CLEAR_STATUS:
flash->status = 0;
break;
@@ -159,8 +148,7 @@ static void intel_flash_add_mappings(flash_t *flash)
{
int i = 0;
for (i = 0; i <= 7; i++)
{
for (i = 0; i <= 7; i++) {
mem_mapping_add(&(flash->mapping[i]), 0xe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + ((i << 14) & 0x1ffff), MEM_MAPPING_EXTERNAL, (void *)flash);
mem_mapping_add(&(flash->mapping_h[i]), 0xfffe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + ((i << 14) & 0x1ffff), 0, (void *)flash);
}
@@ -171,8 +159,7 @@ static void intel_flash_add_mappings_inverted(flash_t *flash)
{
int i = 0;
for (i = 0; i <= 7; i++)
{
for (i = 0; i <= 7; i++) {
mem_mapping_add(&(flash->mapping[i]), 0xe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + (((i << 14) ^ 0x10000) & 0x1ffff), MEM_MAPPING_EXTERNAL, (void *)flash);
mem_mapping_add(&(flash->mapping_h[i]), 0xfffe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + (((i << 14) ^ 0x10000) & 0x1ffff), 0, (void *)flash);
}
@@ -209,8 +196,7 @@ void *intel_flash_init(uint8_t type)
flash->block_len[BLOCK_DATA2] = 0x01000;
flash->block_len[BLOCK_BOOT] = 0x02000;
if (type & FLASH_IS_BXB) /* 28F001BX-B */
{
if (type & FLASH_IS_BXB) { /* 28F001BX-B */
flash->block_start[BLOCK_MAIN] = 0x04000; /* MAIN BLOCK */
flash->block_end[BLOCK_MAIN] = 0x1ffff;
flash->block_start[BLOCK_DATA1] = 0x03000; /* DATA AREA 1 BLOCK */
@@ -219,9 +205,7 @@ void *intel_flash_init(uint8_t type)
flash->block_end[BLOCK_DATA2] = 0x04fff;
flash->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */
flash->block_end[BLOCK_BOOT] = 0x01fff;
}
else /* 28F001BX-T */
{
} else { /* 28F001BX-T */
flash->block_start[BLOCK_MAIN] = 0x00000; /* MAIN BLOCK */
flash->block_end[BLOCK_MAIN] = 0x1bfff;
flash->block_start[BLOCK_DATA1] = 0x1c000; /* DATA AREA 1 BLOCK */
@@ -232,37 +216,28 @@ void *intel_flash_init(uint8_t type)
flash->block_end[BLOCK_BOOT] = 0x1ffff;
}
for (i = 0; i < 8; i++)
{
for (i = 0; i < 8; i++) {
mem_mapping_disable(&bios_mapping[i]);
mem_mapping_disable(&bios_high_mapping[i]);
}
if (flash->invert_high_pin)
{
if (flash->invert_high_pin) {
memcpy(flash->array, rom + 65536, 65536);
memcpy(flash->array + 65536, rom, 65536);
}
else
{
memcpy(flash->array, rom, 131072);
}
if (flash->invert_high_pin)
{
intel_flash_add_mappings_inverted(flash);
}
else
{
intel_flash_add_mappings(flash);
}
flash->command = CMD_READ_ARRAY;
flash->status = 0;
f = nvr_fopen(flash_path, L"rb");
if (f)
{
if (f) {
fread(&(flash->array[flash->block_start[BLOCK_MAIN]]), flash->block_len[BLOCK_MAIN], 1, f);
fread(&(flash->array[flash->block_start[BLOCK_DATA1]]), flash->block_len[BLOCK_DATA1], 1, f);
fread(&(flash->array[flash->block_start[BLOCK_DATA2]]), flash->block_len[BLOCK_DATA2], 1, f);

14
src/machine/m_at_430fx.c
View File

@@ -8,7 +8,7 @@
*
* Implementation of the Intel 430FX PCISet chip.
*
* Version: @(#)m_at_430fx.c 1.0.10 2018/01/04
* Version: @(#)m_at_430fx.c 1.0.11 2018/02/09
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -30,6 +30,8 @@
#include "../piix.h"
#include "../intel_flash.h"
#include "../sio.h"
#include "../video/video.h"
#include "../video/vid_s3.h"
#include "machine.h"
@@ -244,6 +246,16 @@ machine_at_endeavor_init(machine_t *model)
pc87306_init();
device_add(&intel_flash_bxt_ami_device);
if (gfxcard == GFX_INTERNAL)
device_add(&s3_phoenix_trio64_onboard_pci_device);
}
device_t *
at_endeavor_get_device(void)
{
return &s3_phoenix_trio64_onboard_pci_device;
}

9
src/machine/m_pcjr.c
View File

@@ -8,7 +8,7 @@
*
* Emulation of the IBM PCjr.
*
* Version: @(#)m_pcjr.c 1.0.4 2018/01/16
* Version: @(#)m_pcjr.c 1.0.5 2018/02/09
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -726,6 +726,13 @@ static device_t pcjr_device = {
};
device_t *
pcjr_get_device(void)
{
return &pcjr_device;
}
void
machine_pcjr_init(machine_t *model)
{

27
src/machine/m_tandy.c
View File

@@ -8,7 +8,7 @@
*
* Emulation of Tandy models 1000, 1000HX and 1000SL2.
*
* Version: @(#)m_tandy.c 1.0.2 2018/01/16
* Version: @(#)m_tandy.c 1.0.3 2018/02/09
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -1385,6 +1385,17 @@ static device_t vid_device = {
vid_config
};
static device_t vid_device_hx = {
"Tandy 1000 HX",
0, 0,
NULL, vid_close, NULL,
NULL,
vid_speed_changed,
NULL,
NULL,
vid_config
};
static device_t vid_device_sl = {
"Tandy 1000SL2",
0, 1,
@@ -1397,6 +1408,20 @@ static device_t vid_device_sl = {
};
device_t *
tandy1k_get_device(void)
{
return &vid_device;
}
device_t *
tandy1k_hx_get_device(void)
{
return &vid_device_hx;
}
static void
eep_write(uint16_t addr, uint8_t val, void *priv)
{

11
src/machine/machine.h
View File

@@ -8,7 +8,7 @@
*
* Handling of the emulated machines.
*
* Version: @(#)machine.h 1.0.18 2018/01/28
* Version: @(#)machine.h 1.0.19 2018/02/09
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -186,5 +186,14 @@ extern void machine_xt_compaq_init(machine_t *);
extern void machine_xt_laserxt_init(machine_t *);
#endif
#ifdef EMU_DEVICE_H
extern device_t *pcjr_get_device(void);
extern device_t *tandy1k_get_device(void);
extern device_t *tandy1k_hx_get_device(void);
extern device_t *at_endeavor_get_device(void);
#endif
#endif /*EMU_MACHINE_H*/

10
src/machine/machine_table.c
View File

@@ -11,7 +11,7 @@
* NOTES: OpenAT wip for 286-class machine with open BIOS.
* PS2_M80-486 wip, pending receipt of TRM's for machine.
*
* Version: @(#)machine_table.c 1.0.17 2018/01/28
* Version: @(#)machine_table.c 1.0.18 2018/02/09
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -39,14 +39,14 @@ machine_t machines[] = {
{ "[8088] Compaq Portable", ROM_PORTABLE, "portable", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO, 128, 640, 128, 0, machine_xt_compaq_init, NULL, NULL },
{ "[8088] DTK XT clone", ROM_DTKXT, "dtk", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL, NULL },
{ "[8088] IBM PC", ROM_IBMPC, "ibmpc", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 32, 0, machine_xt_init, NULL, NULL },
{ "[8088] IBM PCjr", ROM_IBMPCJR, "ibmpcjr", {{"", cpus_pcjr}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 128, 640, 128, 0, machine_pcjr_init, NULL, NULL },
{ "[8088] IBM PCjr", ROM_IBMPCJR, "ibmpcjr", {{"", cpus_pcjr}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 128, 640, 128, 0, machine_pcjr_init, pcjr_get_device, NULL },
{ "[8088] IBM XT", ROM_IBMXT, "ibmxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL, NULL },
{ "[8088] Generic XT clone", ROM_GENXT, "genxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL, NULL },
{ "[8088] Juko XT clone", ROM_JUKOPC, "jukopc", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL, NULL },
{ "[8088] Phoenix XT clone", ROM_PXXT, "pxxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL, NULL },
{ "[8088] Schneider EuroPC", ROM_EUROPC, "europc", {{"Siemens",cpus_europc}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_HDC | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 0, machine_europc_init, NULL, NULL },
{ "[8088] Tandy 1000", ROM_TANDY, "tandy", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 128, 640, 128, 0, machine_tandy1k_init, NULL, NULL },
{ "[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 256, 640, 128, 0, machine_tandy1k_init, NULL, NULL },
{ "[8088] Tandy 1000", ROM_TANDY, "tandy", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 128, 640, 128, 0, machine_tandy1k_init, tandy1k_get_device, NULL },
{ "[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 256, 640, 128, 0, machine_tandy1k_init, tandy1k_hx_get_device, NULL },
#if defined(DEV_BRANCH) && defined(USE_LASERXT)
{ "[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 512, 512, 256, 0, machine_xt_laserxt_init, NULL, NULL },
#endif
@@ -122,7 +122,7 @@ machine_t machines[] = {
{ "[Socket 5 NX] Intel Premiere/PCI II", ROM_PLATO, "plato", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 2, 128, 2, 127, machine_at_plato_init, NULL, nvr_at_close },
{ "[Socket 5 FX] ASUS P/I-P54TP4XE", ROM_P54TP4XE, "p54tp4xe", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 8, 128, 8, 127, machine_at_p54tp4xe_init, NULL, nvr_at_close },
{ "[Socket 5 FX] Intel Advanced/EV", ROM_ENDEAVOR, "endeavor", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_endeavor_init, NULL, nvr_at_close },
{ "[Socket 5 FX] Intel Advanced/EV", ROM_ENDEAVOR, "endeavor", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 8, 128, 8, 127, machine_at_endeavor_init, at_endeavor_get_device, nvr_at_close },
{ "[Socket 5 FX] Intel Advanced/ZP", ROM_ZAPPA, "zappa", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_zappa_init, NULL, nvr_at_close },
{ "[Socket 5 FX] PC Partner MB500N", ROM_MB500N, "mb500n", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 8, 128, 8, 127, machine_at_mb500n_init, NULL, nvr_at_close },
{ "[Socket 5 FX] President Award 430FX PCI",ROM_PRESIDENT, "president", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 8, 128, 8, 127, machine_at_president_init, NULL, nvr_at_close },

65
src/video/vid_s3.c
View File

@@ -8,13 +8,13 @@
*
* S3 emulation.
*
* Version: @(#)vid_s3.c 1.0.4 2017/11/04
* Version: @(#)vid_s3.c 1.0.5 2018/02/09
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
@@ -83,6 +83,7 @@ typedef struct s3_t
mem_mapping_t linear_mapping;
mem_mapping_t mmio_mapping;
uint8_t has_bios;
rom_t bios_rom;
svga_t svga;
@@ -2094,10 +2095,10 @@ uint8_t s3_pci_read(int func, int addr, void *p)
case 0x12: return svga->crtc[0x5a] & 0x80;
case 0x13: return svga->crtc[0x59];
case 0x30: return s3->pci_regs[0x30] & 0x01; /*BIOS ROM address*/
case 0x30: return s3->has_bios ? (s3->pci_regs[0x30] & 0x01) : 0x00; /*BIOS ROM address*/
case 0x31: return 0x00;
case 0x32: return s3->pci_regs[0x32];
case 0x33: return s3->pci_regs[0x33];
case 0x32: return s3->has_bios ? s3->pci_regs[0x32] : 0x00;
case 0x33: return s3->has_bios ? s3->pci_regs[0x33] : 0x00;
case 0x3c: return s3->int_line;
case 0x3d: return PCI_INTA;
@@ -2130,6 +2131,8 @@ void s3_pci_write(int func, int addr, uint8_t val, void *p)
break;
case 0x30: case 0x32: case 0x33:
if (!s3->has_bios)
return;
s3->pci_regs[addr] = val;
if (s3->pci_regs[0x30] & 0x01)
{
@@ -2177,9 +2180,12 @@ static void *s3_init(device_t *info, wchar_t *bios_fn, int chip)
vram_size = 512 << 10;
s3->vram_mask = vram_size - 1;
s3->has_bios = !info->local;
if (s3->has_bios) {
rom_init(&s3->bios_rom, bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
if (info->flags & DEVICE_PCI)
mem_mapping_disable(&s3->bios_rom.mapping);
}
mem_mapping_add(&s3->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, NULL, MEM_MAPPING_EXTERNAL, &s3->svga);
mem_mapping_add(&s3->mmio_mapping, 0xa0000, 0x10000, s3_accel_read, NULL, NULL, s3_accel_write, s3_accel_write_w, s3_accel_write_l, NULL, MEM_MAPPING_EXTERNAL, s3);
@@ -2337,6 +2343,14 @@ static void *s3_phoenix_trio64_init(device_t *info)
return s3;
}
static void *s3_phoenix_trio64_onboard_init(device_t *info)
{
s3_t *s3 = s3_trio64_init(info, NULL);
if (device_get_config_int("memory") == 1)
s3->svga.vram_max = 1 << 20; /*Phoenix BIOS does not expect VRAM to be mirrored*/
return s3;
}
static void *s3_diamond_stealth64_init(device_t *info)
{
s3_t *s3 = s3_trio64_init(info, L"roms/video/s3/stealt64.bin");
@@ -2490,6 +2504,30 @@ static device_config_t s3_phoenix_trio32_config[] =
}
};
static device_config_t s3_phoenix_trio64_onboard_config[] =
{
{
"memory", "Video memory size", CONFIG_SELECTION, "", 4,
{
{
"1 MB", 1
},
{
"2 MB", 2
},
{
"4 MB", 4
},
{
""
}
}
},
{
"", "", -1
}
};
static device_config_t s3_phoenix_trio64_config[] =
{
{
@@ -2619,6 +2657,21 @@ device_t s3_phoenix_trio64_vlb_device =
s3_phoenix_trio64_config
};
device_t s3_phoenix_trio64_onboard_pci_device =
{
"Phoenix S3 Trio64 On-Board PCI",
DEVICE_PCI,
1,
s3_phoenix_trio64_onboard_init,
s3_close,
NULL,
NULL,
s3_speed_changed,
s3_force_redraw,
s3_add_status_info,
s3_phoenix_trio64_onboard_config
};
device_t s3_phoenix_trio64_pci_device =
{
"Phoenix S3 Trio64 PCI",

7
src/video/vid_s3.h
View File

@@ -9,12 +9,12 @@
* Emulation of the S3 Trio32, S3 Trio64, and S3 Vision864
* graphics cards.
*
* Version: @(#)vid_s3.h 1.0.0 2017/05/30
* Version: @(#)vid_s3.h 1.0.1 2018/02/09
*
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 Miran Grca.
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*/
device_t s3_bahamas64_vlb_device;
@@ -24,6 +24,7 @@ device_t s3_9fx_pci_device;
device_t s3_phoenix_trio32_vlb_device;
device_t s3_phoenix_trio32_pci_device;
device_t s3_phoenix_trio64_vlb_device;
device_t s3_phoenix_trio64_onboard_pci_device;
device_t s3_phoenix_trio64_pci_device;
device_t s3_phoenix_vision864_pci_device;
device_t s3_phoenix_vision864_vlb_device;