From 0b7bec3831d00f8fe4a1b8626fdf0ca2a7c293a2 Mon Sep 17 00:00:00 2001 From: Panagiotis <58827426+tiseno100@users.noreply.github.com> Date: Tue, 13 Apr 2021 15:21:10 +0300 Subject: [PATCH 1/3] Fixes on the Aladdin IV --- src/chipset/ali1531.c | 27 ++++++++++----------------- src/chipset/ali1543.c | 36 ++++++++++++++++++++++++++---------- src/win/Makefile.mingw | 6 ++++++ 3 files changed, 42 insertions(+), 27 deletions(-) diff --git a/src/chipset/ali1531.c b/src/chipset/ali1531.c index 23a4f2564..c29d831fc 100644 --- a/src/chipset/ali1531.c +++ b/src/chipset/ali1531.c @@ -41,23 +41,20 @@ typedef struct ali1531_t smram_t *smram; } ali1531_t; -void ali1531_shadow_recalc(ali1531_t *dev) +void ali1531_shadow_recalc(int cur_reg, ali1531_t *dev) { for (uint32_t i = 0; i < 8; i++) - { - mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, (((dev->pci_conf[0x4c] >> i) & 1) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | (((dev->pci_conf[0x4e] >> i) & 1) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)); - mem_set_mem_state_both(0xe0000 + (i << 14), 0x4000, (((dev->pci_conf[0x4d] >> i) & 1) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | (((dev->pci_conf[0x4f] >> i) & 1) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)); - } + mem_set_mem_state_both(0xc0000 + ((cur_reg & 1) << 17) + (i << 14), 0x4000, (((dev->pci_conf[0x4c + (cur_reg & 1)] >> i) & 1) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | (((dev->pci_conf[0x4e + (cur_reg & 1)] >> i) & 1) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)); - shadowbios = !!(dev->pci_conf[0x4d] & 0xf0); - shadowbios_write = !!(dev->pci_conf[0x4f] & 0xf0); - - flushmmucache(); + flushmmucache_nopc(); } void ali1531_smm_recalc(uint8_t smm_state, ali1531_t *dev) { - if (!!(dev->pci_conf[0x48] & 1)) + + smram_disable_all(); + + if (dev->pci_conf[0x48] & 1) { switch (smm_state) { @@ -86,12 +83,9 @@ void ali1531_smm_recalc(uint8_t smm_state, ali1531_t *dev) smram_map(1, 0x30000, 0x10000, 1); break; } - } - else - smram_disable_all(); - flushmmucache(); + flushmmucache_nopc(); } static void @@ -160,7 +154,7 @@ ali1531_write(int func, int addr, uint8_t val, void *priv) case 0x4e: case 0x4f: dev->pci_conf[addr] = val; - ali1531_shadow_recalc(dev); + ali1531_shadow_recalc(addr, dev); break; case 0x57: /* H2PO */ @@ -202,7 +196,7 @@ ali1531_write(int func, int addr, uint8_t val, void *priv) case 0x6e: case 0x6f: dev->pci_conf[addr] = val; - spd_write_drbs(dev->pci_conf, 0x60, 0x6f, 2); + spd_write_drbs(dev->pci_conf, 0x60, 0x6f, 1); break; case 0x72: @@ -274,7 +268,6 @@ ali1531_reset(void *priv) ali1531_write(0, 0x42, 0x00, dev); ali1531_write(0, 0x43, 0x00, dev); ali1531_write(0, 0x47, 0x00, dev); - ali1531_shadow_recalc(dev); ali1531_write(0, 0x60, 0x08, dev); ali1531_write(0, 0x61, 0x40, dev); } diff --git a/src/chipset/ali1543.c b/src/chipset/ali1543.c index c14a61e83..67b513a94 100644 --- a/src/chipset/ali1543.c +++ b/src/chipset/ali1543.c @@ -96,6 +96,8 @@ typedef struct ali1543_t */ +int ali1533_irq_routing[15] = {9, 3, 0x0a, 4, 5, 7, 6, 1, 0x0b, 0, 0x0c, 0, 0x0e, 0, 0x0f}; + void ali1533_ddma_handler(ali1543_t *dev) { for (uint8_t i = 0; i < 8; i++) @@ -131,8 +133,23 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) dev->pci_conf[addr] = val & 0x7f; break; - case 0x42: + case 0x42: /* ISA Bus Speed */ dev->pci_conf[addr] = val & 0xcf; + switch(val & 7) + { + case 0: + cpu_set_isa_speed(7.16); + break; + case 1: + case 2: + case 3: + case 4: + case 5: + case 6: + cpu_set_isa_pci_div(val & 7); + break; + } + break; case 0x43: @@ -146,7 +163,7 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) case 0x44: /* Set IRQ Line for Primary IDE if it's on native mode */ dev->pci_conf[addr] = 0xdf; if (dev->ide_conf[0x09] & 1) - sff_set_irq_line(dev->ide_controller[0], val & 0x0f); + sff_set_irq_line(dev->ide_controller[0], ((val & 0x0f) == 0) ? ali1533_irq_routing[(val & 0x0f) - 1] : PCI_IRQ_DISABLED); break; case 0x45: /* DDMA Enable */ @@ -157,8 +174,8 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) case 0x48: /* PCI IRQ Routing */ case 0x49: dev->pci_conf[addr] = val; - pci_set_irq_routing(((addr & 1) * 2) + 2, ((val & 0xf0) == 0) ? (val & 0xf0) : PCI_IRQ_DISABLED); - pci_set_irq_routing(((addr & 1) * 2) + 1, ((val & 0x0f) == 0) ? (val & 0x0f) : PCI_IRQ_DISABLED); + pci_set_irq_routing(((addr & 1) * 2) + 2, (((val >> 4) & 0x0f) == 0) ? ali1533_irq_routing[((val >> 4) & 0x0f) - 1] : PCI_IRQ_DISABLED); + pci_set_irq_routing(((addr & 1) * 2) + 1, ((val & 0x0f) == 0) ? ali1533_irq_routing[(val & 0x0f) - 1] : PCI_IRQ_DISABLED); break; case 0x53: /* USB Enable */ @@ -222,13 +239,12 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) case 0x74: /* USB IRQ Routing */ dev->pci_conf[addr] = val & 0xdf; - pci_set_irq_routing(dev->usb_slot, ((val & 0x0f) == 0) ? (val & 0x0f) : PCI_IRQ_DISABLED); break; case 0x75: /* Set IRQ Line for Secondary IDE if it's on native mode */ dev->pci_conf[addr] = val & 0x1f; if (dev->ide_conf[0x09] & 8) - sff_set_irq_line(dev->ide_controller[1], val & 0x0f); + sff_set_irq_line(dev->ide_controller[1], ((val & 0x0f) == 0) ? ali1533_irq_routing[(val & 0x0f) - 1] : PCI_IRQ_DISABLED); break; case 0x76: /* PMU IRQ Routing */ @@ -319,28 +335,28 @@ void ali5229_ide_handler(ali1543_t *dev) /* Primary Channel Setup */ if (dev->ide_conf[0x09] & 0x10) { + ide_pri_enable(); if (!(dev->ide_conf[0x09] & 1)) - sff_set_irq_line(dev->ide_controller[0], dev->ide_conf[0x3c] & 0xf); + sff_set_irq_line(dev->ide_controller[0], (dev->ide_conf[0x3c] != 0) ? ali1533_irq_routing[(dev->ide_conf[0x3c] & 0x0f) - 1] : PCI_IRQ_DISABLED); ide_set_base(0, current_pri_base); ide_set_side(0, current_pri_side); sff_bus_master_handler(dev->ide_controller[0], dev->ide_conf[0x09] & 0x80, (dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)); - ide_pri_enable(); ali1543_log("M5229 PRI: BASE %04x SIDE %04x\n", current_pri_base, current_pri_side); } /* Secondary Channel Setup */ if (dev->ide_conf[0x09] & 8) { + ide_sec_enable(); if (!(dev->ide_conf[0x09] & 4)) - sff_set_irq_line(dev->ide_controller[1], dev->ide_conf[0x3c] & 0xf); + sff_set_irq_line(dev->ide_controller[1], (dev->ide_conf[0x3c] != 0) ? ali1533_irq_routing[(dev->ide_conf[0x3c] & 0x0f) - 1] : PCI_IRQ_DISABLED); ide_set_base(1, current_sec_base); ide_set_side(1, current_sec_side); sff_bus_master_handler(dev->ide_controller[1], dev->ide_conf[0x09] & 0x80, ((dev->ide_conf[0x20] & 0xf0) | (dev->ide_conf[0x21] << 8)) + 8); - ide_sec_enable(); ali1543_log("M5229 SEC: BASE %04x SIDE %04x\n", current_sec_base, current_sec_side); } } diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 7f493d925..a4d5413cf 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -51,6 +51,9 @@ ifeq ($(DEV_BUILD), y) ifndef I450KX I450KX := y endif + ifndef M154X + M145X := y + endif ifndef LASERXT LASERXT := y endif @@ -130,6 +133,9 @@ else ifndef LASERXT LASERXT := n endif + ifndef M154X + M145X := n + endif ifndef MGA MGA := n endif From 8667c8871039c3ed1fc27b724923f510e0902474 Mon Sep 17 00:00:00 2001 From: Alexander Babikov Date: Tue, 13 Apr 2021 23:46:32 +0500 Subject: [PATCH 2/3] Fix HDDs on internal SCSI controllers not displaying in the status bar --- src/win/win_stbar.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/win/win_stbar.c b/src/win/win_stbar.c index 3ae3f0f5c..e2a768570 100644 --- a/src/win/win_stbar.c +++ b/src/win/win_stbar.c @@ -639,7 +639,7 @@ ui_sb_update_panes(void) sb_map[SB_HDD | HDD_BUS_IDE] = sb_parts; sb_parts++; } - if (c_scsi && (scsi_card_current != 0)) { + if (c_scsi && (scsi_int || (scsi_card_current != 0))) { edge += icon_width; iStatusWidths[sb_parts] = edge; sb_part_meanings[sb_parts] = SB_HDD | HDD_BUS_SCSI; From 451922980fc21501f4f4e09d9b9824fd554d8e9b Mon Sep 17 00:00:00 2001 From: Alexander Babikov Date: Tue, 13 Apr 2021 23:46:50 +0500 Subject: [PATCH 3/3] Handle internal SCSI controllers in the Media menu --- src/win/win_media_menu.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/win/win_media_menu.c b/src/win/win_media_menu.c index dc295b309..a28499a81 100644 --- a/src/win/win_media_menu.c +++ b/src/win/win_media_menu.c @@ -23,6 +23,7 @@ #include <86box/win.h> #define MACHINE_HAS_IDE (machines[machine].flags & MACHINE_IDE_QUAD) +#define MACHINE_HAS_SCSI (machines[machine].flags & MACHINE_SCSI_DUAL) #define FDD_FIRST 0 #define CDROM_FIRST FDD_FIRST + FDD_NUM @@ -294,7 +295,7 @@ is_valid_cdrom(int i) { if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && !MACHINE_HAS_IDE) return 0; - if ((cdrom[i].bus_type == CDROM_BUS_SCSI) && (scsi_card_current == 0)) + if ((cdrom[i].bus_type == CDROM_BUS_SCSI) && !MACHINE_HAS_SCSI && (scsi_card_current == 0)) return 0; return cdrom[i].bus_type != 0; } @@ -304,7 +305,7 @@ is_valid_zip(int i) { if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && !MACHINE_HAS_IDE) return 0; - if ((zip_drives[i].bus_type == ZIP_BUS_SCSI) && (scsi_card_current == 0)) + if ((zip_drives[i].bus_type == ZIP_BUS_SCSI) && !MACHINE_HAS_SCSI && (scsi_card_current == 0)) return 0; return zip_drives[i].bus_type != 0; } @@ -314,7 +315,7 @@ is_valid_mo(int i) { if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && !MACHINE_HAS_IDE) return 0; - if ((mo_drives[i].bus_type == MO_BUS_SCSI) && (scsi_card_current == 0)) + if ((mo_drives[i].bus_type == MO_BUS_SCSI) && !MACHINE_HAS_SCSI && (scsi_card_current == 0)) return 0; return mo_drives[i].bus_type != 0; }