From 5a862e9551481972813a92e2964c2dc541333f10 Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Thu, 9 Jul 2020 19:28:47 +0200
Subject: [PATCH] Fixed 440GX ID without AGP and the FDC now causes the CPU to
 run the timers on MSR read when the recompiler is used.

---
 src/chipset/intel_4x0.c | 2 +-
 src/floppy/fdc.c        | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/chipset/intel_4x0.c b/src/chipset/intel_4x0.c
index 7d5c6f43c..492b4ef4f 100644
--- a/src/chipset/intel_4x0.c
+++ b/src/chipset/intel_4x0.c
@@ -1571,7 +1571,7 @@ static void
 		regs[0x7a] = (info->local >> 8) & 0xff;
 		dev->max_func = (regs[0x7a] & 0x02) ? 0 : 1;
 
-		regs[0x02] = 0xa0; regs[0x03] = 0x71;	/* 82443GX */
+		regs[0x02] = (regs[0x7a] & 0x02) ? 0xa2 : 0xa0; regs[0x03] = 0x71;	/* 82443GX */
 		regs[0x06] = (regs[0x7a] & 0x02) ? 0x00 : 0x10;
 		regs[0x08] = 0x02;
 		regs[0x10] = 0x08;
diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c
index 3be66cf0f..c49ba984d 100644
--- a/src/floppy/fdc.c
+++ b/src/floppy/fdc.c
@@ -1350,6 +1350,10 @@ fdc_read(uint16_t addr, void *priv)
 		break;
 	case 4: /*Status*/
 		ret = fdc->stat;
+#ifdef USE_DYNAREC
+		if (cpu_use_dynarec)
+			update_tsc();
+#endif
 		break;
 	case 5: /*Data*/
 		if ((fdc->stat & 0xf0) == 0xf0) {