diff --git a/src/chipset/stpc.c b/src/chipset/stpc.c
index 0609e2df5..a3bc3992e 100644
--- a/src/chipset/stpc.c
+++ b/src/chipset/stpc.c
@@ -492,6 +492,8 @@ stpc_reg_read(uint16_t addr, void *priv)
 
     if (addr == 0x22)
 	ret = dev->reg_offset;
+    else if (dev->reg_offset >= 0xc0)
+    	return 0xff; /* Cyrix CPU registers: let the CPU code handle those */
     else
 	ret = dev->regs[dev->reg_offset];
 
diff --git a/src/cpu/cpu_table.c b/src/cpu/cpu_table.c
index a22ee521b..cace5c877 100644
--- a/src/cpu/cpu_table.c
+++ b/src/cpu/cpu_table.c
@@ -368,10 +368,10 @@ CPU cpus_Cx486[] = {
 
 #if defined(DEV_BRANCH) && defined(USE_STPC)
 CPU cpus_STPC[] = {
-    {"STPC 66",      CPU_Cx486DX2, fpus_internal,  66666666, 1.0, 0x430, 0, 0x001a, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6,  8}, /* timings assumed */
-    {"STPC 75",      CPU_Cx486DX2, fpus_internal,  75000000, 1.0, 0x430, 0, 0x001a, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6,  8},
-    {"STPC 100",     CPU_Cx486DX2, fpus_internal, 100000000, 1.0, 0x430, 0, 0x001a, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6,  8},
-    {"STPC 133",     CPU_Cx486DX2, fpus_internal, 133333333, 2.0, 0x430, 0, 0x001b, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6,  8},
+    {"STPC 66",      CPU_Cx486DX2, fpus_internal,  66666666, 1.0, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6,  8}, /* timings assumed */
+    {"STPC 75",      CPU_Cx486DX2, fpus_internal,  75000000, 1.0, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6,  8},
+    {"STPC 100",     CPU_Cx486DX2, fpus_internal, 100000000, 1.0, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6,  8},
+    {"STPC 133",     CPU_Cx486DX2, fpus_internal, 133333333, 2.0, 0x430, 0, 0x0b1b, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6,  8},
     {"",               -1,                   0, 0,     0, 0,      0,                    0,  0, 0, 0, 0,  0}
 };
 #endif