From 5f3c976fbe9ab58dfa942ad80ba6e75a579c553d Mon Sep 17 00:00:00 2001
From: tiseno100 <58827426+tiseno100@users.noreply.github.com>
Date: Sat, 12 Sep 2020 15:01:20 +0300
Subject: [PATCH] Some final touches on the Intel 82335

Most I could potentially implement are now complete
- Added some commentary
- switched some complex algorithms into definitions for the sake of the code being clean
- Implemented the ROM size determination register just for some Shadow RAM sanity
---
 src/chipset/intel_82335.c | 46 ++++++++++++++++++++++++++++++---------
 1 file changed, 36 insertions(+), 10 deletions(-)

diff --git a/src/chipset/intel_82335.c b/src/chipset/intel_82335.c
index 7b1db6777..5d1485807 100644
--- a/src/chipset/intel_82335.c
+++ b/src/chipset/intel_82335.c
@@ -31,16 +31,25 @@
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
+/* Shadow capabilities */
 #define disabled_shadow (MEM_READ_EXTANY | MEM_WRITE_EXTANY)
 #define rw_shadow (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)
 #define ro_shadow (MEM_READ_INTERNAL | MEM_WRITE_DISABLED)
 
-#define extended_granuality_enabled (dev->regs[0x2c] & 0x01)
+/* Granularity Register Enable & Recalc */
+#define extended_granularity_enabled (dev->regs[0x2c] & 0x01)
+#define granularity_recalc ((dev->regs[0x2e] & (1 << (i+8))) ? ((dev->regs[0x2e] & (1 << i)) ? ro_shadow : rw_shadow) : disabled_shadow)
+
+/* R/W operator for the Video RAM region */
 #define determine_video_ram_write_access ((dev->regs[0x22] & (0x08 << 8)) ? rw_shadow : ro_shadow)
 
+/* Base System 512/640KB switch */
 #define enable_top_128kb (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)
 #define disable_top_128kb (MEM_READ_DISABLED | MEM_WRITE_DISABLED)
 
+/* ROM size determination */
+#define rom_size ((dev->regs[0x22] & (0x01 << 8)) ? 0xe0000 : 0xf0000)
+
 typedef struct
 {
 
@@ -71,10 +80,11 @@ static void
 intel_82335_write(uint16_t addr, uint16_t val, void *priv)
 {
     intel_82335_t *dev = (intel_82335_t *) priv;
-    uint32_t base, i;
+    uint32_t romsize = 0, base = 0, i = 0;
 
     dev->regs[addr] = val;
 
+    /* Unlock/Lock configuration registers */
     dev->cfg_locked = (dev->regs[0x22] & (0x80 << 8));
 
     if(!dev->cfg_locked)
@@ -83,23 +93,39 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv)
     intel_82335_log("Register %02x: Write %04x\n", addr, val);
 
     switch (addr) {
-	case 0x22:
-    if (!extended_granuality_enabled)
+	case 0x22: /* Memory Controller */
+
+    /* Check if the ROM chips are 256 or 512Kbit (Just for Shadowing sanity) */
+    romsize = rom_size; 
+
+    if (!extended_granularity_enabled)
     {
+    shadowbios = (dev->regs[0x22] & 0x01);
+    shadowbios_write = (dev->regs[0x22] & 0x01);
+
+    /* Base System 512/640KB set */
     mem_set_mem_state_both(0x80000, 0x20000, (dev->regs[0x22] & 0x08) ? enable_top_128kb : disable_top_128kb);
+
+    /* Video RAM shadow*/
     mem_set_mem_state_both(0xa0000, 0x20000, (dev->regs[0x22] & (0x04 << 8)) ? determine_video_ram_write_access : disabled_shadow);
+
+    /* Option ROM shadow */
     mem_set_mem_state_both(0xc0000, 0x20000, (dev->regs[0x22] & (0x02 << 8)) ? rw_shadow : disabled_shadow);
+
+    /* System ROM shadow */
     mem_set_mem_state_both(0xe0000, 0x20000, (dev->regs[0x22] & 0x01) ? rw_shadow : disabled_shadow);
     }
     break;
 
-	case 0x2e:
-    if(extended_granuality_enabled)
+	case 0x2e: /* Extended Granularity (Enabled if Bit 0 in Register 2Ch is set) */
+    if(extended_granularity_enabled)
     {
     for(i=0; i<8; i++)
     {
         base = 0xc0000 + (i << 15);
-        mem_set_mem_state_both(base, 0x8000, (dev->regs[0x2e] & (1 << (i+8))) ? ((dev->regs[0x2e] & (1 << i)) ? ro_shadow : rw_shadow) : disabled_shadow);
+        shadowbios = (dev->regs[0x2e] & (1 << (i+8))) && (base == romsize);
+        shadowbios_write = (dev->regs[0x2e] & (1 << i)) && (base == romsize);
+        mem_set_mem_state_both(base, 0x8000, granularity_recalc);
     }
     break;
     }
@@ -114,7 +140,7 @@ intel_82335_read(uint16_t addr, void *priv)
 {
     intel_82335_t *dev = (intel_82335_t *) priv;
 
-    intel_82335_log("Register %02x: Reading\n", addr);
+    intel_82335_log("Register %02x: Read %04x\n", addr, dev->regs[addr]);
 
     return dev->regs[addr];
 
@@ -153,10 +179,10 @@ intel_82335_init(const device_t *info)
     io_sethandler(0x0028, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev);
     io_sethandler(0x002a, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev);
 
-    /* Granuality Enable */
+    /* granularity Enable */
     io_sethandler(0x002c, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev);
 
-    /* Extended Granuality */
+    /* Extended granularity */
 	io_sethandler(0x002e, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev);
     
     return dev;