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Even more i8080 work (#20)

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This commit is contained in:
Cacodemon345
2022-09-11 11:47:13 +06:00
committed by GitHub
parent 54bc9dc58c
commit 62fc657466
2 changed files with 67 additions and 7 deletions
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67
src/cpu/8080.c
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@@ -26,6 +26,9 @@ static int in_rep = 0, repeating = 0, rep_c_flag = 0;
static int oldc, clear_lock = 0; static int oldc, clear_lock = 0;
static int refresh = 0, cycdiff; static int refresh = 0, cycdiff;
static uint32_t cpu_src = 0, cpu_dest = 0;
static uint32_t cpu_data = 0;
static void static void
clock_start(void) clock_start(void)
{ {
@@ -68,7 +71,7 @@ readmemb(uint32_t a)
static uint8_t static uint8_t
ins_fetch(i8080* cpu) ins_fetch(i8080* cpu)
{ {
uint8_t ret = readmemb(cpu->pmembase + cpu->pc); uint8_t ret = cpu->readmembyte(cpu->pmembase + cpu->pc);
cpu->pc++; cpu->pc++;
return ret; return ret;
@@ -114,14 +117,64 @@ getreg_i8080(i8080 *cpu, uint8_t reg)
case 0x3: ret = cpu->e; break; case 0x3: ret = cpu->e; break;
case 0x4: ret = cpu->h; break; case 0x4: ret = cpu->h; break;
case 0x5: ret = cpu->l; break; case 0x5: ret = cpu->l; break;
case 0x6: ret = readmemb(cpu->dmembase + cpu->sp); break; case 0x6: ret = cpu->readmembyte(cpu->dmembase + cpu->sp); break;
case 0x7: ret = cpu->a; break; case 0x7: ret = cpu->a; break;
} }
return ret; return ret;
} }
uint8_t
getreg_i8080_emu(i8080 *cpu, uint8_t reg)
{
uint8_t ret = 0xFF;
switch(reg)
{
case 0x0: ret = CH; break;
case 0x1: ret = CL; break;
case 0x2: ret = DH; break;
case 0x3: ret = DL; break;
case 0x4: ret = BH; break;
case 0x5: ret = BL; break;
case 0x6: ret = cpu->readmembyte(cpu->dmembase + BP); break;
case 0x7: ret = AL; break;
}
return ret;
}
void void
interpret_exec8080(i8080* cpu, uint8_t opcode, uint8_t (*fetch_instruction)(i8080*)) setreg_i8080_emu(i8080 *cpu, uint8_t reg, uint8_t val)
{
switch(reg)
{
case 0x0: CH = val; break;
case 0x1: CL = val; break;
case 0x2: DH = val; break;
case 0x3: DL = val; break;
case 0x4: BH = val; break;
case 0x5: BL = val; break;
case 0x6: cpu->writemembyte(cpu->dmembase + BP, val); break;
case 0x7: AL = val; break;
}
}
void
setreg_i8080(i8080 *cpu, uint8_t reg, uint8_t val)
{
switch(reg)
{
case 0x0: cpu->b = val; break;
case 0x1: cpu->c = val; break;
case 0x2: cpu->d = val; break;
case 0x3: cpu->e = val; break;
case 0x4: cpu->h = val; break;
case 0x5: cpu->l = val; break;
case 0x6: cpu->writemembyte(cpu->dmembase + cpu->sp, val); break;
case 0x7: cpu->a = val; break;
}
}
void
interpret_exec8080(i8080* cpu, uint8_t opcode)
{ {
switch (opcode) { switch (opcode) {
case 0x00: case 0x00:
@@ -145,11 +198,11 @@ exec8080(i8080* cpu, int cycs)
cycles += cycs; cycles += cycs;
while (cycles > 0) { while (cycles > 0) {
clock_start(); cpu->startclock();
if (!repeating) { if (!repeating) {
cpu->oldpc = cpu->pc; cpu->oldpc = cpu->pc;
opcode = ins_fetch(cpu); opcode = cpu->fetchinstruction(cpu);
oldc = cpu->flags & C_FLAG_I8080; oldc = cpu->flags & C_FLAG_I8080;
wait(1, 0); wait(1, 0);
} }
@@ -158,8 +211,8 @@ exec8080(i8080* cpu, int cycs)
repeating = 0; repeating = 0;
in_rep = 0; in_rep = 0;
rep_c_flag = 0; rep_c_flag = 0;
clock_end(); cpu->endclock();
//check_interrupts(); if (cpu->checkinterrupts) cpu->checkinterrupts();
} }
} }
} }

7
src/include/86box/i8080.h
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@@ -40,6 +40,13 @@ typedef struct i8080
uint16_t oldpc, ei; uint16_t oldpc, ei;
uint32_t pmembase, dmembase; /* Base from where i8080 starts. */ uint32_t pmembase, dmembase; /* Base from where i8080 starts. */
uint8_t emulated; /* 0 = not emulated, use separate registers, 1 = emulated, use x86 registers. */ uint8_t emulated; /* 0 = not emulated, use separate registers, 1 = emulated, use x86 registers. */
uint16_t* cpu_flags;
void (*writemembyte)(uint32_t, uint8_t);
uint8_t (*readmembyte)(uint32_t);
void (*startclock)();
void (*endclock)();
void (*checkinterrupts)();
uint8_t (*fetchinstruction)();
} i8080; } i8080;
#define C_FLAG_I8080 (1 << 0) #define C_FLAG_I8080 (1 << 0)