diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index ca7888502..546da2aa3 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -1173,6 +1173,8 @@ enter_smm(int in_hlt) if (unmask_a20_in_smm) { old_rammask = rammask; rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF; + if (is6117) + rammask |= 0x3000000; flushmmucache(); } diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index b416206f6..a880ef1a5 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -114,7 +114,7 @@ int isa_cycles, cpu_inited, cpu_override, cpu_effective, cpu_multi, cpu_16bitbus, cpu_64bitbus, cpu_busspeed, cpu_cyrix_alignment, CPUID, - is286, is386, is486 = 1, + is286, is386, is6117, is486 = 1, cpu_isintel, cpu_iscyrix, hascache, isibm486, israpidcad, is_vpc, is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm, hasfpu, @@ -382,6 +382,8 @@ cpu_set(void) is_am486 = (cpu_s->cpu_type == CPU_ENH_Am486DX); is_am486dxl = (cpu_s->cpu_type == CPU_Am486DXL); + is6117 = !strcmp(cpu_f->manufacturer, "ALi"); + cpu_isintel = !strcmp(cpu_f->manufacturer, "Intel"); cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST"); diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index 6d66e1531..b6998162f 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -495,7 +495,7 @@ extern double fpu_multi; extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment penalties when crossing 8-byte boundaries*/ -extern int is8086, is286, is386, is486; +extern int is8086, is286, is386, is6117, is486; extern int is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm; extern int hascache; extern int isibm486; diff --git a/src/cpu/x86.c b/src/cpu/x86.c index e8370a5b5..bf5b168db 100644 --- a/src/cpu/x86.c +++ b/src/cpu/x86.c @@ -272,6 +272,8 @@ reset_common(int hard) loadcs(0xF000); cpu_state.pc = 0xFFF0; rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF; + if (is6117) + rammask |= 0x03000000; } idt.base = 0; cpu_state.flags = 2; diff --git a/src/cpu/x86seg.c b/src/cpu/x86seg.c index 67cf04222..e103f0247 100644 --- a/src/cpu/x86seg.c +++ b/src/cpu/x86seg.c @@ -83,7 +83,10 @@ seg_reset(x86seg *s) if (s == &cpu_state.seg_cs) { if (!cpu_inited) fatal("seg_reset(&cpu_state.seg.cs) without an initialized CPU\n"); - s->base = is286 ? (cpu_16bitbus ? 0x00ff0000 : 0xffff0000) : 0x000ffff0; + if (is6117) + s->base = 0x03ff0000; + else + s->base = is286 ? (cpu_16bitbus ? 0x00ff0000 : 0xffff0000) : 0x000ffff0; s->seg = is286 ? 0xf000 : 0xffff; } else { s->base = 0;