TGUI9440AGi/96xx changes:

If the chips are PCI-based, assume linear addressing is always enabled when the linear base is on valid value (e.g.: not 0). Should fix a regression when linear addressing is used by almost everything in the PCI world (e.g.: Win95's drivers).
This commit is contained in:
TC1995
2024-01-15 21:52:39 +01:00
parent cf7cef5538
commit 69572283f3

View File

@@ -891,7 +891,6 @@ tgui_recalcmapping(tgui_t *tgui)
}
} else {
mem_mapping_disable(&tgui->linear_mapping);
mem_mapping_disable(&tgui->accel_mapping);
switch (svga->gdcreg[6] & 0xC) {
case 0x0: /*128k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
@@ -899,12 +898,6 @@ tgui_recalcmapping(tgui_t *tgui)
break;
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
if ((svga->crtc[0x36] & 0x03) == 0x01)
mem_mapping_set_addr(&tgui->accel_mapping, 0xb4000, 0x4000);
else if ((svga->crtc[0x36] & 0x03) == 0x02)
mem_mapping_set_addr(&tgui->accel_mapping, 0xbc000, 0x4000);
else if ((svga->crtc[0x36] & 0x03) == 0x03)
mem_mapping_set_addr(&tgui->accel_mapping, tgui->ge_base, 0x4000);
svga->banked_mask = 0xffff;
break;
case 0x8: /*32k at B0000*/
@@ -919,6 +912,18 @@ tgui_recalcmapping(tgui_t *tgui)
default:
break;
}
if (tgui->pci && tgui->linear_base) /*Assume that, with PCI, linear addressing is always enabled.*/
mem_mapping_set_addr(&tgui->linear_mapping, tgui->linear_base, tgui->linear_size);
if ((svga->crtc[0x36] & 0x03) == 0x01)
mem_mapping_set_addr(&tgui->accel_mapping, 0xb4000, 0x4000);
else if ((svga->crtc[0x36] & 0x03) == 0x02)
mem_mapping_set_addr(&tgui->accel_mapping, 0xbc000, 0x4000);
else if ((svga->crtc[0x36] & 0x03) == 0x03)
mem_mapping_set_addr(&tgui->accel_mapping, tgui->ge_base, 0x4000);
else
mem_mapping_disable(&tgui->accel_mapping);
}
if (tgui->type >= TGUI_9440) {
@@ -982,7 +987,7 @@ tgui_pci_read(UNUSED(int func), int addr, void *priv)
return (tgui->type == TGUI_9440) ? 0x94 : 0x96;
case PCI_REG_COMMAND:
return tgui->pci_regs[PCI_REG_COMMAND]; /*Respond to IO and memory accesses*/
return tgui->pci_regs[PCI_REG_COMMAND] | 0x80; /*Respond to IO and memory accesses*/
case 0x07:
return 1 << 1; /*Medium DEVSEL timing*/
@@ -1043,11 +1048,12 @@ tgui_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
switch (addr) {
case PCI_REG_COMMAND:
tgui->pci_regs[PCI_REG_COMMAND] = (val & 0x23);
if (val & PCI_COMMAND_IO) {
tgui->pci_regs[PCI_REG_COMMAND] = val & 0x23;
if (val & PCI_COMMAND_IO)
tgui_set_io(tgui);
} else
else
tgui_remove_io(tgui);
tgui_recalcmapping(tgui);
break;
@@ -3193,7 +3199,7 @@ tgui_init(const device_t *info)
pci_add_card(PCI_ADD_VIDEO | PCI_ADD_STRICT, tgui_pci_read, tgui_pci_write, tgui, &tgui->pci_slot);
}
tgui->pci_regs[PCI_REG_COMMAND] = 7;
tgui->pci_regs[PCI_REG_COMMAND] = 0x83;
if (tgui->has_bios) {
tgui->pci_regs[0x30] = 0x00;