diff --git a/src/chipset/cs4031.c b/src/chipset/cs4031.c new file mode 100644 index 000000000..d958dad7f --- /dev/null +++ b/src/chipset/cs4031.c @@ -0,0 +1,200 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the Chips & Technologies CS4031 chipset. + * + * + * + * Authors: Tiseno100 + * + * Copyright 2020 Tiseno100 + * + */ + +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include "cpu.h" +#include <86box/timer.h> +#include <86box/io.h> +#include <86box/device.h> +#include <86box/keyboard.h> +#include <86box/mem.h> +#include <86box/fdd.h> +#include <86box/fdc.h> +#include <86box/port_92.h> +#include <86box/chipset.h> + + +typedef struct +{ + uint8_t index, + regs[256]; + port_92_t * port_92; +} cs4031_t; + +#ifdef ENABLE_CS4031_LOG +int cs4031_do_log = ENABLE_CS4031_LOG; +static void +cs4031_log(const char *fmt, ...) +{ + va_list ap; + + if (cs4031_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +#define cs4031_log(fmt, ...) +#endif + +static void cs4031_shadow_recalc(cs4031_t *dev) +{ + +uint32_t romc0000, romc4000, romc8000, romcc000, romd0000, rome0000, romf0000; + +/* Register 18h */ +if(dev->regs[0x18] & 0x01) +mem_set_mem_state_both(0xa0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); +else +mem_set_mem_state_both(0xa0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + +if(dev->regs[0x18] & 0x02) +mem_set_mem_state_both(0xb0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); +else +mem_set_mem_state_both(0xb0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + + +/* Register 19h-1ah-1bh*/ + +shadowbios = (dev->regs[0x19] & 0x40); +shadowbios_write = (dev->regs[0x1a] & 0x40); + +/* ROMCS only functions if shadow write is disabled */ +romc0000 = ((dev->regs[0x1b] & 0x80) && (dev->regs[0x1b] & 0x01)) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY; +romc4000 = ((dev->regs[0x1b] & 0x80) && (dev->regs[0x1b] & 0x02)) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY; +romc8000 = ((dev->regs[0x1b] & 0x80) && (dev->regs[0x1b] & 0x04)) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY; +romcc000 = ((dev->regs[0x1b] & 0x80) && (dev->regs[0x1b] & 0x08)) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY; +romd0000 = ((dev->regs[0x1b] & 0x80) && (dev->regs[0x1b] & 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY; +rome0000 = ((dev->regs[0x1b] & 0x80) && (dev->regs[0x1b] & 0x20)) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY; +romf0000 = ((dev->regs[0x1b] & 0x80) && (dev->regs[0x1b] & 0x40)) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY; + + +mem_set_mem_state_both(0xc0000, 0x4000, ((dev->regs[0x19] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x1a] & 0x01) ? MEM_WRITE_INTERNAL : romc0000)); +mem_set_mem_state_both(0xc4000, 0x4000, ((dev->regs[0x19] & 0x02) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x1a] & 0x02) ? MEM_WRITE_INTERNAL : romc4000)); +mem_set_mem_state_both(0xc8000, 0x4000, ((dev->regs[0x19] & 0x04) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x1a] & 0x04) ? MEM_WRITE_INTERNAL : romc8000)); +mem_set_mem_state_both(0xcc000, 0x4000, ((dev->regs[0x19] & 0x08) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x1a] & 0x08) ? MEM_WRITE_INTERNAL : romcc000)); +mem_set_mem_state_both(0xd0000, 0x10000, ((dev->regs[0x19] & 0x10) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x1a] & 0x10) ? MEM_WRITE_INTERNAL : romd0000)); +mem_set_mem_state_both(0xe0000, 0x10000, ((dev->regs[0x19] & 0x20) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x1a] & 0x20) ? MEM_WRITE_INTERNAL : rome0000)); +mem_set_mem_state_both(0xf0000, 0x10000, ((dev->regs[0x19] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x1a] & 0x40) ? MEM_WRITE_INTERNAL : romf0000)); + + +} + +static void +cs4031_write(uint16_t addr, uint8_t val, void *priv) +{ + cs4031_t *dev = (cs4031_t *) priv; + + switch (addr) { + case 0x22: + dev->index = val; + break; + case 0x23: + cs4031_log("CS4031: dev->regs[%02x] = %02x\n", dev->index, val); + dev->regs[dev->index] = val; + + switch(dev->index){ + case 0x06: + cpu_update_waitstates(); + break; + + case 0x18: + case 0x19: + case 0x1a: + case 0x1b: + cs4031_shadow_recalc(dev); + break; + + case 0x1c: + + if(dev->regs[0x1c] & 0x20) + port_92_add(dev->port_92); + else + port_92_remove(dev->port_92); + + break; + + } + break; + } +} + + +static uint8_t +cs4031_read(uint16_t addr, void *priv) +{ + uint8_t ret = 0xff; + cs4031_t *dev = (cs4031_t *) priv; + + switch (addr) { + case 0x23: + ret = dev->regs[dev->index]; + break; + } + + return ret; +} + + +static void +cs4031_close(void *priv) +{ + cs4031_t *dev = (cs4031_t *) priv; + + free(dev); +} + + +static void * +cs4031_init(const device_t *info) +{ + cs4031_t *dev = (cs4031_t *) malloc(sizeof(cs4031_t)); + memset(dev, 0, sizeof(cs4031_t)); + + dev->port_92 = device_add(&port_92_device); + + io_sethandler(0x022, 0x0001, cs4031_read, NULL, NULL, cs4031_write, NULL, NULL, dev); + io_sethandler(0x023, 0x0001, cs4031_read, NULL, NULL, cs4031_write, NULL, NULL, dev); + + dev->regs[0x05] = 0x05; + dev->regs[0x18] = 0x00; + dev->regs[0x19] = 0x00; + dev->regs[0x1a] = 0x00; + dev->regs[0x1b] = 0x60; + cs4031_shadow_recalc(dev); + + return dev; +} + + +const device_t cs4031_device = { + "Chips & Technogies CS4031", + 0, + 0, + cs4031_init, cs4031_close, NULL, + NULL, NULL, NULL, + NULL +}; diff --git a/src/include/86box/chipset.h b/src/include/86box/chipset.h index 6f299d55e..2e95dda02 100644 --- a/src/include/86box/chipset.h +++ b/src/include/86box/chipset.h @@ -24,6 +24,17 @@ extern const device_t acc2168_device; /* ALi */ extern const device_t ali1429_device; +/* AMD */ +extern const device_t amd640_device; + +/* C&T */ +extern const device_t neat_device; +extern const device_t scat_device; +extern const device_t scat_4_device; +extern const device_t scat_sx_device; +extern const device_t cs8230_device; +extern const device_t cs4031_device; + /* Headland */ extern const device_t headland_gc10x_device; extern const device_t headland_ht18a_device; @@ -70,13 +81,6 @@ extern const device_t opti802g_device; extern const device_t opti895_device; extern const device_t opti5x7_device; -/* C&T */ -extern const device_t neat_device; -extern const device_t scat_device; -extern const device_t scat_4_device; -extern const device_t scat_sx_device; -extern const device_t cs8230_device; - /* SiS */ extern const device_t rabbit_device; extern const device_t sis_85c471_device; @@ -110,9 +114,6 @@ extern const device_t via_apro_device; extern const device_t via_vt82c586b_device; extern const device_t via_vt82c596b_device; -/* AMD */ -extern const device_t amd640_device; - /* VLSI */ extern const device_t vl82c480_device; extern const device_t vlsi_scamp_device; diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index e78006878..32b338854 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -258,6 +258,8 @@ extern int machine_at_rycleopardlx_init(const machine_t *); extern int machine_at_486vchd_init(const machine_t *); +extern int machine_at_cs4031_init(const machine_t *); + extern int machine_at_pb410a_init(const machine_t *); extern int machine_at_acera1g_init(const machine_t *); @@ -284,6 +286,9 @@ extern int machine_at_4dps_init(const machine_t *); extern int machine_at_alfredo_init(const machine_t *); extern int machine_at_486sp3g_init(const machine_t *); extern int machine_at_486ap4_init(const machine_t *); +#if defined(DEV_BRANCH) && defined(NO_SIO) +extern int machine_at_486vipio2_init(const machine_t *); +#endif #if defined(DEV_BRANCH) && defined(USE_STPC) extern int machine_at_itoxstar_init(const machine_t *); extern int machine_at_arb1479_init(const machine_t *); @@ -291,10 +296,6 @@ extern int machine_at_pcm9340_init(const machine_t *); extern int machine_at_pcm5330_init(const machine_t *); #endif -#if defined(DEV_BRANCH) && defined(NO_SIO) -extern int machine_at_486vipio2_init(const machine_t *); -#endif - #ifdef EMU_DEVICE_H extern const device_t *at_acera1g_get_device(void); #endif diff --git a/src/machine/m_at_386dx_486.c b/src/machine/m_at_386dx_486.c index 6e4759f3d..24e6b746a 100644 --- a/src/machine/m_at_386dx_486.c +++ b/src/machine/m_at_386dx_486.c @@ -143,6 +143,25 @@ machine_at_486vchd_init(const machine_t *model) return ret; } +int +machine_at_cs4031_init(const machine_t *model) +{ + int ret; + +ret = bios_load_linear(L"roms/machines/cs4031/CHIPS_1.AMI", + 0x000f0000, 65536, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init(model); + device_add(&cs4031_device); + device_add(&keyboard_at_ami_device); + device_add(&fdc_at_device); + + return ret; +} + int machine_at_pb410a_init(const machine_t *model) { @@ -632,6 +651,36 @@ machine_at_486ap4_init(const machine_t *model) return ret; } +#if defined(DEV_BRANCH) && defined(NO_SIO) +int +machine_at_486vipio2_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear(L"roms/machines/486vipio2/1175G701.BIN", + 0x000e0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init(model); + + pci_init(PCI_CONFIG_TYPE_1); + pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0); + pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3); + + device_add(&via_vt82c49x_device); + device_add(&via_vt82c505_device); + device_add(&ide_vlb_2ch_device); + device_add(&w83787f_device); + device_add(&keyboard_at_device); + + return ret; +} +#endif #if defined(DEV_BRANCH) && defined(USE_STPC) int @@ -765,34 +814,3 @@ machine_at_pcm5330_init(const machine_t *model) return ret; } #endif - -#if defined(DEV_BRANCH) && defined(NO_SIO) -int -machine_at_486vipio2_init(const machine_t *model) -{ - int ret; - - ret = bios_load_linear(L"roms/machines/486vipio2/1175G701.BIN", - 0x000e0000, 131072, 0); - - if (bios_only || !ret) - return ret; - - machine_at_common_init(model); - - pci_init(PCI_CONFIG_TYPE_1); - pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0); - pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4); - pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1); - pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); - pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3); - - device_add(&via_vt82c49x_device); - device_add(&via_vt82c505_device); - device_add(&ide_vlb_2ch_device); - device_add(&w83787f_device); - device_add(&keyboard_at_device); - - return ret; -} -#endif diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index e17cc699b..1adddce94 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -206,6 +206,7 @@ const machine_t machines[] = { { "[OPTi 495] MR 486 clone", "mr486", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_mr_init, NULL }, { "[OPTi 495] Dataexpert SX495 (486)", "ami486", MACHINE_TYPE_486, {{"Intel", cpus_i486S1}, {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_ami_init, NULL }, { "[OPTi 895] Jetway J-403TG", "403tg", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT, 1, 64, 1, 127, machine_at_403tg_init, NULL }, + { "[CS4031] AMI 486 CS4031", "cs4031", MACHINE_TYPE_486, {{"Intel", cpus_i486S1}, {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT, 1, 32, 1, 127, machine_at_cs4031_init, NULL }, { "[SiS 471] ASUS VL/I-486SV2G (GX4)", "vli486sv2g", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_vli486sv2g_init, NULL }, { "[SiS 471] AMI 486 Clone", "ami471", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_ami471_init, NULL }, #if defined(DEV_BRANCH) && defined(USE_WIN471) @@ -231,6 +232,9 @@ const machine_t machines[] = { { "[SiS 496] Lucky Star LS-486E", "ls486e", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 128, 1, 255, machine_at_ls486e_init, NULL }, { "[SiS 496] Rise Computer R418", "r418", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 255, 1, 255, machine_at_r418_init, NULL }, { "[SiS 496] Zida Tomato 4DP", "4dps", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 255, 1, 255, machine_at_4dps_init, NULL }, +#if defined(DEV_BRANCH) && defined(NO_SIO) + { "[VIA VT82C496G] FIC VIP-IO2", "486vipio2", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 128, 1, 255, machine_at_486vipio2_init, NULL }, +#endif #if defined(DEV_BRANCH) && defined(USE_STPC) { "[STPC Client] ITOX STAR", "itoxstar", MACHINE_TYPE_486, {{"ST", cpus_STPC6675}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 255, machine_at_itoxstar_init, NULL }, { "[STPC Consumer-II] Acrosser AR-B1479", "arb1479", MACHINE_TYPE_486, {{"ST", cpus_STPC133}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 32, 160, 8, 255, machine_at_arb1479_init, NULL }, @@ -238,10 +242,6 @@ const machine_t machines[] = { { "[STPC Atlas] AAEON PCM-5330", "pcm5330", MACHINE_TYPE_486, {{"ST", cpus_STPC133}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 32, 128, 32, 255, machine_at_pcm5330_init, NULL }, #endif -#if defined(DEV_BRANCH) && defined(NO_SIO) - { "[VIA VT82C496G] FIC VIP-IO2", "486vipio2", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 128, 1, 255, machine_at_486vipio2_init, NULL }, -#endif - /* Socket 4 machines */ /* OPTi 596/597 */ { "[OPTi 597] AMI Excalibur VLB", "excalibur", MACHINE_TYPE_SOCKET4, {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 2, 64, 2, 127, machine_at_excalibur_init, NULL }, diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 318a2e82a..0c159bd8c 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -614,7 +614,7 @@ CPUOBJ := cpu.o cpu_table.o \ x86seg.o x87.o x87_timings.o \ $(DYNARECOBJ) -CHIPSETOBJ := acc2168.o cs8230.o ali1429.o headland.o i82335.o \ +CHIPSETOBJ := acc2168.o cs8230.o ali1429.o headland.o i82335.o cs4031.o \ intel_420ex.o intel_4x0.o intel_sio.o intel_piix.o ioapic.o \ neat.o opti495.o opti895.o opti5x7.o scamp.o scat.o via_vt82c49x.o via_vt82c505.o \ sis_85c310.o sis_85c471.o sis_85c496.o opti283.o opti291.o $(STPCOBJ) \ @@ -702,7 +702,8 @@ PRINTOBJ := png.o prt_cpmap.o \ SNDOBJ := sound.o \ openal.o \ - snd_opl.o snd_opl_nuked.o \ + snd_opl.o snd_opl_backend.o \ + nukedopl.o \ snd_resid.o \ convolve.o convolve-sse.o envelope.o extfilt.o \ filter.o pot.o sid.o voice.o wave6581__ST.o \