From 0ed4548aeb2fa7af3a5da3bdb70554ed67dc5c90 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 15 Feb 2023 14:32:47 +0100 Subject: [PATCH 1/9] Fixed warnings in device/serial_passthrough.c. --- src/device/serial_passthrough.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/src/device/serial_passthrough.c b/src/device/serial_passthrough.c index 6025f264a..b5026f9b6 100644 --- a/src/device/serial_passthrough.c +++ b/src/device/serial_passthrough.c @@ -62,12 +62,6 @@ serial_passthrough_init(void) } } -static void -serial_passthrough_timers_off(serial_passthrough_t *dev) -{ - timer_stop(&dev->host_to_serial_timer); -} - static void serial_passthrough_write(serial_t *s, void *priv, uint8_t val) { @@ -182,7 +176,7 @@ serial_passthrough_dev_init(const device_t *info) dev->serial = serial_attach_ex(dev->port, serial_passthrough_rcr_cb, serial_passthrough_write, serial_passthrough_transmit_period, serial_passthrough_lcr_callback, dev); - strncpy(dev->host_serial_path, device_get_config_string("host_serial_path"), 1024); + strncpy(dev->host_serial_path, device_get_config_string("host_serial_path"), 1023); serial_passthrough_log("%s: port=COM%d\n", info->name, dev->port + 1); serial_passthrough_log("%s: baud=%f\n", info->name, dev->baudrate); From 9d59f72f0b088b59b54c09d8c5390094c958f461 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 15 Feb 2023 16:00:46 +0100 Subject: [PATCH 2/9] Rewrote the serial port receiver FIFO. --- src/device/serial.c | 204 +++++++++++++++++++++++++++---------- src/include/86box/serial.h | 9 +- 2 files changed, 155 insertions(+), 58 deletions(-) diff --git a/src/device/serial.c b/src/device/serial.c index 7d90a0fe8..2d656b40f 100644 --- a/src/device/serial.c +++ b/src/device/serial.c @@ -78,10 +78,13 @@ serial_reset_port(serial_t *dev) dev->iir = dev->ier = dev->lcr = dev->fcr = 0; dev->fifo_enabled = 0; dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0; + dev->xmit_fifo_end = dev->rcvr_fifo_end = 0; dev->rcvr_fifo_full = 0; dev->baud_cycles = 0; + dev->new = 0; + dev->out_new = 0xffff; memset(dev->xmit_fifo, 0, 16); - memset(dev->rcvr_fifo, 0, 14); + memset(dev->rcvr_fifo, 0, 16); } void @@ -89,7 +92,10 @@ serial_transmit_period(serial_t *dev) { double ddlab; - ddlab = (double) dev->dlab; + if (dev->dlab != 0x0000) + ddlab = (double) dev->dlab; + else + ddlab = 65536.0; /* Bit period based on DLAB. */ dev->transmit_period = (16000000.0 * ddlab) / dev->clock_src; @@ -145,42 +151,88 @@ serial_clear_timeout(serial_t *dev) } static void -write_fifo(serial_t *dev, uint8_t dat) +serial_receive_timer(void *priv) { - serial_log("write_fifo(%08X, %02X, %i, %i)\n", dev, dat, (dev->type >= SERIAL_16550) && dev->fifo_enabled, dev->rcvr_fifo_pos & 0x0f); + serial_t *dev = (serial_t *) priv; +#if 0 + uint16_t old_out_new = dev->out_new; +#endif + + // serial_log("serial_receive_timer()\n"); + + timer_on_auto(&dev->receive_timer, /* dev->bits * */ dev->transmit_period); if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) { /* FIFO mode. */ - timer_disable(&dev->timeout_timer); - /* Indicate overrun. */ - if (dev->rcvr_fifo_full) - dev->lsr |= 0x02; - else - dev->rcvr_fifo[dev->rcvr_fifo_pos] = dat; - dev->lsr &= 0xfe; - dev->int_status &= ~SERIAL_INT_RECEIVE; - if (dev->rcvr_fifo_pos == (dev->rcvr_fifo_len - 1)) { - dev->lsr |= 0x01; - dev->int_status |= SERIAL_INT_RECEIVE; + + if (dev->out_new != 0xffff) { + /* We have received a byte into the RSR. */ + + /* Clear FIFO timeout. */ + serial_clear_timeout(dev); + + if (dev->rcvr_fifo_full) { + /* Overrun - just discard the byte in the RSR. */ + serial_log("FIFO overrun\n"); + dev->lsr |= 0x02; + } else { + /* We can input data into the FIFO. */ + dev->rcvr_fifo[dev->rcvr_fifo_end] = (uint8_t) (dev->out_new & 0xff); + dev->rcvr_fifo_end = (dev->rcvr_fifo_end + 1) & 0x0f; + + serial_log("To FIFO: %02X (%i)\n", (uint8_t) (dev->out_new & 0xff), + abs(dev->rcvr_fifo_end - dev->rcvr_fifo_pos)); + dev->out_new = 0xffff; + + if (abs(dev->rcvr_fifo_end - dev->rcvr_fifo_pos) >= dev->rcvr_fifo_len) { + /* We have >= trigger level bytes, raise Data Ready interrupt. */ + serial_log("We have >= %i bytes in the FIFO, data ready!\n", dev->rcvr_fifo_len); + dev->lsr |= 0x01; + dev->int_status |= SERIAL_INT_RECEIVE; + serial_update_ints(dev); + } + + timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period); + } } - if (dev->rcvr_fifo_pos < (dev->rcvr_fifo_len - 1)) - dev->rcvr_fifo_pos++; - else - dev->rcvr_fifo_full = 1; - serial_update_ints(dev); - timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period); + } + + serial_update_ints(dev); + +#if 0 + serial_log("FIFO: %i, out_new = %04X, old_out_new = %04X, was_enabled = %i, condition = %i\n", + ((dev->type >= SERIAL_16550) && dev->fifo_enabled), dev->out_new, + old_out_new, was_enabled, + ((dev->type >= SERIAL_16550) && dev->fifo_enabled) ? (dev->rcvr_fifo_pos != dev->rcvr_fifo_end) : dev->new); +#endif +} + +static void +write_fifo(serial_t *dev, uint8_t dat) +{ + serial_log("write_fifo(%08X, %02X, %i, %i)\n", dev, dat, (dev->type >= SERIAL_16550) && dev->fifo_enabled, dev->rcvr_fifo_pos % dev->rcvr_fifo_len); + + if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) { + /* FIFO mode. */ + + /* This is the first phase, we are sending the data to the RSR (Receiver Shift + Register), from where it's going to get dispatched to the FIFO. */ } else { /* Non-FIFO mode. */ + /* Indicate overrun. */ if (dev->lsr & 0x01) dev->lsr |= 0x02; - dev->dat = dat; + + /* Raise Data Ready interrupt. */ + serial_log("To RHR: %02X\n", dat); dev->lsr |= 0x01; dev->int_status |= SERIAL_INT_RECEIVE; - if (dev->lsr & 0x02) - dev->int_status |= SERIAL_INT_LSR; serial_update_ints(dev); } + + /* Do this here, because in non-FIFO mode, this is read directly. */ + dev->out_new = (uint16_t) dat; } void @@ -334,6 +386,8 @@ serial_device_timeout(void *priv) static void serial_update_speed(serial_t *dev) { + timer_on_auto(&dev->receive_timer, /* dev->bits * */ dev->transmit_period); + if (dev->transmit_enabled & 3) timer_on_auto(&dev->transmit_timer, dev->transmit_period); @@ -482,6 +536,7 @@ serial_write(uint16_t addr, uint8_t val, void *p) if (val & 0x02) { memset(dev->rcvr_fifo, 0, 14); dev->rcvr_fifo_pos = 0; + dev->rcvr_fifo_end = 0; dev->rcvr_fifo_full = 0; } if (val & 0x04) { @@ -502,6 +557,8 @@ serial_write(uint16_t addr, uint8_t val, void *p) dev->rcvr_fifo_len = 14; break; } + dev->out_new = 0xffff; + dev->new = 0; serial_log("FIFO now %sabled, receive FIFO length = %i\n", dev->fifo_enabled ? "en" : "dis", dev->rcvr_fifo_len); } break; @@ -583,7 +640,7 @@ uint8_t serial_read(uint16_t addr, void *p) { serial_t *dev = (serial_t *) p; - uint8_t i, ret = 0; + uint8_t ret = 0; cycles -= ISA_CYCLES(8); @@ -594,37 +651,46 @@ serial_read(uint16_t addr, void *p) break; } + /* Clear timeout. */ + serial_clear_timeout(dev); + if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) { /* FIFO mode. */ - serial_clear_timeout(dev); + if (dev->rcvr_fifo_pos != dev->rcvr_fifo_end) { + /* There is data in the FIFO. */ + ret = dev->rcvr_fifo[dev->rcvr_fifo_pos]; + dev->rcvr_fifo_pos = (dev->rcvr_fifo_pos + 1) & 0x0f; - ret = dev->rcvr_fifo[0]; - dev->rcvr_fifo_full = 0; + if (abs(dev->rcvr_fifo_pos - dev->rcvr_fifo_end) < dev->rcvr_fifo_len) { + /* Amount of data in the FIFO below trigger level, + clear Data Ready interrupt. */ + dev->lsr &= 0xfe; + dev->int_status &= ~SERIAL_INT_RECEIVE; + serial_update_ints(dev); - for (i = 1; i < 16; i++) - dev->rcvr_fifo[i - 1] = dev->rcvr_fifo[i]; - - dev->rcvr_fifo_pos--; - - if (dev->rcvr_fifo_pos > 0) { - serial_log("FIFO position %i: read %02X, next %02X\n", dev->rcvr_fifo_pos, ret, dev->rcvr_fifo[0]); - - /* At least one byte remains to be read, start the timeout - timer so that a timeout is indicated in case of no read. */ - timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period); - } else { - dev->lsr &= 0xfe; - dev->int_status &= ~SERIAL_INT_RECEIVE; - serial_update_ints(dev); + /* Make sure the Data Ready bit of the LSR is set if we still have + bytes left in the FIFO. */ + if (dev->rcvr_fifo_pos != dev->rcvr_fifo_end) { + dev->lsr |= 0x01; + /* There are bytes left in the FIFO, activate the FIFO Timeout timer. */ + timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period); + } + } } } else { - ret = dev->dat; + /* Non-FIFO mode. */ + + ret = (uint8_t) (dev->out_new & 0xffff); + dev->out_new = 0xffff; + + /* Always clear Data Ready interrupt. */ dev->lsr &= 0xfe; dev->int_status &= ~SERIAL_INT_RECEIVE; serial_update_ints(dev); } - serial_log("Read data: %02X\n", ret); + + // serial_log("Read data: %02X\n", ret); break; case 1: if (dev->lcr & 0x80) @@ -760,6 +826,34 @@ serial_close(void *priv) free(dev); } +static void +serial_reset(void *priv) +{ + serial_t *dev = (serial_t *) priv; + + timer_disable(&dev->transmit_timer); + timer_disable(&dev->timeout_timer); + timer_disable(&dev->receive_timer); + + dev->lsr = dev->thr = dev->mctrl = dev->rcr = 0x00; + dev->iir = dev->ier = dev->lcr = dev->msr = 0x00; + dev->dat = dev->int_status = dev->scratch = dev->fcr = 0x00; + dev->fifo_enabled = dev->rcvr_fifo_len = dev->bits = dev->data_bits = 0x00; + dev->baud_cycles = dev->rcvr_fifo_full = dev->txsr = dev->out = 0x00; + + dev->dlab = dev->out_new = dev->new = 0x0000; + + dev->rcvr_fifo_pos = dev->xmit_fifo_pos = dev->rcvr_fifo_end = dev->xmit_fifo_end = 0x00; + + serial_reset_port(dev); + + dev->dlab = 96; + dev->fcr = 0x06; + + serial_transmit_period(dev); + serial_update_speed(dev); +} + static void * serial_init(const device_t *info) { @@ -788,9 +882,11 @@ serial_init(const device_t *info) dev->dlab = 96; dev->fcr = 0x06; dev->clock_src = 1843200.0; - serial_transmit_period(dev); timer_add(&dev->transmit_timer, serial_transmit_timer, dev, 0); timer_add(&dev->timeout_timer, serial_timeout_timer, dev, 0); + timer_add(&dev->receive_timer, serial_receive_timer, dev, 0); + serial_transmit_period(dev); + serial_update_speed(dev); } next_inst++; @@ -818,7 +914,7 @@ const device_t ns8250_device = { .local = SERIAL_8250, .init = serial_init, .close = serial_close, - .reset = NULL, + .reset = serial_reset, { .available = NULL }, .speed_changed = serial_speed_changed, .force_redraw = NULL, @@ -832,7 +928,7 @@ const device_t ns8250_pcjr_device = { .local = SERIAL_8250_PCJR, .init = serial_init, .close = serial_close, - .reset = NULL, + .reset = serial_reset, { .available = NULL }, .speed_changed = serial_speed_changed, .force_redraw = NULL, @@ -846,7 +942,7 @@ const device_t ns16450_device = { .local = SERIAL_16450, .init = serial_init, .close = serial_close, - .reset = NULL, + .reset = serial_reset, { .available = NULL }, .speed_changed = serial_speed_changed, .force_redraw = NULL, @@ -860,7 +956,7 @@ const device_t ns16550_device = { .local = SERIAL_16550, .init = serial_init, .close = serial_close, - .reset = NULL, + .reset = serial_reset, { .available = NULL }, .speed_changed = serial_speed_changed, .force_redraw = NULL, @@ -874,7 +970,7 @@ const device_t ns16650_device = { .local = SERIAL_16650, .init = serial_init, .close = serial_close, - .reset = NULL, + .reset = serial_reset, { .available = NULL }, .speed_changed = serial_speed_changed, .force_redraw = NULL, @@ -888,7 +984,7 @@ const device_t ns16750_device = { .local = SERIAL_16750, .init = serial_init, .close = serial_close, - .reset = NULL, + .reset = serial_reset, { .available = NULL }, .speed_changed = serial_speed_changed, .force_redraw = NULL, @@ -902,7 +998,7 @@ const device_t ns16850_device = { .local = SERIAL_16850, .init = serial_init, .close = serial_close, - .reset = NULL, + .reset = serial_reset, { .available = NULL }, .speed_changed = serial_speed_changed, .force_redraw = NULL, @@ -916,7 +1012,7 @@ const device_t ns16950_device = { .local = SERIAL_16950, .init = serial_init, .close = serial_close, - .reset = NULL, + .reset = serial_reset, { .available = NULL }, .speed_changed = serial_speed_changed, .force_redraw = NULL, diff --git a/src/include/86box/serial.h b/src/include/86box/serial.h index 62b4c9a5f..f1f80972a 100644 --- a/src/include/86box/serial.h +++ b/src/include/86box/serial.h @@ -53,15 +53,16 @@ typedef struct serial_s { dat, int_status, scratch, fcr, irq, type, inst, transmit_enabled, fifo_enabled, rcvr_fifo_len, bits, data_bits, - baud_cycles, rcvr_fifo_full, txsr, pad, msr_set; + baud_cycles, rcvr_fifo_full, txsr, out, msr_set, pad, pad0, pad1; - uint16_t dlab, base_address; + uint16_t dlab, base_address, out_new, new; uint8_t rcvr_fifo_pos, xmit_fifo_pos, - pad0, pad1, + rcvr_fifo_end, xmit_fifo_end, rcvr_fifo[SERIAL_FIFO_SIZE], xmit_fifo[SERIAL_FIFO_SIZE]; - pc_timer_t transmit_timer, timeout_timer; + pc_timer_t transmit_timer, timeout_timer, + receive_timer; double clock_src, transmit_period; struct serial_device_s *sd; From f4d985b3da61b2ab8d111bf3e9ddfb37ea3c67a4 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Wed, 15 Feb 2023 21:37:20 +0600 Subject: [PATCH 3/9] serial: Fix compilation with Qt --- src/device/serial.c | 6 ++---- src/include/86box/serial.h | 2 +- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/src/device/serial.c b/src/device/serial.c index 2d656b40f..97107efad 100644 --- a/src/device/serial.c +++ b/src/device/serial.c @@ -81,7 +81,6 @@ serial_reset_port(serial_t *dev) dev->xmit_fifo_end = dev->rcvr_fifo_end = 0; dev->rcvr_fifo_full = 0; dev->baud_cycles = 0; - dev->new = 0; dev->out_new = 0xffff; memset(dev->xmit_fifo, 0, 16); memset(dev->rcvr_fifo, 0, 16); @@ -203,7 +202,7 @@ serial_receive_timer(void *priv) serial_log("FIFO: %i, out_new = %04X, old_out_new = %04X, was_enabled = %i, condition = %i\n", ((dev->type >= SERIAL_16550) && dev->fifo_enabled), dev->out_new, old_out_new, was_enabled, - ((dev->type >= SERIAL_16550) && dev->fifo_enabled) ? (dev->rcvr_fifo_pos != dev->rcvr_fifo_end) : dev->new); + ((dev->type >= SERIAL_16550) && dev->fifo_enabled) ? (dev->rcvr_fifo_pos != dev->rcvr_fifo_end) : 0); #endif } @@ -558,7 +557,6 @@ serial_write(uint16_t addr, uint8_t val, void *p) break; } dev->out_new = 0xffff; - dev->new = 0; serial_log("FIFO now %sabled, receive FIFO length = %i\n", dev->fifo_enabled ? "en" : "dis", dev->rcvr_fifo_len); } break; @@ -841,7 +839,7 @@ serial_reset(void *priv) dev->fifo_enabled = dev->rcvr_fifo_len = dev->bits = dev->data_bits = 0x00; dev->baud_cycles = dev->rcvr_fifo_full = dev->txsr = dev->out = 0x00; - dev->dlab = dev->out_new = dev->new = 0x0000; + dev->dlab = dev->out_new = 0x0000; dev->rcvr_fifo_pos = dev->xmit_fifo_pos = dev->rcvr_fifo_end = dev->xmit_fifo_end = 0x00; diff --git a/src/include/86box/serial.h b/src/include/86box/serial.h index f1f80972a..63164bd57 100644 --- a/src/include/86box/serial.h +++ b/src/include/86box/serial.h @@ -55,7 +55,7 @@ typedef struct serial_s { fifo_enabled, rcvr_fifo_len, bits, data_bits, baud_cycles, rcvr_fifo_full, txsr, out, msr_set, pad, pad0, pad1; - uint16_t dlab, base_address, out_new, new; + uint16_t dlab, base_address, out_new; uint8_t rcvr_fifo_pos, xmit_fifo_pos, rcvr_fifo_end, xmit_fifo_end, From 566d0c8f449189d260f3eaf40113b1382bb8461e Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 15 Feb 2023 16:42:06 +0100 Subject: [PATCH 4/9] Padding in serial.h. --- src/include/86box/serial.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/include/86box/serial.h b/src/include/86box/serial.h index 63164bd57..8ed3606a7 100644 --- a/src/include/86box/serial.h +++ b/src/include/86box/serial.h @@ -53,9 +53,10 @@ typedef struct serial_s { dat, int_status, scratch, fcr, irq, type, inst, transmit_enabled, fifo_enabled, rcvr_fifo_len, bits, data_bits, - baud_cycles, rcvr_fifo_full, txsr, out, msr_set, pad, pad0, pad1; + baud_cycles, rcvr_fifo_full, txsr, out, + msr_set, pad, pad0, pad1; - uint16_t dlab, base_address, out_new; + uint16_t dlab, base_address, out_new, pad2; uint8_t rcvr_fifo_pos, xmit_fifo_pos, rcvr_fifo_end, xmit_fifo_end, From ed6f7a6f8e3529b956992056d4d36f01682b0258 Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Wed, 15 Feb 2023 23:09:41 +0600 Subject: [PATCH 5/9] qt: Fix serial ports enumeration on Windows --- src/qt/qt_deviceconfig.cpp | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/src/qt/qt_deviceconfig.cpp b/src/qt/qt_deviceconfig.cpp index bf7d4bbb0..77624b824 100644 --- a/src/qt/qt_deviceconfig.cpp +++ b/src/qt/qt_deviceconfig.cpp @@ -46,6 +46,9 @@ extern "C" { # include # include #endif +#ifdef Q_OS_WINDOWS +#include +#endif DeviceConfig::DeviceConfig(QWidget *parent) : QDialog(parent) @@ -77,9 +80,15 @@ EnumerateSerialDevices() } #endif #ifdef Q_OS_WINDOWS - QSettings comPorts("HKEY_LOCAL_MACHINE\\HARDWARE\\DEVICEMAP\\SERIALCOMM", QSettings::NativeFormat, nullptr); - for (int i = 0; i < comPorts.childKeys().length(); i++) { - serialDevices.push_back(QString("\\\\.\\") + comPorts.value(comPorts.childKeys()[i]).toString()); + for (int i = 1; i < 256; i++) { + devstr[0] = 0; + snprintf(devstr.data(), 1024, "\\\\.\\COM%d", i); + auto handle = CreateFileA(devstr.data(), GENERIC_READ | GENERIC_WRITE, 0, nullptr, OPEN_EXISTING, 0, 0); + auto dwError = GetLastError(); + if (handle != INVALID_HANDLE_VALUE || (handle == INVALID_HANDLE_VALUE && ((dwError == ERROR_ACCESS_DENIED) || (dwError == ERROR_GEN_FAILURE) || (dwError == ERROR_SHARING_VIOLATION) || (dwError == ERROR_SEM_TIMEOUT)))) { + if (handle != INVALID_HANDLE_VALUE) CloseHandle(handle); + serialDevices.push_back(QString(devstr)); + } } #endif #ifdef Q_OS_MACOS From e6156022cfcabbe82d6b12c1c735633edcd249fa Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Wed, 15 Feb 2023 23:10:27 +0600 Subject: [PATCH 6/9] win_serial_passthrough: Don't error on 0-byte writes --- src/win/win_serial_passthrough.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/win/win_serial_passthrough.c b/src/win/win_serial_passthrough.c index bf7ce7f98..7fa9c3032 100644 --- a/src/win/win_serial_passthrough.c +++ b/src/win/win_serial_passthrough.c @@ -73,9 +73,6 @@ plat_serpt_write_vcon(serial_passthrough_t *dev, uint8_t data) // fwrite(dev->master_fd, &data, 1); DWORD bytesWritten = 0; WriteFile((HANDLE) dev->master_fd, &data, 1, &bytesWritten, NULL); - if (bytesWritten == 0) { - fatal("serial_passthrough: WriteFile pipe write-buffer full!"); - } } void From d5291233f740348c2451babed49e6afe09156676 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 15 Feb 2023 21:16:51 +0100 Subject: [PATCH 7/9] Reintroduced IDE bit 7 pulldown, this time properly. --- src/disk/hdc_ide.c | 65 ++++++++++++++++++++++++++++++++-------------- 1 file changed, 46 insertions(+), 19 deletions(-) diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index c2595e3e4..bd91647f8 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -738,7 +738,8 @@ ide_set_signature(ide_t *ide) ide->cylinder = ide->sc->request_length; } else { ide->secount = 1; - ide->cylinder = ((ide->type == IDE_HDD) ? 0 : 0xFFFF); + // ide->cylinder = ((ide->type == IDE_HDD) ? 0 : 0xFFFF); + ide->cylinder = ((ide->type == IDE_HDD) ? 0 : 0x7F7F); if (ide->type == IDE_HDD) ide->drive = 0; } @@ -1891,11 +1892,7 @@ static uint8_t ide_status(ide_t *ide, ide_t *ide_other, int ch) { if ((ide->type == IDE_NONE) && ((ide_other->type == IDE_NONE) || !(ch & 1))) -#ifdef STATUS_BIT_7_PULLDOWN - return 0x7F; /* Bit 7 pulled down, all other bits pulled up, per the spec. */ -#else - return 0xFF; -#endif + return 0x7f; /* Bit 7 pulled down, all other bits pulled up, per the spec. */ else if ((ide->type == IDE_NONE) && (ch & 1)) return 0x00; /* On real hardware, a slave with a present master always returns a status of 0x00. */ else if (ide->type == IDE_ATAPI) @@ -1909,7 +1906,7 @@ ide_readb(uint16_t addr, void *priv) { ide_board_t *dev = (ide_board_t *) priv; - int ch; + int ch, absent = 0; ide_t *ide; ch = dev->cur_dev; @@ -1921,18 +1918,31 @@ ide_readb(uint16_t addr, void *priv) addr |= 0x90; addr &= 0xFFF7; + if ((ide->type == IDE_NONE) && ((ide_drives[ch ^ 1]->type == IDE_NONE) || !(ch & 1))) + absent = 1; /* Absent and is master or both are absent. */ + else if ((ide->type == IDE_NONE) && (ch & 1)) + absent = 2; /* Absent and is slave and master is present. */ + switch (addr & 0x7) { case 0x0: /* Data */ - tempw = ide_read_data(ide, 2); - temp = tempw & 0xff; + if (absent == 1) + temp = 0x7f; + else if (absent == 2) + temp = 0x00; + else { + tempw = ide_read_data(ide, 2); + temp = tempw & 0xff; + } break; /* For ATAPI: Bits 7-4 = sense key, bit 3 = MCR (media change requested), Bit 2 = ABRT (aborted command), Bit 1 = EOM (end of media), and Bit 0 = ILI (illegal length indication). */ case 0x1: /* Error */ - if (ide->type == IDE_NONE) - temp = 0; + if (absent == 1) + temp = 0x7f; + else if (absent == 2) + temp = 0x01; else if (ide->type == IDE_ATAPI) temp = ide->sc->error; else @@ -1953,20 +1963,30 @@ ide_readb(uint16_t addr, void *priv) 0 1 0 Data from host 1 0 1 Status. */ case 0x2: /* Sector count */ - if (ide->type == IDE_ATAPI) + if (absent == 1) + temp = 0x7f; + else if (absent == 2) + temp = 0x01; + else if (ide->type == IDE_ATAPI) temp = ide->sc->phase; - else if (ide->type != IDE_NONE) + else temp = ide->secount; break; case 0x3: /* Sector */ - if (ide->type != IDE_NONE) + if (absent == 1) + temp = 0x7f; + else if (absent == 2) + temp = 0x01; + else temp = (uint8_t) ide->sector; break; case 0x4: /* Cylinder low */ - if (ide->type == IDE_NONE) - temp = 0xFF; + if (absent == 1) + temp = 0x7f; + else if (absent == 2) + temp = 0x00; else if (ide->type == IDE_ATAPI) temp = ide->sc->request_length & 0xff; else @@ -1974,8 +1994,10 @@ ide_readb(uint16_t addr, void *priv) break; case 0x5: /* Cylinder high */ - if (ide->type == IDE_NONE) - temp = 0xFF; + if (absent == 1) + temp = 0x7f; + else if (absent == 2) + temp = 0x00; else if (ide->type == IDE_ATAPI) temp = ide->sc->request_length >> 8; else @@ -1983,7 +2005,12 @@ ide_readb(uint16_t addr, void *priv) break; case 0x6: /* Drive/Head */ - temp = (uint8_t) (ide->head | ((ch & 1) ? 0x10 : 0) | (ide->lba ? 0x40 : 0) | 0xa0); + if (absent == 1) + temp = 0x7f; + else if (absent == 2) + temp = 0xb0; + else + temp = (uint8_t) (ide->head | ((ch & 1) ? 0x10 : 0) | (ide->lba ? 0x40 : 0) | 0xa0); break; /* For ATAPI: Bit 5 is DMA ready, but without overlapped or interlaved DMA, it is From 3d480a6ffc5ede43accf9ff695094ab45913661c Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 16 Feb 2023 00:15:04 +0100 Subject: [PATCH 8/9] A small fix to the serial receiver FIFO - fixes error 1101 on IBM PS/2 Models 70 and 80. --- src/device/serial.c | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) diff --git a/src/device/serial.c b/src/device/serial.c index 97107efad..847e3135b 100644 --- a/src/device/serial.c +++ b/src/device/serial.c @@ -153,9 +153,6 @@ static void serial_receive_timer(void *priv) { serial_t *dev = (serial_t *) priv; -#if 0 - uint16_t old_out_new = dev->out_new; -#endif // serial_log("serial_receive_timer()\n"); @@ -179,8 +176,9 @@ serial_receive_timer(void *priv) dev->rcvr_fifo[dev->rcvr_fifo_end] = (uint8_t) (dev->out_new & 0xff); dev->rcvr_fifo_end = (dev->rcvr_fifo_end + 1) & 0x0f; - serial_log("To FIFO: %02X (%i)\n", (uint8_t) (dev->out_new & 0xff), - abs(dev->rcvr_fifo_end - dev->rcvr_fifo_pos)); + serial_log("To FIFO: %02X (%i, %i, %i)\n", (uint8_t) (dev->out_new & 0xff), + abs(dev->rcvr_fifo_end - dev->rcvr_fifo_pos), + dev->rcvr_fifo_end, dev->rcvr_fifo_pos); dev->out_new = 0xffff; if (abs(dev->rcvr_fifo_end - dev->rcvr_fifo_pos) >= dev->rcvr_fifo_len) { @@ -191,19 +189,15 @@ serial_receive_timer(void *priv) serial_update_ints(dev); } + if (dev->rcvr_fifo_end == dev->rcvr_fifo_pos) + dev->rcvr_fifo_full = 1; + timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period); } } } serial_update_ints(dev); - -#if 0 - serial_log("FIFO: %i, out_new = %04X, old_out_new = %04X, was_enabled = %i, condition = %i\n", - ((dev->type >= SERIAL_16550) && dev->fifo_enabled), dev->out_new, - old_out_new, was_enabled, - ((dev->type >= SERIAL_16550) && dev->fifo_enabled) ? (dev->rcvr_fifo_pos != dev->rcvr_fifo_end) : 0); -#endif } static void @@ -622,7 +616,7 @@ serial_write(uint16_t addr, uint8_t val, void *p) serial_update_ints(dev); break; case 6: - dev->msr = (val & 0xF0) | (dev->msr & 0x0F); + dev->msr = (val & 0xf0) | (dev->msr & 0x0f); if (dev->msr & 0x0f) dev->int_status |= SERIAL_INT_MSR; serial_update_ints(dev); @@ -655,7 +649,7 @@ serial_read(uint16_t addr, void *p) if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) { /* FIFO mode. */ - if (dev->rcvr_fifo_pos != dev->rcvr_fifo_end) { + if (dev->lsr & 0x01) { /* There is data in the FIFO. */ ret = dev->rcvr_fifo[dev->rcvr_fifo_pos]; dev->rcvr_fifo_pos = (dev->rcvr_fifo_pos + 1) & 0x0f; From f6c8080bdc87731704a1c77cbf31784873dd295e Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 16 Feb 2023 02:43:06 +0100 Subject: [PATCH 9/9] Fixed MSR writability, fixes Error D on the IBM PCjr. --- src/device/serial.c | 28 ++++++++++++++++++++-------- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/src/device/serial.c b/src/device/serial.c index 847e3135b..0900799de 100644 --- a/src/device/serial.c +++ b/src/device/serial.c @@ -203,7 +203,10 @@ serial_receive_timer(void *priv) static void write_fifo(serial_t *dev, uint8_t dat) { - serial_log("write_fifo(%08X, %02X, %i, %i)\n", dev, dat, (dev->type >= SERIAL_16550) && dev->fifo_enabled, dev->rcvr_fifo_pos % dev->rcvr_fifo_len); + serial_log("write_fifo(%08X, %02X, %i, %i)\n", dev, dat, + (dev->type >= SERIAL_16550) && dev->fifo_enabled, + ((dev->type >= SERIAL_16550) && dev->fifo_enabled) ? + (dev->rcvr_fifo_pos % dev->rcvr_fifo_len) : 0); if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) { /* FIFO mode. */ @@ -405,7 +408,7 @@ serial_set_dsr(serial_t *dev, uint8_t enabled) return; dev->msr &= ~0x2; - dev->msr |= !!((dev->msr & 0x20) ^ (enabled << 5)) << 1; + dev->msr |= ((dev->msr & 0x20) ^ ((!!enabled) << 5)) >> 4; dev->msr &= ~0x20; dev->msr |= (!!enabled) << 5; dev->msr_set &= ~0x20; @@ -424,7 +427,7 @@ serial_set_cts(serial_t *dev, uint8_t enabled) return; dev->msr &= ~0x1; - dev->msr |= !!((dev->msr & 0x10) ^ (enabled << 4)); + dev->msr |= ((dev->msr & 0x10) ^ ((!!enabled) << 4)) >> 4; dev->msr &= ~0x10; dev->msr |= (!!enabled) << 4; dev->msr_set &= ~0x10; @@ -443,7 +446,7 @@ serial_set_dcd(serial_t *dev, uint8_t enabled) return; dev->msr &= ~0x8; - dev->msr |= !!((dev->msr & 0x80) ^ (enabled << 7)); + dev->msr |= ((dev->msr & 0x80) ^ ((!!enabled) << 7)) >> 4; dev->msr &= ~0x80; dev->msr |= (!!enabled) << 7; dev->msr_set &= ~0x80; @@ -470,7 +473,8 @@ serial_write(uint16_t addr, uint8_t val, void *p) serial_t *dev = (serial_t *) p; uint8_t new_msr, old; - serial_log("UART: Write %02X to port %02X\n", val, addr); + // serial_log("UART: Write %02X to port %02X\n", val, addr); + serial_log("UART: [%04X:%08X] Write %02X to port %02X\n", CS, cpu_state.pc, val, addr); cycles -= ISA_CYCLES(8); @@ -616,7 +620,11 @@ serial_write(uint16_t addr, uint8_t val, void *p) serial_update_ints(dev); break; case 6: - dev->msr = (val & 0xf0) | (dev->msr & 0x0f); + // dev->msr = (val & 0xf0) | (dev->msr & 0x0f); + // dev->msr = val; + /* The actual condition bits of the MSR are read-only, but the delta bits are + undocumentedly writable, and the PCjr BIOS uses them to raise MSR interrupts. */ + dev->msr = (dev->msr & 0xf0) | (val & 0x0f); if (dev->msr & 0x0f) dev->int_status |= SERIAL_INT_MSR; serial_update_ints(dev); @@ -723,7 +731,8 @@ serial_read(uint16_t addr, void *p) break; } - serial_log("UART: Read %02X from port %02X\n", ret, addr); + // serial_log("UART: Read %02X from port %02X\n", ret, addr); + serial_log("UART: [%04X:%08X] Read %02X from port %02X\n", CS, cpu_state.pc, ret, addr); return ret; } @@ -873,7 +882,10 @@ serial_init(const device_t *info) /* Default to 1200,N,7. */ dev->dlab = 96; dev->fcr = 0x06; - dev->clock_src = 1843200.0; + if (info->local == SERIAL_8250_PCJR) + dev->clock_src = 1789500.0; + else + dev->clock_src = 1843200.0; timer_add(&dev->transmit_timer, serial_transmit_timer, dev, 0); timer_add(&dev->timeout_timer, serial_timeout_timer, dev, 0); timer_add(&dev->receive_timer, serial_receive_timer, dev, 0);