SM(S)C FDC37M60x Super I/O chip rewrite.
This commit is contained in:
@@ -31,24 +31,27 @@
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#include <86box/fdc.h>
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#include <86box/fdc.h>
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#include <86box/sio.h>
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#include <86box/sio.h>
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#define SIO_INDEX_PORT dev->sio_index_port
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#define SIO_INDEX_PORT dev->sio_index_port
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#define INDEX dev->index
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#define INDEX dev->index
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/* Current Logical Device Number */
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/* Current Logical Device Number */
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#define CURRENT_LOGICAL_DEVICE dev->regs[0x07]
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#define CURRENT_LOGICAL_DEVICE dev->regs[0x07]
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/* Global Device Configuration */
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/* Global Device Configuration */
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#define ENABLED dev->device_regs[CURRENT_LOGICAL_DEVICE][0x30]
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#define ENABLED(ld) dev->device_regs[ld][0x30]
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#define BASE_ADDRESS ((dev->device_regs[CURRENT_LOGICAL_DEVICE][0x60] << 8) | (dev->device_regs[CURRENT_LOGICAL_DEVICE][0x61]))
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#define BASE_ADDRESS(ld) ((dev->device_regs[ld][0x60] << 8) | \
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#define IRQ dev->device_regs[CURRENT_LOGICAL_DEVICE][0x70]
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(dev->device_regs[ld][0x61]))
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#define DMA dev->device_regs[CURRENT_LOGICAL_DEVICE][0x74]
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#define IRQ(ld) dev->device_regs[ld][0x70]
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#define DMA(ld) dev->device_regs[ld][0x74]
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/* Miscellaneous Chip Functionality */
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/* Miscellaneous Chip Functionality */
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#define SOFT_RESET (val & 0x01)
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#define SOFT_RESET (val & 0x01)
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#define POWER_CONTROL dev->regs[0x22]
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#define POWER_CONTROL dev->regs[0x22]
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#ifdef ENABLE_FDC37M60X_LOG
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#ifdef ENABLE_FDC37M60X_LOG
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int fdc37m60x_do_log = ENABLE_FDC37M60X_LOG;
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int fdc37m60x_do_log = ENABLE_FDC37M60X_LOG;
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static void
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static void
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fdc37m60x_log(const char *fmt, ...)
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fdc37m60x_log(const char *fmt, ...)
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{
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{
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@@ -65,196 +68,217 @@ fdc37m60x_log(const char *fmt, ...)
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#define fdc37m60x_log(fmt, ...)
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#define fdc37m60x_log(fmt, ...)
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#endif
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#endif
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typedef struct
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typedef struct
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{
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{
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uint8_t index, regs[256], device_regs[10][256], cfg_lock, ide_function;
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uint8_t index, regs[256], device_regs[10][256], cfg_lock, ide_function;
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uint16_t sio_index_port;
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uint16_t sio_index_port;
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fdc_t *fdc_controller;
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fdc_t * fdc;
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serial_t *uart[2];
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serial_t * uart[2];
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} fdc37m60x_t;
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} fdc37m60x_t;
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void fdc37m60x_fdc_handler(fdc37m60x_t *dev);
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void fdc37m60x_uart_handler(uint8_t num, fdc37m60x_t *dev);
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static void fdc37m60x_fdc_handler(fdc37m60x_t *dev);
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void fdc37m60x_lpt_handler(fdc37m60x_t *dev);
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static void fdc37m60x_uart_handler(uint8_t num, fdc37m60x_t *dev);
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void fdc37m60x_logical_device_handler(fdc37m60x_t *dev);
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static void fdc37m60x_lpt_handler(fdc37m60x_t *dev);
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static void fdc37m60x_reset(void *priv);
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static void fdc37m60x_logical_device_handler(fdc37m60x_t *dev);
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static void fdc37m60x_reset(void *priv);
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static void
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static void
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fdc37m60x_write(uint16_t addr, uint8_t val, void *priv)
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fdc37m60x_write(uint16_t addr, uint8_t val, void *priv)
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{
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{
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fdc37m60x_t *dev = (fdc37m60x_t *)priv;
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fdc37m60x_t *dev = (fdc37m60x_t *)priv;
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switch (addr)
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if (addr & 1) {
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{
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if (!dev->cfg_lock) {
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case 0x3f0:
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switch (INDEX) {
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case 0x370:
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/* Global Configuration */
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INDEX = val;
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case 0x02:
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dev->regs[INDEX] = val;
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if (SOFT_RESET)
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fdc37m60x_reset(dev);
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break;
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/* Enter/Escape Configuration Mode */
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case 0x07:
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if (val == 0x55)
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CURRENT_LOGICAL_DEVICE = val;
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dev->cfg_lock = 0;
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break;
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else if (val == 0xaa)
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dev->cfg_lock = 1;
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break;
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case 0x3f1:
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case 0x22:
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case 0x371:
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POWER_CONTROL = val & 0x3f;
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if (!dev->cfg_lock)
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break;
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{
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switch (INDEX)
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{
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/* Global Configuration */
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case 0x02:
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dev->regs[INDEX] = val;
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if (SOFT_RESET)
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fdc37m60x_reset(dev);
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break;
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case 0x07:
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case 0x23:
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CURRENT_LOGICAL_DEVICE = (val & 0x0f);
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dev->regs[INDEX] = val & 0x3f;
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break;
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break;
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case 0x22:
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case 0x24:
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POWER_CONTROL = val & 0x3f;
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dev->regs[INDEX] = val & 0x4e;
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break;
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break;
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case 0x23:
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case 0x2b: case 0x2c: case 0x2d: case 0x2e:
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dev->regs[INDEX] = val & 0x3f;
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case 0x2f:
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break;
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dev->regs[INDEX] = val;
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break;
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case 0x24:
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/* Device Configuration */
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dev->regs[INDEX] = val & 0xce;
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case 0x30:
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break;
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case 0x60: case 0x61:
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case 0x70:
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/* Device Configuration */
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case 0x74:
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case 0x30:
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case 0xf0: case 0xf1: case 0xf2: case 0xf3:
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case 0x60:
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case 0xf4: case 0xf5: case 0xf6: case 0xf7:
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case 0x61:
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if (CURRENT_LOGICAL_DEVICE <= 0x81) /* Avoid Overflow */
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case 0x70:
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dev->device_regs[CURRENT_LOGICAL_DEVICE][INDEX] = (INDEX == 0x30) ? (val & 1) : val;
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case 0x74:
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fdc37m60x_logical_device_handler(dev);
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if(CURRENT_LOGICAL_DEVICE <= 0x81) /* Avoid Overflow */
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break;
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dev->device_regs[CURRENT_LOGICAL_DEVICE][INDEX] = (INDEX == 0x30) ? (val & 1) : val;
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}
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fdc37m60x_logical_device_handler(dev);
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break;
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}
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}
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}
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break;
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} else {
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/* Enter/Escape Configuration Mode */
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if (val == 0x55)
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dev->cfg_lock = 0;
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else if (!dev->cfg_lock && (val == 0xaa))
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dev->cfg_lock = 1;
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else if (!dev->cfg_lock)
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INDEX = val;
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}
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}
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}
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}
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static uint8_t
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static uint8_t
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fdc37m60x_read(uint16_t addr, void *priv)
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fdc37m60x_read(uint16_t addr, void *priv)
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{
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{
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fdc37m60x_t *dev = (fdc37m60x_t *)priv;
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fdc37m60x_t *dev = (fdc37m60x_t *)priv;
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uint8_t ret = 0xff;
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return (INDEX >= 0x30) ? dev->device_regs[CURRENT_LOGICAL_DEVICE][INDEX] : dev->regs[INDEX];
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if (addr & 1)
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ret = (INDEX >= 0x30) ? dev->device_regs[CURRENT_LOGICAL_DEVICE][INDEX] : dev->regs[INDEX];
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return ret;
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}
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}
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void fdc37m60x_fdc_handler(fdc37m60x_t *dev)
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static void
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fdc37m60x_fdc_handler(fdc37m60x_t *dev)
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{
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{
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fdc_remove(dev->fdc_controller);
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fdc_remove(dev->fdc);
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if(ENABLED || (POWER_CONTROL & 0x01))
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if (ENABLED(0) || (POWER_CONTROL & 0x01))
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{
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{
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fdc_set_base(dev->fdc_controller, BASE_ADDRESS);
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fdc_set_base(dev->fdc, BASE_ADDRESS(0));
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fdc_set_irq(dev->fdc_controller, IRQ & 0xf);
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fdc_set_irq(dev->fdc, IRQ(0) & 0xf);
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fdc_set_dma_ch(dev->fdc_controller, DMA & 0x07);
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fdc_set_dma_ch(dev->fdc, DMA(0) & 0x07);
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fdc37m60x_log("SMC60x-FDC: BASE %04x IRQ %d DMA %d\n", BASE_ADDRESS, IRQ & 0xf, DMA & 0x07);
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fdc37m60x_log("SMC60x-FDC: BASE %04x IRQ %d DMA %d\n", BASE_ADDRESS(0), IRQ(0) & 0xf, DMA(0) & 0x07);
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}
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}
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fdc_update_enh_mode(dev->fdc, dev->device_regs[0][0xf0] & 0x01);
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fdc_update_densel_force(dev->fdc, (dev->device_regs[0][0xf1] & 0xc) >> 2);
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fdc_update_rwc(dev->fdc, 3, (dev->device_regs[0][0xf2] & 0xc0) >> 6);
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fdc_update_rwc(dev->fdc, 2, (dev->device_regs[0][0xf2] & 0x30) >> 4);
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fdc_update_rwc(dev->fdc, 1, (dev->device_regs[0][0xf2] & 0x0c) >> 2);
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fdc_update_rwc(dev->fdc, 0, (dev->device_regs[0][0xf2] & 0x03));
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fdc_update_drvrate(dev->fdc, 0, (dev->device_regs[0][0xf4] & 0x18) >> 3);
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fdc_update_drvrate(dev->fdc, 1, (dev->device_regs[0][0xf5] & 0x18) >> 3);
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fdc_update_drvrate(dev->fdc, 2, (dev->device_regs[0][0xf6] & 0x18) >> 3);
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fdc_update_drvrate(dev->fdc, 3, (dev->device_regs[0][0xf7] & 0x18) >> 3);
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}
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}
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void fdc37m60x_uart_handler(uint8_t num, fdc37m60x_t *dev)
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static void
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fdc37m60x_uart_handler(uint8_t num, fdc37m60x_t *dev)
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{
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{
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serial_remove(dev->uart[num & 1]);
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serial_remove(dev->uart[num & 1]);
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if(!(num & 1) ? (ENABLED || (POWER_CONTROL & 0x10)) : (ENABLED || (POWER_CONTROL & 0x20)))
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if (ENABLED(4 + (num & 1)) || (POWER_CONTROL & (1 << (4 + (num & 1)))))
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{
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{
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serial_setup(dev->uart[num & 1], BASE_ADDRESS, IRQ & 0xf);
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serial_setup(dev->uart[num & 1], BASE_ADDRESS(4 + (num & 1)), IRQ(4 + (num & 1)) & 0xf);
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fdc37m60x_log("SMC60x-UART%d: BASE %04x IRQ %d\n", num & 1, BASE_ADDRESS, IRQ & 0xf);
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fdc37m60x_log("SMC60x-UART%d: BASE %04x IRQ %d\n", num & 1, BASE_ADDRESS(4 + (num & 1)), IRQ(4 + (num & 1)) & 0xf);
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}
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}
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}
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}
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void fdc37m60x_lpt_handler(fdc37m60x_t *dev)
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void fdc37m60x_lpt_handler(fdc37m60x_t *dev)
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{
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{
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lpt1_remove();
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lpt1_remove();
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if(ENABLED || (POWER_CONTROL & 0x80))
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{
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if (ENABLED(3) || (POWER_CONTROL & 0x08)) {
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lpt1_init(BASE_ADDRESS);
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lpt1_init(BASE_ADDRESS(3));
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lpt1_irq(IRQ & 0xf);
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lpt1_irq(IRQ(3) & 0xf);
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fdc37m60x_log("SMC60x-LPT: BASE %04x IRQ %d\n", BASE_ADDRESS, IRQ & 0xf);
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fdc37m60x_log("SMC60x-LPT: BASE %04x IRQ %d\n", BASE_ADDRESS(3), IRQ(3) & 0xf);
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}
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}
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}
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}
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void fdc37m60x_logical_device_handler(fdc37m60x_t *dev)
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void fdc37m60x_logical_device_handler(fdc37m60x_t *dev)
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{
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{
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/*
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/* Register 07h:
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Register 07h:
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Device 0: FDC
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Device 0: FDC
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Device 3: LPT
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Device 3: LPT
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Device 4: UART1
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Device 4: UART1
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Device 5: UART2
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Device 5: UART2
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*/
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*/
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switch (CURRENT_LOGICAL_DEVICE)
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{
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case 0x00:
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fdc37m60x_fdc_handler(dev);
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break;
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case 0x03:
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switch (CURRENT_LOGICAL_DEVICE) {
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fdc37m60x_lpt_handler(dev);
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case 0x00:
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break;
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fdc37m60x_fdc_handler(dev);
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break;
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case 0x04:
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case 0x03:
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fdc37m60x_uart_handler(0, dev);
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fdc37m60x_lpt_handler(dev);
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break;
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break;
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case 0x05:
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case 0x04:
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fdc37m60x_uart_handler(1, dev);
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fdc37m60x_uart_handler(0, dev);
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break;
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break;
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case 0x05:
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fdc37m60x_uart_handler(1, dev);
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break;
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}
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}
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}
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}
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static void
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static void
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fdc37m60x_reset(void *priv)
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fdc37m60x_reset(void *priv)
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{
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{
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fdc37m60x_t *dev = (fdc37m60x_t *)priv;
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fdc37m60x_t *dev = (fdc37m60x_t *) priv;
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uint8_t i;
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CURRENT_LOGICAL_DEVICE = 0x00;
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memset(dev->regs, 0, sizeof(dev->regs));
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dev->regs[0x22] = 0x00;
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for (i = 0; i < 10; i++)
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memset(dev->device_regs[i], 0, sizeof(dev->device_regs[i]));
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dev->regs[0x20] = 0x47;
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dev->regs[0x24] = 0x04;
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dev->regs[0x26] = SIO_INDEX_PORT & 0xf;
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dev->regs[0x26] = SIO_INDEX_PORT & 0xf;
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dev->regs[0x27] = (SIO_INDEX_PORT >> 4) & 0xf;
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dev->regs[0x27] = (SIO_INDEX_PORT >> 4) & 0xf;
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/* FDC Registers */
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/* FDC Registers */
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dev->device_regs[0][0x30] = 0x00;
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dev->device_regs[0][0x60] = 0x03; /* Base Address */
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dev->device_regs[0][0x60] = 0x03; /* Base Address */
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dev->device_regs[0][0x61] = 0xf0;
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dev->device_regs[0][0x61] = 0xf0;
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dev->device_regs[0][0x70] = 0x06;
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dev->device_regs[0][0x70] = 0x06;
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dev->device_regs[0][0x74] = 0x02;
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dev->device_regs[0][0x74] = 0x02;
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dev->device_regs[0][0xf0] = 0x0e;
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dev->device_regs[0][0xf2] = 0xff;
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/* LPT Port */
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/* LPT Port */
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dev->device_regs[3][0x30] = 0x00;
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dev->device_regs[3][0x74] = 0x04;
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dev->device_regs[3][0x60] = 0x00; /* Base Address */
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dev->device_regs[3][0xf0] = 0x3c;
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dev->device_regs[3][0x61] = 0x00;
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dev->device_regs[3][0x64] = 0x04;
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/* UART1 */
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/* UART1 */
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dev->device_regs[4][0x30] = 0x00;
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dev->device_regs[4][0x74] = 0x04;
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dev->device_regs[4][0x60] = 0x00; /* Base Address */
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dev->device_regs[4][0xf1] = 0x02;
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dev->device_regs[4][0x61] = 0x00;
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dev->device_regs[4][0xf2] = 0x03;
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dev->device_regs[4][0x70] = 0x00;
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/* UART2 */
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dev->device_regs[5][0x30] = 0x00;
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dev->device_regs[5][0x60] = 0x00; /* Base Address */
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dev->device_regs[5][0x61] = 0x00;
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dev->device_regs[5][0x70] = 0x00;
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/* AUX */
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/* AUX */
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dev->device_regs[8][0x30] = 0x00;
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dev->device_regs[8][0xc0] = 0x06;
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||||||
|
dev->device_regs[8][0xc1] = 0x03;
|
||||||
|
|
||||||
fdc37m60x_fdc_handler(dev);
|
fdc37m60x_fdc_handler(dev);
|
||||||
fdc37m60x_uart_handler(0, dev);
|
fdc37m60x_uart_handler(0, dev);
|
||||||
@@ -262,6 +286,7 @@ fdc37m60x_reset(void *priv)
|
|||||||
fdc37m60x_lpt_handler(dev);
|
fdc37m60x_lpt_handler(dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void
|
static void
|
||||||
fdc37m60x_close(void *priv)
|
fdc37m60x_close(void *priv)
|
||||||
{
|
{
|
||||||
@@ -270,6 +295,7 @@ fdc37m60x_close(void *priv)
|
|||||||
free(dev);
|
free(dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void *
|
static void *
|
||||||
fdc37m60x_init(const device_t *info)
|
fdc37m60x_init(const device_t *info)
|
||||||
{
|
{
|
||||||
@@ -277,25 +303,18 @@ fdc37m60x_init(const device_t *info)
|
|||||||
memset(dev, 0, sizeof(fdc37m60x_t));
|
memset(dev, 0, sizeof(fdc37m60x_t));
|
||||||
SIO_INDEX_PORT = info->local;
|
SIO_INDEX_PORT = info->local;
|
||||||
|
|
||||||
dev->regs[0x20] = 0x47;
|
dev->fdc = device_add(&fdc_at_smc_device);
|
||||||
dev->regs[0x24] = 0x04;
|
|
||||||
dev->device_regs[0][0xf0] = 0x0e;
|
|
||||||
dev->device_regs[0][0xf2] = 0xff;
|
|
||||||
dev->device_regs[3][0xf0] = 0x3c;
|
|
||||||
dev->device_regs[4][0xf1] = 0x02;
|
|
||||||
dev->device_regs[4][0xf2] = 0x03;
|
|
||||||
dev->device_regs[8][0xc0] = 0x06;
|
|
||||||
dev->device_regs[8][0xc1] = 0x03;
|
|
||||||
|
|
||||||
dev->fdc_controller = device_add(&fdc_at_smc_device);
|
|
||||||
dev->uart[0] = device_add_inst(&ns16550_device, 1);
|
dev->uart[0] = device_add_inst(&ns16550_device, 1);
|
||||||
dev->uart[1] = device_add_inst(&ns16550_device, 2);
|
dev->uart[1] = device_add_inst(&ns16550_device, 2);
|
||||||
|
|
||||||
io_sethandler(SIO_INDEX_PORT, 0x0002, fdc37m60x_read, NULL, NULL, fdc37m60x_write, NULL, NULL, dev);
|
io_sethandler(SIO_INDEX_PORT, 0x0002, fdc37m60x_read, NULL, NULL, fdc37m60x_write, NULL, NULL, dev);
|
||||||
|
|
||||||
|
fdc37m60x_reset(dev);
|
||||||
|
|
||||||
return dev;
|
return dev;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
const device_t fdc37m60x_device = {
|
const device_t fdc37m60x_device = {
|
||||||
"SMSC FDC37M60X",
|
"SMSC FDC37M60X",
|
||||||
0,
|
0,
|
||||||
@@ -303,10 +322,11 @@ const device_t fdc37m60x_device = {
|
|||||||
fdc37m60x_init,
|
fdc37m60x_init,
|
||||||
fdc37m60x_close,
|
fdc37m60x_close,
|
||||||
NULL,
|
NULL,
|
||||||
{NULL},
|
{ NULL },
|
||||||
NULL,
|
NULL,
|
||||||
NULL,
|
NULL,
|
||||||
NULL};
|
NULL
|
||||||
|
};
|
||||||
|
|
||||||
const device_t fdc37m60x_370_device = {
|
const device_t fdc37m60x_370_device = {
|
||||||
"SMSC FDC37M60X with 10K Pull Up Resistor",
|
"SMSC FDC37M60X with 10K Pull Up Resistor",
|
||||||
@@ -315,7 +335,8 @@ const device_t fdc37m60x_370_device = {
|
|||||||
fdc37m60x_init,
|
fdc37m60x_init,
|
||||||
fdc37m60x_close,
|
fdc37m60x_close,
|
||||||
NULL,
|
NULL,
|
||||||
{NULL},
|
{ NULL },
|
||||||
NULL,
|
NULL,
|
||||||
NULL,
|
NULL,
|
||||||
NULL};
|
NULL
|
||||||
|
};
|
||||||
|
Reference in New Issue
Block a user