diff --git a/src/cpu/cpu_table.c b/src/cpu/cpu_table.c
index a3417c920..b94f429e6 100644
--- a/src/cpu/cpu_table.c
+++ b/src/cpu/cpu_table.c
@@ -15,12 +15,14 @@
  *		Miran Grca, <mgrca8@gmail.com>
  *		Fred N. van Kempen, <decwiz@yahoo.com>
  *		RichardG, <richardg867@gmail.com>
+ *		dob205,
  *
  *		Copyright 2008-2019 Sarah Walker.
  *		Copyright 2016-2019 leilei.
  *		Copyright 2016-2019 Miran Grca.
  *		Copyright 2017-2019 Fred N. van Kempen.
  *		Copyright 2020 RichardG.
+ *		Copyright 2021 dob205.
  */
 #include <stdio.h>
 #include <stdint.h>
@@ -758,6 +760,9 @@ const cpu_family_t cpu_families[] = {
 	.name = "K6 (Model 6)",
 	.internal_name = "k6_m6",
 	.cpus = (const CPU[]) {
+		{"66",         CPU_K6,    fpus_internal,   66666666, 1.0, 2900, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6, 6, 3, 3, 8},     /* out of spec */
+		{"100",        CPU_K6,    fpus_internal,  100000000, 1.5, 2900, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9, 9, 4, 4, 12},   /* out of spec */
+		{"133",        CPU_K6,    fpus_internal,  133333333, 2.0, 2900, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12, 6, 6, 16}, /* out of spec */
 		{"166",        CPU_K6,    fpus_internal,  166666666, 2.5, 2900, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15, 7, 7, 20},
 		{"200",        CPU_K6,    fpus_internal,  200000000, 3.0, 2900, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18, 9, 9, 24},
 		{"233",        CPU_K6,    fpus_internal,  233333333, 3.5, 3200, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10, 28},
@@ -1511,6 +1516,9 @@ static const cpu_legacy_table_t cpus_K5[] = {
 };
 
 static const cpu_legacy_table_t cpus_K56[] = {
+    {"k6_m6", 66666666, 1.0},
+    {"k6_m6", 100000000, 1.5},
+    {"k6_m6", 133333333, 2.0},
     {"k6_m6", 166666666, 2.5},
     {"k6_m6", 200000000, 3.0},
     {"k6_m6", 233333333, 3.5},
diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c
index 38f8ebfba..64eb4ae80 100644
--- a/src/video/vid_s3.c
+++ b/src/video/vid_s3.c
@@ -508,6 +508,8 @@ s3_accel_out_pixtrans_w(s3_t *s3, uint16_t val)
 			case 0x400:
 				if (svga->crtc[0x53] & 0x08) {
 					if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) {
+						if ((s3->accel.cmd & 0x1000) && (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)))
+							val = (val >> 8) | (val << 8);
 						s3_accel_start(32, 1, val | (val << 16), 0, s3);
 					} else
 						s3_accel_start(4, 1, 0xffffffff, val | (val << 16), s3);
@@ -1349,16 +1351,16 @@ s3_accel_write_fifo(s3_t *s3, uint32_t addr, uint8_t val)
 		s3_accel_out_fifo(s3, addr & 0xffff, val);
 	} else {
 		if (s3->accel.cmd & 0x100) {
-			if (!(s3->accel.cmd & 0x600)) {
-				if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) {
-					s3_accel_start(8, 1, val, 0, s3);
-				} else
-					s3_accel_start(1, 1, 0xffffffff, val, s3);
-			} else if ((s3->accel.cmd & 0x600) == 0x200) {
+			if ((s3->accel.cmd & 0x600) == 0x200) {
 				if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) {
 					s3_accel_start(16, 1, val, 0, s3);
 				} else
 					s3_accel_start(2, 1, 0xffffffff, val, s3);
+			} else {
+				if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) {
+					s3_accel_start(8, 1, val, 0, s3);
+				} else
+					s3_accel_start(1, 1, 0xffffffff, val, s3);
 			}
 		}
 	}    
@@ -2718,12 +2720,8 @@ static void s3_recalctimings(svga_t *svga)
 	svga->lowres = !((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10));
 	
 	if (((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)) || (svga->crtc[0x3a] & 0x10)) {
-		if (svga->crtc[0x31] & 0x08) {
-			if (!(svga->crtc[0x17] & 0x40) && (svga->crtc[0x14] & 0x40)) /*Disable dword mode addressing when CRTC14 bit 6 is not enabled, regardless of the S3 dword mode bit.*/
-				svga->force_dword_mode = 1;
-		} else
-			svga->force_dword_mode = 0;
-
+		if (((svga->crtc[0x17] & 0x60) == 0x20) && (svga->crtc[0x31] & 0x08))
+				svga->crtc[0x17] |= 0x40;
 		switch (svga->bpp) {
 			case 8:
 			svga->render = svga_render_8bpp_highres;
@@ -2882,12 +2880,8 @@ static void s3_trio64v_recalctimings(svga_t *svga)
 		
 		svga->lowres = !((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10));
 		if ((svga->gdcreg[5] & 0x40) && (svga->crtc[0x3a] & 0x10)) {
-			if (svga->crtc[0x31] & 0x08) {
-				if (!(svga->crtc[0x17] & 0x40) && (svga->crtc[0x14] & 0x40)) /*Disable dword mode addressing when CRTC14 bit 6 is not enabled, regardless of the S3 dword mode bit.*/
-					svga->force_dword_mode = 1;
-			} else
-				svga->force_dword_mode = 0;
-
+			if (((svga->crtc[0x17] & 0x60) == 0x20) && (svga->crtc[0x31] & 0x08))
+				svga->crtc[0x17] |= 0x40;
 			switch (svga->bpp) {
 				case 8:
 				svga->render = svga_render_8bpp_highres;
@@ -4789,7 +4783,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
 			}
 		}
 	}
-
+	
 	if (cpu_input && (((s3->accel.multifunc[0xa] & 0xc0) != 0x80) || (!(s3->accel.cmd & 2)))) {
 		if ((s3->bpp == 3) && count == 2) {
 			if (s3->accel.dat_count) {