From 8997159ddeb2ccac6e621289b29553b55b644648 Mon Sep 17 00:00:00 2001 From: OBattler Date: Fri, 15 May 2020 07:25:20 +0200 Subject: [PATCH] Update the TSC (and run the timers) on ACPI timer read and RDTSC instruction. --- src/acpi.c | 2 ++ src/cpu_common/x86_ops_msr.h | 1 + 2 files changed, 3 insertions(+) diff --git a/src/acpi.c b/src/acpi.c index d8555cb95..a74e14af2 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -125,6 +125,7 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p) case 0x08: case 0x09: case 0x0a: case 0x0b: /* PMTMR - Power Management Timer Register (IO) */ ret = (dev->regs.timer_val >> shift32) & 0xff; + update_tsc(); break; case 0x0c: case 0x0d: /* GPSTS - General Purpose Status Register (IO) */ @@ -211,6 +212,7 @@ acpi_reg_read_via(int size, uint16_t addr, void *p) case 0x08: case 0x09: case 0x0a: case 0x0b: /* PMTMR - Power Management Timer Register (IO) */ ret = (dev->regs.timer_val >> shift32) & 0xff; + update_tsc(); break; case 0x10: case 0x11: case 0x12: case 0x13: /* PCNTRL - Processor Control Register (IO) */ diff --git a/src/cpu_common/x86_ops_msr.h b/src/cpu_common/x86_ops_msr.h index 2a8bdcf4c..e5118a692 100644 --- a/src/cpu_common/x86_ops_msr.h +++ b/src/cpu_common/x86_ops_msr.h @@ -14,6 +14,7 @@ static int opRDTSC(uint32_t fetchdat) EAX = tsc & 0xffffffff; EDX = tsc >> 32; CLOCK_CYCLES(1); + update_tsc(); return 0; }