80486DX2-66/86Box-fork
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Update the TSC (and run the timers) on ACPI timer read and RDTSC instruction.

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OBattler
2020-05-15 07:25:20 +02:00
parent 3d278b344f
commit 8997159dde
2 changed files with 3 additions and 0 deletions
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2
src/acpi.c
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@@ -125,6 +125,7 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p)
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x08: case 0x09: case 0x0a: case 0x0b:
/* PMTMR - Power Management Timer Register (IO) */ /* PMTMR - Power Management Timer Register (IO) */
ret = (dev->regs.timer_val >> shift32) & 0xff; ret = (dev->regs.timer_val >> shift32) & 0xff;
update_tsc();
break; break;
case 0x0c: case 0x0d: case 0x0c: case 0x0d:
/* GPSTS - General Purpose Status Register (IO) */ /* GPSTS - General Purpose Status Register (IO) */
@@ -211,6 +212,7 @@ acpi_reg_read_via(int size, uint16_t addr, void *p)
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x08: case 0x09: case 0x0a: case 0x0b:
/* PMTMR - Power Management Timer Register (IO) */ /* PMTMR - Power Management Timer Register (IO) */
ret = (dev->regs.timer_val >> shift32) & 0xff; ret = (dev->regs.timer_val >> shift32) & 0xff;
update_tsc();
break; break;
case 0x10: case 0x11: case 0x12: case 0x13: case 0x10: case 0x11: case 0x12: case 0x13:
/* PCNTRL - Processor Control Register (IO) */ /* PCNTRL - Processor Control Register (IO) */

1
src/cpu_common/x86_ops_msr.h
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@@ -14,6 +14,7 @@ static int opRDTSC(uint32_t fetchdat)
EAX = tsc & 0xffffffff; EAX = tsc & 0xffffffff;
EDX = tsc >> 32; EDX = tsc >> 32;
CLOCK_CYCLES(1); CLOCK_CYCLES(1);
update_tsc();
return 0; return 0;
} }