diff --git a/src/cpu/x86_ops_mmx.h b/src/cpu/x86_ops_mmx.h
index 9942f653f..77df5d990 100644
--- a/src/cpu/x86_ops_mmx.h
+++ b/src/cpu/x86_ops_mmx.h
@@ -3,12 +3,16 @@
 #define USATB(val) (((val) < 0) ? 0 : (((val) > 255) ? 255 : (val)))
 #define USATW(val) (((val) < 0) ? 0 : (((val) > 65535) ? 65535 : (val)))
 
+#define MMX_GETREGP(r) fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[r].fraction) : &(cpu_state.MM[r])
+#define MMX_GETREG(r) fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[r].fraction) : cpu_state.MM[r]
+
+#define MMX_SETEXP()   \
+    if (fpu_softfloat) \
+        fpu_state.st_space[cpu_reg].exp = 0xffff
+
 #define MMX_GETSRC()                               \
     if (cpu_mod == 3) {                            \
-        if (fpu_softfloat) \
-            src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction; \
-        else \
-            src = cpu_state.MM[cpu_rm];                \
+        src = MMX_GETREG(cpu_rm);                  \
         CLOCK_CYCLES(1);                           \
     } else {                                       \
         SEG_CHECK_READ(cpu_state.ea_seg);          \
diff --git a/src/cpu/x86_ops_mmx_arith.h b/src/cpu/x86_ops_mmx_arith.h
index 3ebe960f9..66ff79cd2 100644
--- a/src/cpu/x86_ops_mmx_arith.h
+++ b/src/cpu/x86_ops_mmx_arith.h
@@ -7,7 +7,7 @@ opPADDB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
@@ -20,8 +20,7 @@ opPADDB_a16(uint32_t fetchdat)
     dst->b[6] += src.b[6];
     dst->b[7] += src.b[7];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -34,7 +33,7 @@ opPADDB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
@@ -47,8 +46,7 @@ opPADDB_a32(uint32_t fetchdat)
     dst->b[6] += src.b[6];
     dst->b[7] += src.b[7];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -62,7 +60,7 @@ opPADDW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
@@ -71,8 +69,7 @@ opPADDW_a16(uint32_t fetchdat)
     dst->w[2] += src.w[2];
     dst->w[3] += src.w[3];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -85,7 +82,7 @@ opPADDW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
@@ -94,8 +91,8 @@ opPADDW_a32(uint32_t fetchdat)
     dst->w[2] += src.w[2];
     dst->w[3] += src.w[3];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
+
     return 0;
 }
 
@@ -108,15 +105,14 @@ opPADDD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
     dst->l[0] += src.l[0];
     dst->l[1] += src.l[1];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -129,15 +125,14 @@ opPADDD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
     dst->l[0] += src.l[0];
     dst->l[1] += src.l[1];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -151,15 +146,10 @@ opPADDSB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sb[0] = SSATB(dst->sb[0] + src.sb[0]);
     dst->sb[1] = SSATB(dst->sb[1] + src.sb[1]);
     dst->sb[2] = SSATB(dst->sb[2] + src.sb[2]);
@@ -169,8 +159,7 @@ opPADDSB_a16(uint32_t fetchdat)
     dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]);
     dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -183,15 +172,10 @@ opPADDSB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sb[0] = SSATB(dst->sb[0] + src.sb[0]);
     dst->sb[1] = SSATB(dst->sb[1] + src.sb[1]);
     dst->sb[2] = SSATB(dst->sb[2] + src.sb[2]);
@@ -201,8 +185,7 @@ opPADDSB_a32(uint32_t fetchdat)
     dst->sb[6] = SSATB(dst->sb[6] + src.sb[6]);
     dst->sb[7] = SSATB(dst->sb[7] + src.sb[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -216,15 +199,10 @@ opPADDUSB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = USATB(dst->b[0] + src.b[0]);
     dst->b[1] = USATB(dst->b[1] + src.b[1]);
     dst->b[2] = USATB(dst->b[2] + src.b[2]);
@@ -234,8 +212,7 @@ opPADDUSB_a16(uint32_t fetchdat)
     dst->b[6] = USATB(dst->b[6] + src.b[6]);
     dst->b[7] = USATB(dst->b[7] + src.b[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -248,15 +225,10 @@ opPADDUSB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = USATB(dst->b[0] + src.b[0]);
     dst->b[1] = USATB(dst->b[1] + src.b[1]);
     dst->b[2] = USATB(dst->b[2] + src.b[2]);
@@ -266,8 +238,7 @@ opPADDUSB_a32(uint32_t fetchdat)
     dst->b[6] = USATB(dst->b[6] + src.b[6]);
     dst->b[7] = USATB(dst->b[7] + src.b[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -281,22 +252,16 @@ opPADDSW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sw[0] = SSATW(dst->sw[0] + src.sw[0]);
     dst->sw[1] = SSATW(dst->sw[1] + src.sw[1]);
     dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]);
     dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -309,22 +274,16 @@ opPADDSW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sw[0] = SSATW(dst->sw[0] + src.sw[0]);
     dst->sw[1] = SSATW(dst->sw[1] + src.sw[1]);
     dst->sw[2] = SSATW(dst->sw[2] + src.sw[2]);
     dst->sw[3] = SSATW(dst->sw[3] + src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -338,22 +297,16 @@ opPADDUSW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = USATW(dst->w[0] + src.w[0]);
     dst->w[1] = USATW(dst->w[1] + src.w[1]);
     dst->w[2] = USATW(dst->w[2] + src.w[2]);
     dst->w[3] = USATW(dst->w[3] + src.w[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -366,22 +319,16 @@ opPADDUSW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = USATW(dst->w[0] + src.w[0]);
     dst->w[1] = USATW(dst->w[1] + src.w[1]);
     dst->w[2] = USATW(dst->w[2] + src.w[2]);
     dst->w[3] = USATW(dst->w[3] + src.w[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -395,15 +342,10 @@ opPMADDWD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     if (dst->l[0] == 0x80008000 && src.l[0] == 0x80008000)
         dst->l[0] = 0x80000000;
     else
@@ -414,8 +356,7 @@ opPMADDWD_a16(uint32_t fetchdat)
     else
         dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -428,15 +369,10 @@ opPMADDWD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     if (dst->l[0] == 0x80008000 && src.l[0] == 0x80008000)
         dst->l[0] = 0x80000000;
     else
@@ -447,8 +383,7 @@ opPMADDWD_a32(uint32_t fetchdat)
     else
         dst->sl[1] = ((int32_t) dst->sw[2] * (int32_t) src.sw[2]) + ((int32_t) dst->sw[3] * (int32_t) src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -462,15 +397,10 @@ opPMULLW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3)
-        src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+        src = MMX_GETREG(cpu_rm);
     else {
         SEG_CHECK_READ(cpu_state.ea_seg);
         src.l[0] = readmeml(easeg, cpu_state.eaaddr);
@@ -485,8 +415,7 @@ opPMULLW_a16(uint32_t fetchdat)
     dst->w[3] *= src.w[3];
     CLOCK_CYCLES(1);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -499,15 +428,10 @@ opPMULLW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3)
-        src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+        src = MMX_GETREG(cpu_rm);
     else {
         SEG_CHECK_READ(cpu_state.ea_seg);
         src.l[0] = readmeml(easeg, cpu_state.eaaddr);
@@ -522,8 +446,7 @@ opPMULLW_a32(uint32_t fetchdat)
     dst->w[3] *= src.w[3];
     CLOCK_CYCLES(1);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -537,15 +460,10 @@ opPMULHW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3)
-        src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+        src = MMX_GETREG(cpu_rm);
     else {
         SEG_CHECK_READ(cpu_state.ea_seg);
         src.l[0] = readmeml(easeg, cpu_state.eaaddr);
@@ -560,8 +478,7 @@ opPMULHW_a16(uint32_t fetchdat)
     dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16;
     CLOCK_CYCLES(1);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -574,15 +491,10 @@ opPMULHW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3)
-        src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
+        src = MMX_GETREG(cpu_rm);
     else {
         SEG_CHECK_READ(cpu_state.ea_seg);
         src.l[0] = readmeml(easeg, cpu_state.eaaddr);
@@ -597,8 +509,7 @@ opPMULHW_a32(uint32_t fetchdat)
     dst->w[3] = ((int32_t) dst->sw[3] * (int32_t) src.sw[3]) >> 16;
     CLOCK_CYCLES(1);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -612,15 +523,10 @@ opPSUBB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] -= src.b[0];
     dst->b[1] -= src.b[1];
     dst->b[2] -= src.b[2];
@@ -630,8 +536,7 @@ opPSUBB_a16(uint32_t fetchdat)
     dst->b[6] -= src.b[6];
     dst->b[7] -= src.b[7];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -644,15 +549,10 @@ opPSUBB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] -= src.b[0];
     dst->b[1] -= src.b[1];
     dst->b[2] -= src.b[2];
@@ -662,8 +562,7 @@ opPSUBB_a32(uint32_t fetchdat)
     dst->b[6] -= src.b[6];
     dst->b[7] -= src.b[7];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -677,22 +576,16 @@ opPSUBW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] -= src.w[0];
     dst->w[1] -= src.w[1];
     dst->w[2] -= src.w[2];
     dst->w[3] -= src.w[3];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -705,22 +598,16 @@ opPSUBW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] -= src.w[0];
     dst->w[1] -= src.w[1];
     dst->w[2] -= src.w[2];
     dst->w[3] -= src.w[3];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -734,20 +621,14 @@ opPSUBD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] -= src.l[0];
     dst->l[1] -= src.l[1];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -760,20 +641,14 @@ opPSUBD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] -= src.l[0];
     dst->l[1] -= src.l[1];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -787,15 +662,10 @@ opPSUBSB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sb[0] = SSATB(dst->sb[0] - src.sb[0]);
     dst->sb[1] = SSATB(dst->sb[1] - src.sb[1]);
     dst->sb[2] = SSATB(dst->sb[2] - src.sb[2]);
@@ -805,8 +675,7 @@ opPSUBSB_a16(uint32_t fetchdat)
     dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]);
     dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -819,15 +688,10 @@ opPSUBSB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sb[0] = SSATB(dst->sb[0] - src.sb[0]);
     dst->sb[1] = SSATB(dst->sb[1] - src.sb[1]);
     dst->sb[2] = SSATB(dst->sb[2] - src.sb[2]);
@@ -837,8 +701,7 @@ opPSUBSB_a32(uint32_t fetchdat)
     dst->sb[6] = SSATB(dst->sb[6] - src.sb[6]);
     dst->sb[7] = SSATB(dst->sb[7] - src.sb[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -852,15 +715,10 @@ opPSUBUSB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = USATB(dst->b[0] - src.b[0]);
     dst->b[1] = USATB(dst->b[1] - src.b[1]);
     dst->b[2] = USATB(dst->b[2] - src.b[2]);
@@ -870,8 +728,7 @@ opPSUBUSB_a16(uint32_t fetchdat)
     dst->b[6] = USATB(dst->b[6] - src.b[6]);
     dst->b[7] = USATB(dst->b[7] - src.b[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -884,15 +741,10 @@ opPSUBUSB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = USATB(dst->b[0] - src.b[0]);
     dst->b[1] = USATB(dst->b[1] - src.b[1]);
     dst->b[2] = USATB(dst->b[2] - src.b[2]);
@@ -902,8 +754,7 @@ opPSUBUSB_a32(uint32_t fetchdat)
     dst->b[6] = USATB(dst->b[6] - src.b[6]);
     dst->b[7] = USATB(dst->b[7] - src.b[7]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -917,22 +768,16 @@ opPSUBSW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sw[0] = SSATW(dst->sw[0] - src.sw[0]);
     dst->sw[1] = SSATW(dst->sw[1] - src.sw[1]);
     dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]);
     dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -945,22 +790,16 @@ opPSUBSW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sw[0] = SSATW(dst->sw[0] - src.sw[0]);
     dst->sw[1] = SSATW(dst->sw[1] - src.sw[1]);
     dst->sw[2] = SSATW(dst->sw[2] - src.sw[2]);
     dst->sw[3] = SSATW(dst->sw[3] - src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -974,22 +813,16 @@ opPSUBUSW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = USATW(dst->w[0] - src.w[0]);
     dst->w[1] = USATW(dst->w[1] - src.w[1]);
     dst->w[2] = USATW(dst->w[2] - src.w[2]);
     dst->w[3] = USATW(dst->w[3] - src.w[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -1002,22 +835,16 @@ opPSUBUSW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = USATW(dst->w[0] - src.w[0]);
     dst->w[1] = USATW(dst->w[1] - src.w[1]);
     dst->w[2] = USATW(dst->w[2] - src.w[2]);
     dst->w[3] = USATW(dst->w[3] - src.w[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_cmp.h b/src/cpu/x86_ops_mmx_cmp.h
index 4f64119a3..d98e56511 100644
--- a/src/cpu/x86_ops_mmx_cmp.h
+++ b/src/cpu/x86_ops_mmx_cmp.h
@@ -7,15 +7,10 @@ opPCMPEQB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0;
     dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0;
     dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0;
@@ -25,8 +20,7 @@ opPCMPEQB_a16(uint32_t fetchdat)
     dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
     dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -39,15 +33,10 @@ opPCMPEQB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0;
     dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0;
     dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0;
@@ -57,8 +46,7 @@ opPCMPEQB_a32(uint32_t fetchdat)
     dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
     dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -72,15 +60,10 @@ opPCMPGTB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0;
     dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0;
     dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0;
@@ -90,8 +73,7 @@ opPCMPGTB_a16(uint32_t fetchdat)
     dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
     dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -104,15 +86,10 @@ opPCMPGTB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0;
     dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0;
     dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0;
@@ -122,8 +99,7 @@ opPCMPGTB_a32(uint32_t fetchdat)
     dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
     dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -137,22 +113,16 @@ opPCMPEQW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0;
     dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0;
     dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
     dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -165,22 +135,16 @@ opPCMPEQW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0;
     dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0;
     dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
     dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -194,22 +158,16 @@ opPCMPGTW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0;
     dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0;
     dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
     dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -222,22 +180,16 @@ opPCMPGTW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0;
     dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0;
     dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
     dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -251,20 +203,14 @@ opPCMPEQD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -277,20 +223,14 @@ opPCMPEQD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -304,20 +244,14 @@ opPCMPGTD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -330,20 +264,14 @@ opPCMPGTD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
     dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_logic.h b/src/cpu/x86_ops_mmx_logic.h
index 67622a3df..d0079347a 100644
--- a/src/cpu/x86_ops_mmx_logic.h
+++ b/src/cpu/x86_ops_mmx_logic.h
@@ -7,19 +7,13 @@ opPAND_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q &= src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -32,19 +26,13 @@ opPAND_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q &= src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -58,19 +46,13 @@ opPANDN_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q = ~dst->q & src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -83,19 +65,13 @@ opPANDN_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q = ~dst->q & src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -109,19 +85,13 @@ opPOR_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q |= src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -134,19 +104,13 @@ opPOR_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q |= src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -160,19 +124,13 @@ opPXOR_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q ^= src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -185,19 +143,13 @@ opPXOR_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->q ^= src.q;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_mov.h b/src/cpu/x86_ops_mmx_mov.h
index c631c6444..d65c82693 100644
--- a/src/cpu/x86_ops_mmx_mov.h
+++ b/src/cpu/x86_ops_mmx_mov.h
@@ -7,14 +7,9 @@ opMOVD_l_mm_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->l[0] = cpu_state.regs[cpu_rm].l;
         op->l[1] = 0;
         CLOCK_CYCLES(1);
@@ -24,18 +19,12 @@ opMOVD_l_mm_a16(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->l[0] = dst;
         op->l[1] = 0;
         CLOCK_CYCLES(2);
     }
 
-    if (fpu_softfloat)
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -48,14 +37,9 @@ opMOVD_l_mm_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->l[0] = cpu_state.regs[cpu_rm].l;
         op->l[1] = 0;
         CLOCK_CYCLES(1);
@@ -65,18 +49,12 @@ opMOVD_l_mm_a32(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->l[0] = dst;
         op->l[1] = 0;
         CLOCK_CYCLES(2);
     }
 
-    if (fpu_softfloat)
-            fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -89,14 +67,9 @@ opMOVD_mm_l_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         cpu_state.regs[cpu_rm].l = op->l[0];
         CLOCK_CYCLES(1);
     } else {
@@ -106,11 +79,6 @@ opMOVD_mm_l_a16(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         CLOCK_CYCLES(2);
     }
 
@@ -124,14 +92,9 @@ opMOVD_mm_l_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         cpu_state.regs[cpu_rm].l = op->l[0];
         CLOCK_CYCLES(1);
     } else {
@@ -141,11 +104,6 @@ opMOVD_mm_l_a32(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         CLOCK_CYCLES(2);
     }
 
@@ -166,14 +124,9 @@ opMOVD_mm_l_a16_cx(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         cpu_state.regs[cpu_rm].l = op->l[0];
         CLOCK_CYCLES(1);
     } else {
@@ -183,11 +136,6 @@ opMOVD_mm_l_a16_cx(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         CLOCK_CYCLES(2);
     }
 
@@ -205,14 +153,9 @@ opMOVD_mm_l_a32_cx(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         cpu_state.regs[cpu_rm].l = op->l[0];
         CLOCK_CYCLES(1);
     } else {
@@ -222,11 +165,6 @@ opMOVD_mm_l_a32_cx(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         CLOCK_CYCLES(2);
     }
 
@@ -244,15 +182,10 @@ opMOVQ_q_mm_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    src = MMX_GETREG(cpu_rm);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->q = src.q;
         CLOCK_CYCLES(1);
     } else {
@@ -261,17 +194,11 @@ opMOVQ_q_mm_a16(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->q = dst;
         CLOCK_CYCLES(2);
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -285,15 +212,10 @@ opMOVQ_q_mm_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
-    op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    src = MMX_GETREG(cpu_rm);
+    op = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->q = src.q;
         CLOCK_CYCLES(1);
     } else {
@@ -302,17 +224,11 @@ opMOVQ_q_mm_a32(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         op->q = dst;
         CLOCK_CYCLES(2);
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -327,20 +243,14 @@ opMOVQ_mm_q_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : cpu_state.MM[cpu_reg];
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : &(cpu_state.MM[cpu_rm]);
+    src = MMX_GETREG(cpu_reg);
+    dst = MMX_GETREGP(cpu_rm);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         dst->q = src.q;
         CLOCK_CYCLES(1);
 
-        if (fpu_softfloat)
-            fpu_state.st_space[cpu_rm].exp = 0xffff;
+        MMX_SETEXP();
     } else {
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
@@ -348,11 +258,6 @@ opMOVQ_mm_q_a16(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         CLOCK_CYCLES(2);
     }
 
@@ -368,20 +273,14 @@ opMOVQ_mm_q_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : cpu_state.MM[cpu_reg];
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : &(cpu_state.MM[cpu_rm]);
+    src = MMX_GETREG(cpu_reg);
+    dst = MMX_GETREGP(cpu_rm);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         dst->q = src.q;
         CLOCK_CYCLES(1);
 
-        if (fpu_softfloat)
-            fpu_state.st_space[cpu_rm].exp = 0xffff;
+        MMX_SETEXP();
     } else {
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
@@ -389,11 +288,6 @@ opMOVQ_mm_q_a32(uint32_t fetchdat)
         if (cpu_state.abrt)
             return 1;
 
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
-
         CLOCK_CYCLES(2);
     }
 
diff --git a/src/cpu/x86_ops_mmx_pack.h b/src/cpu/x86_ops_mmx_pack.h
index a768a0183..a76ad1d0a 100644
--- a/src/cpu/x86_ops_mmx_pack.h
+++ b/src/cpu/x86_ops_mmx_pack.h
@@ -8,14 +8,10 @@ opPUNPCKLDQ_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    src = MMX_GETREG(cpu_rm);
+    dst = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
         dst->l[1] = src.l[0];
         CLOCK_CYCLES(1);
     } else {
@@ -23,17 +19,12 @@ opPUNPCKLDQ_a16(uint32_t fetchdat)
         usrc = readmeml(easeg, cpu_state.eaaddr);
         if (cpu_state.abrt)
             return 0;
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
         dst->l[1] = usrc;
 
         CLOCK_CYCLES(2);
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -47,14 +38,10 @@ opPUNPCKLDQ_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    src = MMX_GETREG(cpu_rm);
+    dst = MMX_GETREGP(cpu_reg);
 
     if (cpu_mod == 3) {
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
         dst->l[1] = src.l[0];
         CLOCK_CYCLES(1);
     } else {
@@ -62,17 +49,12 @@ opPUNPCKLDQ_a32(uint32_t fetchdat)
         usrc = readmeml(easeg, cpu_state.eaaddr);
         if (cpu_state.abrt)
             return 0;
-        if (fpu_softfloat) {
-            fpu_state.tag = 0;
-            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-        }
         dst->l[1] = usrc;
 
         CLOCK_CYCLES(2);
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -86,20 +68,14 @@ opPUNPCKHDQ_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] = dst->l[1];
     dst->l[1] = src.l[1];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -112,20 +88,14 @@ opPUNPCKHDQ_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->l[0] = dst->l[1];
     dst->l[1] = src.l[1];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -139,15 +109,10 @@ opPUNPCKLBW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[7] = src.b[3];
     dst->b[6] = dst->b[3];
     dst->b[5] = src.b[2];
@@ -157,8 +122,7 @@ opPUNPCKLBW_a16(uint32_t fetchdat)
     dst->b[1] = src.b[0];
     dst->b[0] = dst->b[0];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -171,15 +135,10 @@ opPUNPCKLBW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[7] = src.b[3];
     dst->b[6] = dst->b[3];
     dst->b[5] = src.b[2];
@@ -189,8 +148,7 @@ opPUNPCKLBW_a32(uint32_t fetchdat)
     dst->b[1] = src.b[0];
     dst->b[0] = dst->b[0];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -204,15 +162,10 @@ opPUNPCKHBW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = dst->b[4];
     dst->b[1] = src.b[4];
     dst->b[2] = dst->b[5];
@@ -222,8 +175,7 @@ opPUNPCKHBW_a16(uint32_t fetchdat)
     dst->b[6] = dst->b[7];
     dst->b[7] = src.b[7];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -236,15 +188,10 @@ opPUNPCKHBW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = dst->b[4];
     dst->b[1] = src.b[4];
     dst->b[2] = dst->b[5];
@@ -254,8 +201,7 @@ opPUNPCKHBW_a32(uint32_t fetchdat)
     dst->b[6] = dst->b[7];
     dst->b[7] = src.b[7];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -269,22 +215,16 @@ opPUNPCKLWD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[3] = src.w[1];
     dst->w[2] = dst->w[1];
     dst->w[1] = src.w[0];
     dst->w[0] = dst->w[0];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -297,22 +237,16 @@ opPUNPCKLWD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[3] = src.w[1];
     dst->w[2] = dst->w[1];
     dst->w[1] = src.w[0];
     dst->w[0] = dst->w[0];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -326,22 +260,16 @@ opPUNPCKHWD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = dst->w[2];
     dst->w[1] = src.w[2];
     dst->w[2] = dst->w[3];
     dst->w[3] = src.w[3];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -354,22 +282,16 @@ opPUNPCKHWD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->w[0] = dst->w[2];
     dst->w[1] = src.w[2];
     dst->w[2] = dst->w[3];
     dst->w[3] = src.w[3];
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -383,15 +305,10 @@ opPACKSSWB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sb[0] = SSATB(dst->sw[0]);
     dst->sb[1] = SSATB(dst->sw[1]);
     dst->sb[2] = SSATB(dst->sw[2]);
@@ -401,8 +318,7 @@ opPACKSSWB_a16(uint32_t fetchdat)
     dst->sb[6] = SSATB(src.sw[2]);
     dst->sb[7] = SSATB(src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -415,15 +331,10 @@ opPACKSSWB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sb[0] = SSATB(dst->sw[0]);
     dst->sb[1] = SSATB(dst->sw[1]);
     dst->sb[2] = SSATB(dst->sw[2]);
@@ -433,8 +344,7 @@ opPACKSSWB_a32(uint32_t fetchdat)
     dst->sb[6] = SSATB(src.sw[2]);
     dst->sb[7] = SSATB(src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -448,15 +358,10 @@ opPACKUSWB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = USATB(dst->sw[0]);
     dst->b[1] = USATB(dst->sw[1]);
     dst->b[2] = USATB(dst->sw[2]);
@@ -466,8 +371,7 @@ opPACKUSWB_a16(uint32_t fetchdat)
     dst->b[6] = USATB(src.sw[2]);
     dst->b[7] = USATB(src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -480,15 +384,10 @@ opPACKUSWB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->b[0] = USATB(dst->sw[0]);
     dst->b[1] = USATB(dst->sw[1]);
     dst->b[2] = USATB(dst->sw[2]);
@@ -498,8 +397,7 @@ opPACKUSWB_a32(uint32_t fetchdat)
     dst->b[6] = USATB(src.sw[2]);
     dst->b[7] = USATB(src.sw[3]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -508,28 +406,23 @@ static int
 opPACKSSDW_a16(uint32_t fetchdat)
 {
     MMX_REG src;
-    MMX_REG *dst, dst2;
+    MMX_REG *dst;
+    MMX_REG dst2;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
     dst2 = *dst;
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sw[0] = SSATW(dst2.sl[0]);
     dst->sw[1] = SSATW(dst2.sl[1]);
     dst->sw[2] = SSATW(src.sl[0]);
     dst->sw[3] = SSATW(src.sl[1]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -537,28 +430,23 @@ static int
 opPACKSSDW_a32(uint32_t fetchdat)
 {
     MMX_REG src;
-    MMX_REG *dst, dst2;
+    MMX_REG *dst;
+    MMX_REG dst2;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
     dst2 = *dst;
 
     MMX_GETSRC();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     dst->sw[0] = SSATW(dst2.sl[0]);
     dst->sw[1] = SSATW(dst2.sl[1]);
     dst->sw[2] = SSATW(src.sl[0]);
     dst->sw[3] = SSATW(src.sl[1]);
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
diff --git a/src/cpu/x86_ops_mmx_shift.h b/src/cpu/x86_ops_mmx_shift.h
index e0c9f89a5..912919064 100644
--- a/src/cpu/x86_ops_mmx_shift.h
+++ b/src/cpu/x86_ops_mmx_shift.h
@@ -1,13 +1,13 @@
-#define MMX_GETSHIFT()                                                                                                \
-    if (cpu_mod == 3) {                                                                                               \
-        shift = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction).b[0] : cpu_state.MM[cpu_rm].b[0]; \
-        CLOCK_CYCLES(1);                                                                                              \
-    } else {                                                                                                          \
-        SEG_CHECK_READ(cpu_state.ea_seg);                                                                             \
-        shift = readmemb(easeg, cpu_state.eaaddr);                                                                    \
-        if (cpu_state.abrt)                                                                                           \
-            return 0;                                                                                                 \
-        CLOCK_CYCLES(2);                                                                                              \
+#define MMX_GETSHIFT()                             \
+    if (cpu_mod == 3) {                            \
+        shift = (MMX_GETREG(cpu_rm)).b[0];         \
+        CLOCK_CYCLES(1);                           \
+    } else {                                       \
+        SEG_CHECK_READ(cpu_state.ea_seg);          \
+        shift = readmemb(easeg, cpu_state.eaaddr); \
+        if (cpu_state.abrt)                        \
+            return 0;                              \
+        CLOCK_CYCLES(2);                           \
     }
 
 static int
@@ -20,12 +20,7 @@ opPSxxW_imm(uint32_t fetchdat)
 
     cpu_state.pc += 2;
     MMX_ENTER();
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[reg].fraction) : &(cpu_state.MM[reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(reg);
 
     switch (op) {
         case 0x10: /*PSRLW*/
@@ -62,8 +57,7 @@ opPSxxW_imm(uint32_t fetchdat)
             return 0;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[reg].exp = 0xffff;
+    MMX_SETEXP();
 
     CLOCK_CYCLES(1);
     return 0;
@@ -79,15 +73,10 @@ opPSLLW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     if (shift > 15)
         dst->q = 0;
     else {
@@ -97,8 +86,7 @@ opPSLLW_a16(uint32_t fetchdat)
         dst->w[3] <<= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -112,15 +100,10 @@ opPSLLW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
-
     if (shift > 15)
         dst->q = 0;
     else {
@@ -130,8 +113,7 @@ opPSLLW_a32(uint32_t fetchdat)
         dst->w[3] <<= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -146,12 +128,7 @@ opPSRLW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -164,8 +141,7 @@ opPSRLW_a16(uint32_t fetchdat)
         dst->w[3] >>= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -179,12 +155,7 @@ opPSRLW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -197,8 +168,7 @@ opPSRLW_a32(uint32_t fetchdat)
         dst->w[3] >>= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -213,12 +183,7 @@ opPSRAW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -230,8 +195,7 @@ opPSRAW_a16(uint32_t fetchdat)
     dst->sw[2] >>= shift;
     dst->sw[3] >>= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -245,12 +209,7 @@ opPSRAW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -262,8 +221,7 @@ opPSRAW_a32(uint32_t fetchdat)
     dst->sw[2] >>= shift;
     dst->sw[3] >>= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -279,12 +237,7 @@ opPSxxD_imm(uint32_t fetchdat)
     cpu_state.pc += 2;
     MMX_ENTER();
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[reg].fraction) : &(cpu_state.MM[reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(reg);
 
     switch (op) {
         case 0x10: /*PSRLD*/
@@ -315,8 +268,7 @@ opPSxxD_imm(uint32_t fetchdat)
             return 0;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[reg].exp = 0xffff;
+    MMX_SETEXP();
 
     CLOCK_CYCLES(1);
     return 0;
@@ -332,12 +284,7 @@ opPSLLD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -348,8 +295,7 @@ opPSLLD_a16(uint32_t fetchdat)
         dst->l[1] <<= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -363,12 +309,7 @@ opPSLLD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -379,8 +320,7 @@ opPSLLD_a32(uint32_t fetchdat)
         dst->l[1] <<= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -395,12 +335,7 @@ opPSRLD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -411,8 +346,7 @@ opPSRLD_a16(uint32_t fetchdat)
         dst->l[1] >>= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -426,12 +360,7 @@ opPSRLD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -442,8 +371,7 @@ opPSRLD_a32(uint32_t fetchdat)
         dst->l[1] >>= shift;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -458,12 +386,7 @@ opPSRAD_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -473,8 +396,7 @@ opPSRAD_a16(uint32_t fetchdat)
     dst->sl[0] >>= shift;
     dst->sl[1] >>= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -488,12 +410,7 @@ opPSRAD_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -503,8 +420,7 @@ opPSRAD_a32(uint32_t fetchdat)
     dst->sl[0] >>= shift;
     dst->sl[1] >>= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -521,12 +437,7 @@ opPSxxQ_imm(uint32_t fetchdat)
 
     MMX_ENTER();
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[reg].fraction) : &(cpu_state.MM[reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(reg);
 
     switch (op) {
         case 0x10: /*PSRLW*/
@@ -553,8 +464,7 @@ opPSxxQ_imm(uint32_t fetchdat)
             return 0;
     }
 
-    if (fpu_softfloat)
-        fpu_state.st_space[reg].exp = 0xffff;
+    MMX_SETEXP();
 
     CLOCK_CYCLES(1);
     return 0;
@@ -570,12 +480,7 @@ opPSLLQ_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -584,8 +489,7 @@ opPSLLQ_a16(uint32_t fetchdat)
     else
         dst->q <<= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -599,12 +503,7 @@ opPSLLQ_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -613,8 +512,7 @@ opPSLLQ_a32(uint32_t fetchdat)
     else
         dst->q <<= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -629,12 +527,7 @@ opPSRLQ_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -643,8 +536,7 @@ opPSRLQ_a16(uint32_t fetchdat)
     else
         dst->q >>= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
@@ -658,12 +550,7 @@ opPSRLQ_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
 
-    dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
-
-    if (fpu_softfloat) {
-        fpu_state.tag = 0;
-        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
-    }
+    dst = MMX_GETREGP(cpu_reg);
 
     MMX_GETSHIFT();
 
@@ -672,8 +559,7 @@ opPSRLQ_a32(uint32_t fetchdat)
     else
         dst->q >>= shift;
 
-    if (fpu_softfloat)
-        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    MMX_SETEXP();
 
     return 0;
 }
diff --git a/src/cpu/x87.h b/src/cpu/x87.h
index 8fab28ce8..66d51dbd9 100644
--- a/src/cpu/x87.h
+++ b/src/cpu/x87.h
@@ -10,9 +10,14 @@ static __inline void
 x87_set_mmx(void)
 {
     uint64_t *p;
-    cpu_state.TOP   = 0;
-    p               = (uint64_t *) cpu_state.tag;
-    *p              = 0x0101010101010101ull;
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    } else {
+        cpu_state.TOP   = 0;
+        p               = (uint64_t *) cpu_state.tag;
+        *p              = 0x0101010101010101ull;
+    }
     cpu_state.ismmx = 1;
 }
 
@@ -20,8 +25,13 @@ static __inline void
 x87_emms(void)
 {
     uint64_t *p;
-    p               = (uint64_t *) cpu_state.tag;
-    *p              = 0;
+    if (fpu_softfloat) {
+        fpu_state.tag = 0xffff;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    } else {
+        p               = (uint64_t *) cpu_state.tag;
+        *p              = 0;
+    }
     cpu_state.ismmx = 0;
 }