From ccb52c4585942bfd27dab37509380824fa9b056f Mon Sep 17 00:00:00 2001 From: Panagiotis <58827426+tiseno100@users.noreply.github.com> Date: Wed, 3 Feb 2021 14:56:22 +0200 Subject: [PATCH] Sanitize some old chipset code (Part 2) Few fixes for both the ALi M1429 & OPTi 291 --- src/chipset/ali1429.c | 139 +++++++++++++++----------------- src/chipset/opti291.c | 183 +++++++++++++++++++++--------------------- 2 files changed, 156 insertions(+), 166 deletions(-) diff --git a/src/chipset/ali1429.c b/src/chipset/ali1429.c index 0326a1471..08cc6ff14 100644 --- a/src/chipset/ali1429.c +++ b/src/chipset/ali1429.c @@ -29,11 +29,13 @@ #include <86box/timer.h> #include <86box/io.h> #include <86box/device.h> -#include <86box/keyboard.h> + +#include <86box/apm.h> #include <86box/mem.h> #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/port_92.h> +#include <86box/smram.h> #include <86box/chipset.h> #define disabled_shadow (MEM_READ_EXTANY | MEM_WRITE_EXTANY) @@ -45,122 +47,108 @@ ali1429_log(const char *fmt, ...) { va_list ap; - if (ali1429_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + if (ali1429_do_log) + { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else #define ali1429_log(fmt, ...) #endif - typedef struct { - uint8_t index, cfg_locked, - regs[256]; + uint8_t index, cfg_locked, + regs[256]; + + smram_t *smram; } ali1429_t; static void ali1429_shadow_recalc(ali1429_t *dev) { -uint32_t base, i, can_write, can_read; + uint32_t base, i, can_write, can_read; -shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01); -shadowbios_write = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x02); + shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01); + shadowbios_write = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x02); -can_write = (dev->regs[0x14] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; -can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + can_write = (dev->regs[0x14] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; -for(i = 0; i < 8; i++) -{ -base = 0xc0000 + (i << 15); + for (i = 0; i < 8; i++) + { + base = 0xc0000 + (i << 15); -if(dev->regs[0x13] & (1 << i)) -mem_set_mem_state_both(base, 0x8000, can_read | can_write); -else -mem_set_mem_state_both(base, 0x8000, disabled_shadow); + if (dev->regs[0x13] & (1 << i)) + mem_set_mem_state_both(base, 0x8000, can_read | can_write); + else + mem_set_mem_state_both(base, 0x8000, disabled_shadow); + } -} - -flushmmucache(); + flushmmucache(); } static void ali1429_write(uint16_t addr, uint8_t val, void *priv) { - ali1429_t *dev = (ali1429_t *) priv; + ali1429_t *dev = (ali1429_t *)priv; - switch (addr) { - case 0x22: - dev->index = val; - break; - - case 0x23: + switch (addr) + { + case 0x22: + dev->index = val; + break; - /* Don't log register unlock patterns */ - if(dev->index != 0x03) - ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val); + case 0x23: + if (dev->index != 0x03) + ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val); - /* Unlock/Lock Registers */ - if(dev->index == 0x03) - dev->cfg_locked = !(val == 0xc5); + if (dev->index == 0x03) + dev->cfg_locked = !(val == 0xc5); - if(!dev->cfg_locked) + if (!dev->cfg_locked) { - dev->regs[dev->index] = val; + dev->regs[dev->index] = val; - switch(dev->index){ - /* Shadow RAM */ + switch (dev->index) + { case 0x13: case 0x14: - ali1429_shadow_recalc(dev); - break; + ali1429_shadow_recalc(dev); + break; - /* Cache */ case 0x18: - cpu_cache_ext_enabled = (val & 0x80); - break; - } + cpu_cache_ext_enabled = !!(val & 2); + cpu_update_waitstates(); + break; + } } - break; + break; } } - static uint8_t ali1429_read(uint16_t addr, void *priv) { - uint8_t ret = 0xff; - ali1429_t *dev = (ali1429_t *) priv; - - switch (addr) { - case 0x23: - /* Do not conflict with Cyrix configuration registers */ - if(!(((dev->index >= 0xc0) || (dev->index == 0x20)) && cpu_iscyrix)) - ret = dev->regs[dev->index]; - break; - } - - return ret; + ali1429_t *dev = (ali1429_t *)priv; + return (addr == 0x23) ? dev->regs[dev->index] : 0xff; } - static void ali1429_close(void *priv) { - ali1429_t *dev = (ali1429_t *) priv; + ali1429_t *dev = (ali1429_t *)priv; free(dev); } - static void * ali1429_init(const device_t *info) { - ali1429_t *dev = (ali1429_t *) malloc(sizeof(ali1429_t)); + ali1429_t *dev = (ali1429_t *)malloc(sizeof(ali1429_t)); memset(dev, 0, sizeof(ali1429_t)); /* @@ -168,26 +156,25 @@ ali1429_init(const device_t *info) 22h Index Port 23h Data Port */ - io_sethandler(0x022, 0x0001, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev); - io_sethandler(0x023, 0x0001, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev); - + io_sethandler(0x0022, 0x0002, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev); + dev->cfg_locked = 1; + device_add(&apm_device); device_add(&port_92_device); - - dev->regs[0x13] = 0x00; - dev->regs[0x14] = 0x00; - ali1429_shadow_recalc(dev); + /* dev->smram = smram_add(); */ return dev; } - const device_t ali1429_device = { "ALi M1429", 0, 0, - ali1429_init, ali1429_close, NULL, - { NULL }, NULL, NULL, - NULL -}; + ali1429_init, + ali1429_close, + NULL, + {NULL}, + NULL, + NULL, + NULL}; diff --git a/src/chipset/opti291.c b/src/chipset/opti291.c index b59b0b7b7..4bb4ac937 100644 --- a/src/chipset/opti291.c +++ b/src/chipset/opti291.c @@ -8,9 +8,10 @@ * * Implementation of the OPTi 82C291 chipset. - * Authors: plant/nerd73 + * Authors: plant/nerd73, Tiseno100 * * Copyright 2020 plant/nerd73. + * Copyright 2021 Tiseno100. */ #include #include @@ -24,133 +25,135 @@ #include <86box/timer.h> #include <86box/io.h> #include <86box/device.h> -#include <86box/keyboard.h> #include <86box/mem.h> -#include <86box/fdd.h> -#include <86box/fdc.h> #include <86box/port_92.h> #include <86box/chipset.h> +#ifdef ENABLE_OPTI291_LOG +int opti291_do_log = ENABLE_OPTI291_LOG; +static void +opti291_log(const char *fmt, ...) +{ + va_list ap; + + if (opti291_do_log) + { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +#define opti291_log(fmt, ...) +#endif + typedef struct { - uint8_t index, - regs[256]; - port_92_t *port_92; + uint8_t index, regs[256]; + port_92_t *port_92; } opti291_t; static void opti291_recalc(opti291_t *dev) { - uint32_t base; - uint32_t i, shflags, write, writef = 0; - - - writef = (dev->regs[0x27] & 0x80) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - if (!(dev->regs[0x23] & 0x40)) - mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | writef); - else - mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTANY | writef); - - for (i = 0; i < 4; i++) { - base = 0xe0000 + (i << 14); - shflags = (dev->regs[0x24] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - write = (dev->regs[0x24] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - shflags |= (dev->regs[0x27] & 0x40) ? MEM_WRITE_DISABLED : write; - mem_set_mem_state(base, 0x4000, shflags); + mem_set_mem_state_both(0xf0000, 0x10000, (!(dev->regs[0x23] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x80) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)); + + for (uint32_t i = 0; i < 4; i++) + { + mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, ((dev->regs[0x26] & (1 << (i + 4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x10) ? MEM_WRITE_DISABLED : ((dev->regs[0x26] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))); + mem_set_mem_state_both(0xd0000 + (i << 14), 0x4000, ((dev->regs[0x25] & (1 << (i + 4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x20) ? MEM_WRITE_DISABLED : ((dev->regs[0x25] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))); + mem_set_mem_state_both(0xe0000 + (i << 14), 0x4000, ((dev->regs[0x24] & (1 << (i + 4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x27] & 0x40) ? MEM_WRITE_DISABLED : ((dev->regs[0x24] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))); } - for (i = 0; i < 4; i++) { - base = 0xd0000 + (i << 14); - shflags = (dev->regs[0x25] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - write = (dev->regs[0x25] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - shflags |= (dev->regs[0x27] & 0x20) ? MEM_WRITE_DISABLED : write; - mem_set_mem_state(base, 0x4000, shflags); - } - - for (i = 0; i < 4; i++) { - base = 0xc0000 + (i << 14); - shflags = (dev->regs[0x26] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - write = (dev->regs[0x26] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - shflags |= (dev->regs[0x27] & 0x10) ? MEM_WRITE_DISABLED : write; - mem_set_mem_state(base, 0x4000, shflags); - } - flushmmucache(); -} + flushmmucache(); +} static void opti291_write(uint16_t addr, uint8_t val, void *priv) { - opti291_t *dev = (opti291_t *) priv; + opti291_t *dev = (opti291_t *)priv; - switch (addr) { + switch (addr) + { case 0x22: dev->index = val; break; case 0x24: - pclog("OPTi 291: dev->regs[%02x] = %02x\n", dev->index, val); - dev->regs[dev->index] = val; - - switch(dev->index){ - case 0x21: - cpu_update_waitstates(); - break; - case 0x23: - case 0x24: - case 0x25: - case 0x26: - case 0x27: - opti291_recalc(dev); - break; - } + opti291_log("OPTi 291: dev->regs[%02x] = %02x\n", dev->index, val); + switch (dev->index) + { + case 0x20: + dev->regs[dev->index] = val & 0x3f; + break; + case 0x21: + dev->regs[dev->index] = val & 0xf3; + break; + case 0x22: + dev->regs[dev->index] = val; + break; + case 0x23: + case 0x24: + case 0x25: + case 0x26: + dev->regs[dev->index] = val; + opti291_recalc(dev); + break; + case 0x27: + case 0x28: + dev->regs[dev->index] = val; + break; + case 0x29: + dev->regs[dev->index] = val & 0x0f; + break; + case 0x2a: + case 0x2b: + case 0x2c: + dev->regs[dev->index] = val; + break; + } break; - } + } } - static uint8_t opti291_read(uint16_t addr, void *priv) { - uint8_t ret = 0xff; - opti291_t *dev = (opti291_t *) priv; + opti291_t *dev = (opti291_t *)priv; - switch (addr) { - case 0x24: -// pclog("OPTi 291: read from dev->regs[%02x]\n", dev->index); - ret = dev->regs[dev->index]; - break; - } - - return ret; + return (addr == 0x24) ? dev->regs[dev->index] : 0xff; } - static void opti291_close(void *priv) { - opti291_t *dev = (opti291_t *) priv; + opti291_t *dev = (opti291_t *)priv; - free(dev); + free(dev); } - static void * opti291_init(const device_t *info) { - opti291_t *dev = (opti291_t *) malloc(sizeof(opti291_t)); - memset(dev, 0, sizeof(opti291_t)); + opti291_t *dev = (opti291_t *)malloc(sizeof(opti291_t)); + memset(dev, 0, sizeof(opti291_t)); - io_sethandler(0x022, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev); - io_sethandler(0x024, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev); - dev->regs[0x23] = 0x40; - dev->port_92 = device_add(&port_92_device); - opti291_recalc(dev); - - return dev; + io_sethandler(0x022, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev); + io_sethandler(0x024, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev); + dev->regs[0x22] = 0xf0; + dev->regs[0x23] = 0x40; + dev->regs[0x28] = 0x08; + dev->regs[0x29] = 0xa0; + device_add(&port_92_device); + opti291_recalc(dev); + + return dev; } - const device_t opti291_device = { - "OPTi 82C291", - 0, - 0, - opti291_init, opti291_close, NULL, - { NULL }, NULL, NULL, - NULL -}; + "OPTi 82C291", + 0, + 0, + opti291_init, + opti291_close, + NULL, + {NULL}, + NULL, + NULL, + NULL};