80486DX2-66/86Box-fork
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Overhauled the SiS 496/497 chipset emulation (and added the DRB locking to it) (later Zida Tomato 4DPS BIOS'es now work, and we now use the actual 1.72), fixed the W83787F and FDC37C932FR Super I/O chips, removed the no longer needed Acer M3A registers (that's now correctly handled as FDC37C932FR GPIO), and a number of bugfixes here and there.

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This commit is contained in:
OBattler
2020-06-29 01:10:20 +02:00
parent 2eceaf77e9
commit 96228bc41d
22 changed files with 578 additions and 315 deletions
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12
src/sio/sio_fdc37c93x.c
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@@ -108,8 +108,11 @@ static uint8_t
fdc37c93x_gpio_read(uint16_t port, void *priv)
{
fdc37c93x_t *dev = (fdc37c93x_t *) priv;
uint8_t ret = 0xff;
return dev->gpio_regs[port & 1];
ret = dev->gpio_regs[port & 1];
return ret;
}
@@ -118,7 +121,8 @@ fdc37c93x_gpio_write(uint16_t port, uint8_t val, void *priv)
{
fdc37c93x_t *dev = (fdc37c93x_t *) priv;
dev->gpio_regs[port & 1] = val;
if (!(port & 1))
dev->gpio_regs[0] = (dev->gpio_regs[0] & 0xfc) | (val & 0x03);
}
@@ -756,8 +760,8 @@ fdc37c93x_init(const device_t *info)
dev->chip_id = info->local;
dev->gpio_regs[0] = 0xFD;
dev->gpio_regs[1] = 0xFF;
dev->gpio_regs[0] = 0xff;
dev->gpio_regs[1] = 0xfd;
if (dev->chip_id == 0x30) {
dev->nvr = device_add(&at_nvr_device);

17
src/sio/sio_w83787f.c
View File

@@ -145,27 +145,24 @@ w83787f_serial_handler(w83787f_t *dev, int uart)
static void
w83787f_lpt_handler(w83787f_t *dev)
{
int ptrs0 = !!(dev->regs[1] & 4);
int ptrs1 = !!(dev->regs[1] & 5);
int ptrs, irq = 7;
int ptras = (dev->regs[1] >> 4) & 0x03;
int irq = 7;
uint16_t addr = 0x378, enable = 1;
ptrs = (ptrs1 << 1) | ptrs0;
switch (ptrs) {
case 0:
switch (ptras) {
case 0x00:
addr = 0x3bc;
irq = 7;
break;
case 1:
case 0x01:
addr = 0x278;
irq = 5;
break;
case 2:
case 0x02:
addr = 0x378;
irq = 7;
break;
case 3:
case 0x03:
default:
enable = 0;
break;