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Merge pull request #2619 from lemondrops/bugfix/amdk6_cpuid

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Clear unfilled registers when returning CPUID results on K6-2/III/+ CPUs
This commit is contained in:
Miran Grča
2022-08-14 00:13:39 +02:00
committed by GitHub
parent 3c9cec495b 603cdcbb37
commit 97008f3a39
1 changed files with 12 additions and 0 deletions
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12
src/cpu/cpu.c
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@@ -1742,9 +1742,11 @@ cpu_CPUID(void)
break; break;
case 0x80000000: case 0x80000000:
EAX = 0x80000005; EAX = 0x80000005;
EBX = ECX = EDX = 0;
break; break;
case 0x80000001: case 0x80000001:
EAX = CPUID + 0x100; EAX = CPUID + 0x100;
EBX = ECX = 0;
EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW; EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW;
break; break;
case 0x80000002: /* Processor name string */ case 0x80000002: /* Processor name string */
@@ -1760,6 +1762,7 @@ cpu_CPUID(void)
EDX = 0x00000000; EDX = 0x00000000;
break; break;
case 0x80000005: /*Cache information*/ case 0x80000005: /*Cache information*/
EAX = 0;
EBX = 0x02800140; /*TLBs*/ EBX = 0x02800140; /*TLBs*/
ECX = 0x20020220; /*L1 data cache*/ ECX = 0x20020220; /*L1 data cache*/
EDX = 0x20020220; /*L1 instruction cache*/ EDX = 0x20020220; /*L1 instruction cache*/
@@ -1785,9 +1788,11 @@ cpu_CPUID(void)
break; break;
case 0x80000000: case 0x80000000:
EAX = 0x80000006; EAX = 0x80000006;
EBX = ECX = EDX = 0;
break; break;
case 0x80000001: case 0x80000001:
EAX = CPUID + 0x100; EAX = CPUID + 0x100;
EBX = ECX = 0;
EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW; EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW;
break; break;
case 0x80000002: /* Processor name string */ case 0x80000002: /* Processor name string */
@@ -1803,11 +1808,13 @@ cpu_CPUID(void)
EDX = 0x00000000; EDX = 0x00000000;
break; break;
case 0x80000005: /* Cache information */ case 0x80000005: /* Cache information */
EAX = 0;
EBX = 0x02800140; /* TLBs */ EBX = 0x02800140; /* TLBs */
ECX = 0x20020220; /*L1 data cache*/ ECX = 0x20020220; /*L1 data cache*/
EDX = 0x20020220; /*L1 instruction cache*/ EDX = 0x20020220; /*L1 instruction cache*/
break; break;
case 0x80000006: /* L2 Cache information */ case 0x80000006: /* L2 Cache information */
EAX = EBX = EDX = 0;
ECX = 0x01004220; ECX = 0x01004220;
break; break;
default: default:
@@ -1832,9 +1839,11 @@ cpu_CPUID(void)
break; break;
case 0x80000000: case 0x80000000:
EAX = 0x80000007; EAX = 0x80000007;
EBX = ECX = EDX = 0;
break; break;
case 0x80000001: case 0x80000001:
EAX = CPUID + 0x100; EAX = CPUID + 0x100;
EBX = ECX = 0;
EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW; EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW;
break; break;
case 0x80000002: /* Processor name string */ case 0x80000002: /* Processor name string */
@@ -1850,17 +1859,20 @@ cpu_CPUID(void)
EDX = 0x00000000; EDX = 0x00000000;
break; break;
case 0x80000005: /* Cache information */ case 0x80000005: /* Cache information */
EAX = 0;
EBX = 0x02800140; /* TLBs */ EBX = 0x02800140; /* TLBs */
ECX = 0x20020220; /* L1 data cache */ ECX = 0x20020220; /* L1 data cache */
EDX = 0x20020220; /* L1 instruction cache */ EDX = 0x20020220; /* L1 instruction cache */
break; break;
case 0x80000006: /* L2 Cache information */ case 0x80000006: /* L2 Cache information */
EAX = EBX = EDX = 0;
if (cpu_s->cpu_type == CPU_K6_3P) if (cpu_s->cpu_type == CPU_K6_3P)
ECX = 0x01004220; ECX = 0x01004220;
else else
ECX = 0x00804220; ECX = 0x00804220;
break; break;
case 0x80000007: /* PowerNow information */ case 0x80000007: /* PowerNow information */
EAX = EBX = ECX = 0;
EDX = 7; EDX = 7;
break; break;
default: default: