From 0e24c8883dd5acc870fe5ed41cca155d76e8d834 Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Thu, 10 Sep 2020 15:48:43 +0300 Subject: [PATCH 1/7] Full Intel 82335 rewrite Fixes black screen when you shadow video RAM. More checks may be required to get MR 82335 to work properly. --- src/chipset/intel_82335.c | 232 +++++++++++++++++++++++++++++++++++ src/include/86box/chipset.h | 2 +- src/machine/m_at_286_386sx.c | 5 +- src/win/Makefile.mingw | 2 +- 4 files changed, 236 insertions(+), 5 deletions(-) create mode 100644 src/chipset/intel_82335.c diff --git a/src/chipset/intel_82335.c b/src/chipset/intel_82335.c new file mode 100644 index 000000000..d07b9cf01 --- /dev/null +++ b/src/chipset/intel_82335.c @@ -0,0 +1,232 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the Intel 82335(KU82335) chipset. + * + * Copyright 2020 Tiseno100 + * + */ + +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include "cpu.h" +#include <86box/timer.h> +#include <86box/io.h> +#include <86box/device.h> +#include <86box/keyboard.h> +#include <86box/mem.h> +#include <86box/fdd.h> +#include <86box/fdc.h> +#include <86box/chipset.h> + + +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include "cpu.h" +#include <86box/timer.h> +#include <86box/io.h> +#include <86box/device.h> +#include <86box/keyboard.h> +#include <86box/mem.h> +#include <86box/fdd.h> +#include <86box/fdc.h> +#include <86box/port_92.h> +#include <86box/chipset.h> + +#define enabled_shadow (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) +#define disabled_shadow (MEM_READ_EXTANY | MEM_WRITE_EXTANY) + +#define rw_shadow (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) +#define ro_shadow (MEM_READ_INTERNAL | MEM_WRITE_DISABLED) + +typedef struct +{ + + uint16_t + reg_22, reg_24, reg_26, reg_28, reg_2a, reg_2c, reg_2e; + +} intel_82335_t; + +#ifdef ENABLE_INTEL_82335_LOG +int intel_82335_do_log = ENABLE_INTEL_82335_LOG; +static void +intel_82335_log(const char *fmt, ...) +{ + va_list ap; + + if (intel_82335_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +#define intel_82335_log(fmt, ...) +#endif + +static void +intel_82335_write(uint16_t addr, uint16_t val, void *priv) +{ + intel_82335_t *dev = (intel_82335_t *) priv; + + uint32_t base, i; + + intel_82335_log("Register %02x: Write %04x\n", addr, val); + + switch (addr) { + + case 0x22: + dev->reg_22 = val; + + if (!(dev->reg_2c & 0x01)) + { + mem_set_mem_state_both(0xa0000, 0x20000, (dev->reg_22 & (0x04 << 8)) ? enabled_shadow : disabled_shadow); + mem_set_mem_state_both(0xc0000, 0x20000, (dev->reg_22 & (0x02 << 8)) ? enabled_shadow : disabled_shadow); + mem_set_mem_state_both(0xe0000, 0x20000, (dev->reg_22 & 0x01) ? enabled_shadow : disabled_shadow); + } + break; + + case 0x24: + dev->reg_24 = val; + break; + + case 0x26: + dev->reg_26 = val; + break; + + case 0x28: + dev->reg_28 = val; + break; + + case 0x2a: + dev->reg_2a = val; + break; + + case 0x2c: + dev->reg_2c = val; + break; + + case 0x2e: + dev->reg_2e = val; + + if(dev->reg_2c & 0x01) + { + for(i=0; i<8; i++) + { + base = 0xc0000 + (i << 15); + mem_set_mem_state_both(base, 0x8000, (dev->reg_2e & (1 << (i+8))) ? ((dev->reg_2e & (1 << i)) ? ro_shadow : rw_shadow) : disabled_shadow); + } + break; + } + + } +} + + +static uint16_t +intel_82335_read(uint16_t addr, void *priv) +{ + intel_82335_t *dev = (intel_82335_t *) priv; + + intel_82335_log("Register %02x: Reading\n", addr); + + switch (addr) { + case 0x22: + return dev->reg_22; + break; + case 0x24: + return dev->reg_24; + break; + case 0x26: + return dev->reg_26; + break; + case 0x28: + return dev->reg_28; + break; + case 0x2a: + return dev->reg_2a; + break; + case 0x2c: + return dev->reg_2c; + break; + case 0x2e: + return dev->reg_2e; + break; + default: + return 0xff; + break; + } +} + + +static void +intel_82335_close(void *priv) +{ + intel_82335_t *dev = (intel_82335_t *) priv; + + free(dev); +} + + +static void * +intel_82335_init(const device_t *info) +{ + intel_82335_t *dev = (intel_82335_t *) malloc(sizeof(intel_82335_t)); + memset(dev, 0, sizeof(intel_82335_t)); + + device_add(&port_92_device); + + dev->reg_22 = 0x00; + dev->reg_24 = 0x00; + dev->reg_26 = 0x00; + dev->reg_28 = 0xf9; + dev->reg_2a = 0x00; + dev->reg_2c = 0x00; + dev->reg_2e = 0x00; + + /* Memory Configuration */ + io_sethandler(0x0022, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev); + + /* Roll Comparison */ + io_sethandler(0x0024, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev); + io_sethandler(0x0026, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev); + + /* Address Range Comparison */ + io_sethandler(0x0028, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev); + io_sethandler(0x002a, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev); + + /* Granuality Enable */ + io_sethandler(0x002c, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev); + + /* Extended Granuality */ + io_sethandler(0x002e, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev); + + return dev; +} + + +const device_t intel_82335_device = { + "Intel 82335", + 0, + 0, + intel_82335_init, intel_82335_close, NULL, + NULL, NULL, NULL, + NULL +}; diff --git a/src/include/86box/chipset.h b/src/include/86box/chipset.h index 36be94044..87549ca2e 100644 --- a/src/include/86box/chipset.h +++ b/src/include/86box/chipset.h @@ -45,7 +45,7 @@ extern const device_t headland_ht18b_device; extern const device_t headland_ht18c_device; /* Intel */ -extern const device_t i82335_device; +extern const device_t intel_82335_device; extern const device_t i420ex_device; extern const device_t i420tx_device; extern const device_t i420zx_device; diff --git a/src/machine/m_at_286_386sx.c b/src/machine/m_at_286_386sx.c index 41f0650b0..46e4487d7 100644 --- a/src/machine/m_at_286_386sx.c +++ b/src/machine/m_at_286_386sx.c @@ -222,7 +222,6 @@ machine_at_px286_init(const machine_t *model) return ret; } - int machine_at_goldstar386_init(const machine_t *model) { @@ -440,7 +439,7 @@ machine_at_shuttle386sx_init(const machine_t *model) machine_at_common_init(model); - device_add(&i82335_device); + device_add(&intel_82335_device); device_add(&keyboard_at_ami_device); device_add(&fdc_at_device); @@ -462,7 +461,7 @@ machine_at_adi386sx_init(const machine_t *model) machine_at_common_init(model); - device_add(&i82335_device); + device_add(&intel_82335_device); device_add(&keyboard_at_ami_device); device_add(&fdc_at_device); diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 80516ca58..c667e9091 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -625,7 +625,7 @@ CPUOBJ := cpu.o cpu_table.o \ x86seg.o x87.o x87_timings.o \ $(DYNARECOBJ) -CHIPSETOBJ := acc2168.o cs8230.o ali1429.o headland.o i82335.o cs4031.o \ +CHIPSETOBJ := acc2168.o cs8230.o ali1429.o headland.o intel_82335.o cs4031.o \ intel_420ex.o intel_4x0.o intel_sio.o intel_piix.o ioapic.o \ neat.o opti495.o opti895.o opti5x7.o scamp.o scat.o via_vt82c49x.o via_vt82c505.o \ sis_85c310.o sis_85c471.o sis_85c496.o opti283.o opti291.o umc491.o \ From 099364332726cef91813f0083e026f2d607b7e99 Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Thu, 10 Sep 2020 19:47:41 +0300 Subject: [PATCH 2/7] Delete the old Intel 82335 code --- src/chipset/i82335.c | 197 ------------------------------------------- 1 file changed, 197 deletions(-) delete mode 100644 src/chipset/i82335.c diff --git a/src/chipset/i82335.c b/src/chipset/i82335.c deleted file mode 100644 index cc14113fd..000000000 --- a/src/chipset/i82335.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * Implementation of the Intel 82335(KU82335) chipset. - * - * - * - * Authors: Sarah Walker, - * Miran Grca, - * - * Copyright 2008-2020 Sarah Walker. - * Copyright 2016-2020 Miran Grca. - * Copyright 2020 Tiseno100 - * - */ - -#include -#include -#include -#include -#include -#include -#define HAVE_STDARG_H -#include <86box/86box.h> -#include "cpu.h" -#include <86box/timer.h> -#include <86box/io.h> -#include <86box/device.h> -#include <86box/keyboard.h> -#include <86box/mem.h> -#include <86box/fdd.h> -#include <86box/fdc.h> -#include <86box/chipset.h> - - -typedef struct -{ - uint8_t reg_22; - uint8_t reg_23; -} i82335_t; - -static uint8_t i82335_read(uint16_t addr, void *priv); - -static void -i82335_write(uint16_t addr, uint8_t val, void *priv) -{ - i82335_t *dev = (i82335_t *) priv; - - int mem_write = 0; - - switch (addr) - { - case 0x22: - if ((val ^ dev->reg_22) & 1) - { - if (val & 1) - { - for (int i = 0; i < 8; i++) - { - mem_set_mem_state(0xe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - shadowbios = 1; - } - } - else - { - for (int i = 0; i < 8; i++) - { - mem_set_mem_state(0xe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - shadowbios = 0; - } - } - - flushmmucache(); - } - - dev->reg_22 = val | 0xd8; - break; - - case 0x23: - dev->reg_23 = val; - - if ((val ^ dev->reg_22) & 2) - { - if (val & 2) - { - for (int i = 0; i < 8; i++) - { - mem_set_mem_state(0xc0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - shadowbios = 1; - } - } - else - { - for (int i = 0; i < 8; i++) - { - mem_set_mem_state(0xc0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - shadowbios = 0; - } - } - } - - if ((val ^ dev->reg_22) & 0xc) - { - if (val & 2) - { - for (int i = 0; i < 8; i++) - { - mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; - mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | mem_write); - shadowbios = 1; - } - } - else - { - for (int i = 0; i < 8; i++) - { - mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY; - mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTANY | mem_write); - shadowbios = 0; - } - } - } - - if ((val ^ dev->reg_22) & 0xe) - { - flushmmucache(); - } - - if (val & 0x80) - { - io_removehandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL); - io_removehandler(0x0023, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL); - } - break; - } -} - - -static uint8_t -i82335_read(uint16_t addr, void *priv) -{ - uint8_t ret = 0xff; - i82335_t *dev = (i82335_t *) priv; - - switch(addr){ - case 0x22: - return dev->reg_22; - break; - case 0x23: - return dev->reg_23; - break; - default: - return 0; - break; - } - - return ret; -} - - -static void -i82335_close(void *priv) -{ - i82335_t *dev = (i82335_t *) priv; - - free(dev); -} - - -static void * -i82335_init(const device_t *info) -{ - i82335_t *dev = (i82335_t *) malloc(sizeof(i82335_t)); - memset(dev, 0, sizeof(i82335_t)); - - dev->reg_22 = 0xd8; - - io_sethandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, dev); - io_sethandler(0x0023, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, dev); - - return dev; -} - - -const device_t i82335_device = { - "Intel 82335", - 0, - 0, - i82335_init, i82335_close, NULL, - NULL, NULL, NULL, - NULL -}; From b36f3be4571053785c9c53b8eeef4dcb796b6fb3 Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Thu, 10 Sep 2020 19:48:18 +0300 Subject: [PATCH 3/7] Fixed soft reset failures of the ADI 386SX --- src/chipset/intel_82335.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/src/chipset/intel_82335.c b/src/chipset/intel_82335.c index d07b9cf01..0eea90f7f 100644 --- a/src/chipset/intel_82335.c +++ b/src/chipset/intel_82335.c @@ -56,6 +56,11 @@ #define rw_shadow (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) #define ro_shadow (MEM_READ_INTERNAL | MEM_WRITE_DISABLED) +#define extended_granuality_enabled (dev->reg_2c & 0x01) +#define determine_video_ram_write_acess ((dev->reg_22 & (0x08 << 8)) ? rw_shadow : ro_shadow) + +#define ENABLE_INTEL_82335_LOG 1 + typedef struct { @@ -95,11 +100,11 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv) case 0x22: dev->reg_22 = val; - if (!(dev->reg_2c & 0x01)) + if (!extended_granuality_enabled) { mem_set_mem_state_both(0xa0000, 0x20000, (dev->reg_22 & (0x04 << 8)) ? enabled_shadow : disabled_shadow); mem_set_mem_state_both(0xc0000, 0x20000, (dev->reg_22 & (0x02 << 8)) ? enabled_shadow : disabled_shadow); - mem_set_mem_state_both(0xe0000, 0x20000, (dev->reg_22 & 0x01) ? enabled_shadow : disabled_shadow); + mem_set_mem_state_both(0xe0000, 0x20000, (dev->reg_22 & 0x01) ? determine_video_ram_write_acess : disabled_shadow); } break; @@ -126,7 +131,7 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv) case 0x2e: dev->reg_2e = val; - if(dev->reg_2c & 0x01) + if(extended_granuality_enabled) { for(i=0; i<8; i++) { @@ -175,7 +180,6 @@ intel_82335_read(uint16_t addr, void *priv) } } - static void intel_82335_close(void *priv) { From 7a075e35e3c351c23e8e519fc49dff1c5f31ce00 Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Thu, 10 Sep 2020 19:50:53 +0300 Subject: [PATCH 4/7] Disable logging --- src/chipset/intel_82335.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/src/chipset/intel_82335.c b/src/chipset/intel_82335.c index 0eea90f7f..68efe84de 100644 --- a/src/chipset/intel_82335.c +++ b/src/chipset/intel_82335.c @@ -57,9 +57,7 @@ #define ro_shadow (MEM_READ_INTERNAL | MEM_WRITE_DISABLED) #define extended_granuality_enabled (dev->reg_2c & 0x01) -#define determine_video_ram_write_acess ((dev->reg_22 & (0x08 << 8)) ? rw_shadow : ro_shadow) - -#define ENABLE_INTEL_82335_LOG 1 +#define determine_video_ram_write_access ((dev->reg_22 & (0x08 << 8)) ? rw_shadow : ro_shadow) typedef struct { @@ -104,7 +102,7 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv) { mem_set_mem_state_both(0xa0000, 0x20000, (dev->reg_22 & (0x04 << 8)) ? enabled_shadow : disabled_shadow); mem_set_mem_state_both(0xc0000, 0x20000, (dev->reg_22 & (0x02 << 8)) ? enabled_shadow : disabled_shadow); - mem_set_mem_state_both(0xe0000, 0x20000, (dev->reg_22 & 0x01) ? determine_video_ram_write_acess : disabled_shadow); + mem_set_mem_state_both(0xe0000, 0x20000, (dev->reg_22 & 0x01) ? determine_video_ram_write_access : disabled_shadow); } break; From 54c569e5bec1649ce91cb436a4042010147d9345 Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Thu, 10 Sep 2020 19:55:11 +0300 Subject: [PATCH 5/7] System ROM shadowing doesn't depend from the selected register. It actually depends on the Video RAM Also seems like the System ROM is RO. RW causes it to hang --- src/chipset/intel_82335.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/chipset/intel_82335.c b/src/chipset/intel_82335.c index 68efe84de..6a3c5309a 100644 --- a/src/chipset/intel_82335.c +++ b/src/chipset/intel_82335.c @@ -100,9 +100,9 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv) if (!extended_granuality_enabled) { - mem_set_mem_state_both(0xa0000, 0x20000, (dev->reg_22 & (0x04 << 8)) ? enabled_shadow : disabled_shadow); + mem_set_mem_state_both(0xa0000, 0x20000, (dev->reg_22 & (0x04 << 8)) ? determine_video_ram_write_access : disabled_shadow); mem_set_mem_state_both(0xc0000, 0x20000, (dev->reg_22 & (0x02 << 8)) ? enabled_shadow : disabled_shadow); - mem_set_mem_state_both(0xe0000, 0x20000, (dev->reg_22 & 0x01) ? determine_video_ram_write_access : disabled_shadow); + mem_set_mem_state_both(0xe0000, 0x20000, (dev->reg_22 & 0x01) ? ro_shadow : disabled_shadow); } break; From 2e7781505aa8918a1c6a2f1808b1ecc4d665e41f Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Thu, 10 Sep 2020 23:56:51 +0300 Subject: [PATCH 6/7] Added more 82335 parts Registers are treated with an array instead of separate values. Minor Shadowing changes and also implemented the chipset lock mechanism fixing the ADI soft reset issue properly. --- src/chipset/intel_82335.c | 115 +++++++++----------------------------- 1 file changed, 26 insertions(+), 89 deletions(-) diff --git a/src/chipset/intel_82335.c b/src/chipset/intel_82335.c index 6a3c5309a..761020921 100644 --- a/src/chipset/intel_82335.c +++ b/src/chipset/intel_82335.c @@ -12,25 +12,6 @@ * */ -#include -#include -#include -#include -#include -#include -#define HAVE_STDARG_H -#include <86box/86box.h> -#include "cpu.h" -#include <86box/timer.h> -#include <86box/io.h> -#include <86box/device.h> -#include <86box/keyboard.h> -#include <86box/mem.h> -#include <86box/fdd.h> -#include <86box/fdc.h> -#include <86box/chipset.h> - - #include #include #include @@ -50,20 +31,21 @@ #include <86box/port_92.h> #include <86box/chipset.h> -#define enabled_shadow (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) #define disabled_shadow (MEM_READ_EXTANY | MEM_WRITE_EXTANY) - #define rw_shadow (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) #define ro_shadow (MEM_READ_INTERNAL | MEM_WRITE_DISABLED) -#define extended_granuality_enabled (dev->reg_2c & 0x01) -#define determine_video_ram_write_access ((dev->reg_22 & (0x08 << 8)) ? rw_shadow : ro_shadow) +#define extended_granuality_enabled (dev->regs[0x2c] & 0x01) +#define determine_video_ram_write_access ((dev->regs[0x22] & (0x08 << 8)) ? rw_shadow : ro_shadow) + +#define ENABLE_INTEL_82335_LOG 1 typedef struct { - uint16_t - reg_22, reg_24, reg_26, reg_28, reg_2a, reg_2c, reg_2e; + uint16_t regs[256], + + cfg_locked; } intel_82335_t; @@ -88,58 +70,40 @@ static void intel_82335_write(uint16_t addr, uint16_t val, void *priv) { intel_82335_t *dev = (intel_82335_t *) priv; - uint32_t base, i; + dev->regs[addr] = val; + + dev->cfg_locked = (dev->regs[0x22] & (0x80 << 8)); + + if(!dev->cfg_locked) + { + intel_82335_log("Register %02x: Write %04x\n", addr, val); switch (addr) { - case 0x22: - dev->reg_22 = val; - if (!extended_granuality_enabled) { - mem_set_mem_state_both(0xa0000, 0x20000, (dev->reg_22 & (0x04 << 8)) ? determine_video_ram_write_access : disabled_shadow); - mem_set_mem_state_both(0xc0000, 0x20000, (dev->reg_22 & (0x02 << 8)) ? enabled_shadow : disabled_shadow); - mem_set_mem_state_both(0xe0000, 0x20000, (dev->reg_22 & 0x01) ? ro_shadow : disabled_shadow); + mem_set_mem_state_both(0xa0000, 0x20000, (dev->regs[0x22] & (0x04 << 8)) ? determine_video_ram_write_access : disabled_shadow); + mem_set_mem_state_both(0xc0000, 0x20000, (dev->regs[0x22] & (0x02 << 8)) ? rw_shadow : disabled_shadow); + mem_set_mem_state_both(0xe0000, 0x20000, (dev->regs[0x22] & 0x01) ? rw_shadow : disabled_shadow); } - break; - - case 0x24: - dev->reg_24 = val; - break; - - case 0x26: - dev->reg_26 = val; - break; - - case 0x28: - dev->reg_28 = val; - break; - - case 0x2a: - dev->reg_2a = val; - break; - - case 0x2c: - dev->reg_2c = val; break; case 0x2e: - dev->reg_2e = val; - if(extended_granuality_enabled) { for(i=0; i<8; i++) { base = 0xc0000 + (i << 15); - mem_set_mem_state_both(base, 0x8000, (dev->reg_2e & (1 << (i+8))) ? ((dev->reg_2e & (1 << i)) ? ro_shadow : rw_shadow) : disabled_shadow); + mem_set_mem_state_both(base, 0x8000, (dev->regs[0x2e] & (1 << (i+8))) ? ((dev->regs[0x2e] & (1 << i)) ? ro_shadow : rw_shadow) : disabled_shadow); } break; } - } + } + } @@ -150,32 +114,8 @@ intel_82335_read(uint16_t addr, void *priv) intel_82335_log("Register %02x: Reading\n", addr); - switch (addr) { - case 0x22: - return dev->reg_22; - break; - case 0x24: - return dev->reg_24; - break; - case 0x26: - return dev->reg_26; - break; - case 0x28: - return dev->reg_28; - break; - case 0x2a: - return dev->reg_2a; - break; - case 0x2c: - return dev->reg_2c; - break; - case 0x2e: - return dev->reg_2e; - break; - default: - return 0xff; - break; - } + return dev->regs[addr]; + } static void @@ -194,14 +134,11 @@ intel_82335_init(const device_t *info) memset(dev, 0, sizeof(intel_82335_t)); device_add(&port_92_device); + memset(dev->regs, 0, sizeof(dev->regs)); - dev->reg_22 = 0x00; - dev->reg_24 = 0x00; - dev->reg_26 = 0x00; - dev->reg_28 = 0xf9; - dev->reg_2a = 0x00; - dev->reg_2c = 0x00; - dev->reg_2e = 0x00; + dev->regs[0x28] = 0xf9; + + dev->cfg_locked = 1; /* Memory Configuration */ io_sethandler(0x0022, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev); From f582d4b432730ff1e4250ee9548c37e5d668291e Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Fri, 11 Sep 2020 00:08:57 +0300 Subject: [PATCH 7/7] Disabled logging again --- src/chipset/intel_82335.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/chipset/intel_82335.c b/src/chipset/intel_82335.c index 761020921..e02a40164 100644 --- a/src/chipset/intel_82335.c +++ b/src/chipset/intel_82335.c @@ -38,8 +38,6 @@ #define extended_granuality_enabled (dev->regs[0x2c] & 0x01) #define determine_video_ram_write_access ((dev->regs[0x22] & (0x08 << 8)) ? rw_shadow : ro_shadow) -#define ENABLE_INTEL_82335_LOG 1 - typedef struct {