diff --git a/src/chipset/chipset.h b/src/chipset/chipset.h
index 61ea87401..057df0cdb 100644
--- a/src/chipset/chipset.h
+++ b/src/chipset/chipset.h
@@ -47,16 +47,15 @@ extern const device_t i440fx_device;
extern const device_t i440bx_device;
extern const device_t i440zx_device;
-/* NEAT */
-extern const device_t neat_device;
-
/* OPTi */
extern const device_t opti495_device;
-/* SCAT */
+/* C&T */
+extern const device_t neat_device;
extern const device_t scat_device;
extern const device_t scat_4_device;
extern const device_t scat_sx_device;
+extern const device_t cs8230_device;
/* SiS */
extern const device_t sis_85c471_device;
diff --git a/src/chipset/cs8230.c b/src/chipset/cs8230.c
new file mode 100644
index 000000000..9cd32551b
--- /dev/null
+++ b/src/chipset/cs8230.c
@@ -0,0 +1,145 @@
+/*
+ * 86Box A hypervisor and IBM PC system emulator that specializes in
+ * running old operating systems and software designed for IBM
+ * PC systems and compatibles from 1981 through fairly recent
+ * system designs based on the PCI bus.
+ *
+ * This file is part of the 86Box distribution.
+ *
+ * Emulation of C&T CS8230 ("386/AT") chipset.
+ *
+ *
+ *
+ * Authors: Sarah Walker,
+ *
+ * Copyright 2020 Sarah Walker.
+ */
+#include
+#include
+#include
+#include
+#include
+#include "86box.h"
+#include "cpu.h"
+#include "timer.h"
+#include "86box_io.h"
+#include "device.h"
+#include "mem.h"
+#include "fdd.h"
+#include "fdc.h"
+#include "chipset.h"
+
+
+static struct
+{
+ int idx;
+ uint8_t regs[256];
+} cs8230;
+
+static void shadow_control(uint32_t addr, uint32_t size, int state)
+{
+// pclog("shadow_control: addr=%08x size=%04x state=%02x\n", addr, size, state);
+ switch (state)
+ {
+ case 0x00:
+ mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
+ break;
+ case 0x01:
+ mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
+ break;
+ case 0x10:
+ mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTANY);
+ break;
+ case 0x11:
+ mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
+ break;
+ }
+ flushmmucache_nopc();
+}
+
+
+static void rethink_shadow_mappings(void)
+{
+ int c;
+
+ for (c = 0; c < 4*8; c++) /*Addresses 40000-bffff in 16k blocks*/
+ {
+ if (cs8230.regs[0xa + (c >> 3)] & (1 << (c & 7)))
+ mem_set_mem_state(0x40000 + c*0x4000, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); /*IO channel*/
+ else
+ mem_set_mem_state(0x40000 + c*0x4000, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); /*System board*/
+ }
+ for (c = 0; c < 2*8; c++) /*Addresses c0000-fffff in 16k blocks. System board ROM can be mapped here*/
+ {
+ if (cs8230.regs[0xe + (c >> 3)] & (1 << (c & 7)))
+ mem_set_mem_state(0xc0000 + c*0x4000, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); /*IO channel*/
+ else
+ shadow_control(0xc0000 + c*0x4000, 0x4000, (cs8230.regs[9] >> (3-(c >> 2))) & 0x11);
+ }
+}
+
+static uint8_t cs8230_read(uint16_t port, void *p)
+{
+ uint8_t ret = 0xff;
+
+ if (port & 1)
+ {
+ switch (cs8230.idx)
+ {
+ case 0x04: /*82C301 ID/version*/
+ ret = cs8230.regs[cs8230.idx] & ~0xe3;
+ break;
+
+ case 0x08: /*82C302 ID/Version*/
+ ret = cs8230.regs[cs8230.idx] & ~0xe0;
+ break;
+
+ case 0x05: case 0x06: /*82C301 registers*/
+ case 0x09: case 0x0a: case 0x0b: case 0x0c: /*82C302 registers*/
+ case 0x0d: case 0x0e: case 0x0f:
+ case 0x10: case 0x11: case 0x12: case 0x13:
+ case 0x28: case 0x29: case 0x2a:
+ ret = cs8230.regs[cs8230.idx];
+ break;
+ }
+ }
+
+ return ret;
+}
+
+static void cs8230_write(uint16_t port, uint8_t val, void *p)
+{
+ if (!(port & 1))
+ cs8230.idx = val;
+ else
+ {
+// pclog("cs8230_write: reg=%02x val=%02x\n", cs8230.idx, val);
+ cs8230.regs[cs8230.idx] = val;
+ switch (cs8230.idx)
+ {
+ case 0x09: /*RAM/ROM Configuration in boot area*/
+ case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: /*Address maps*/
+// rethink_shadow_mappings();
+ break;
+ }
+ }
+}
+
+static void * cs8230_init(const device_t *info)
+{
+ memset(&cs8230, 0, sizeof(cs8230));
+
+ io_sethandler(0x0022, 0x0002,
+ cs8230_read, NULL, NULL,
+ cs8230_write, NULL, NULL,
+ NULL);
+}
+
+const device_t cs8230_device = {
+ "C&T CS8230 (386/AT)",
+ 0,
+ 0,
+ cs8230_init, NULL, NULL,
+ NULL, NULL, NULL,
+ NULL
+};
\ No newline at end of file
diff --git a/src/chipset/cs8230.h b/src/chipset/cs8230.h
new file mode 100644
index 000000000..ed7dedc4b
--- /dev/null
+++ b/src/chipset/cs8230.h
@@ -0,0 +1 @@
+void cs8230_init(void);
diff --git a/src/machine/m_at_386dx_486.c b/src/machine/m_at_386dx_486.c
index e36e4876c..b0230854e 100644
--- a/src/machine/m_at_386dx_486.c
+++ b/src/machine/m_at_386dx_486.c
@@ -41,7 +41,36 @@
#include "intel_flash.h"
#include "intel_sio.h"
#include "machine.h"
+static void
+machine_at_cs8230_init(const machine_t *model)
+{
+ machine_at_common_init(model);
+
+ device_add(&cs8230_device);
+
+}
+
+
+int
+machine_at_ecs386_init(const machine_t *model)
+{
+ int ret;
+
+ ret = bios_load_interleaved(L"roms/machines/ecs386/AMI BIOS for ECS-386_32 motherboard - L chip.bin",
+ L"roms/machines/ecs386/AMI BIOS for ECS-386_32 motherboard - H chip.bin",
+ 0x000f0000, 65536, 0);
+
+ if (bios_only || !ret)
+ return ret;
+
+ machine_at_cs8230_init(model);
+
+ device_add(&keyboard_at_ami_device);
+ device_add(&fdc_at_device);
+
+ return ret;
+}
int
machine_at_pb410a_init(const machine_t *model)
diff --git a/src/machine/machine.h b/src/machine/machine.h
index 48fac0728..61cac0923 100644
--- a/src/machine/machine.h
+++ b/src/machine/machine.h
@@ -210,6 +210,9 @@ extern const device_t *at_commodore_sl386sx_get_device(void);
#endif
/* m_at_386dx_486.c */
+
+extern int machine_at_ecs386_init(const machine_t *);
+
extern int machine_at_pb410a_init(const machine_t *);
extern int machine_at_ali1429_init(const machine_t *);
diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c
index f5721ad83..cca655def 100644
--- a/src/machine/machine_table.c
+++ b/src/machine/machine_table.c
@@ -144,6 +144,7 @@ const machine_t machines[] = {
{ "[386SX MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"IBM",cpus_IBM486SLC},{"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL },
+ { "[386DX ISA] ECS 386/32", "ecs386", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}},MACHINE_ISA | MACHINE_AT, 512,16384, 512, 127, machine_at_ecs386_init, NULL },
{ "[386DX ISA] Dataexpert SX495 (386DX)", "ami386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_ami_init, NULL },
{ "[386DX ISA] Award 386DX clone", "award386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_init, NULL },
#if defined(DEV_BRANCH) && defined(USE_MR495)