80486DX2-66/86Box-fork
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Inverted the operation of the OPTi 495 A20 control bit and made the AT keyboard controller (8042) as well as memory default to A20 off - makes both the MR 386 DX and the Award 386 and 486 clones work correctly;

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The Amstrad MegaPC now correctly initializes the internal Paradise WD90C11 graphics card, making the machine work again.
This commit is contained in:
OBattler
2018-01-04 01:57:55 +01:00
parent 412ae3726b
commit 9b2705eb9f
4 changed files with 14 additions and 13 deletions
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10
src/keyboard_at.c
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@@ -8,7 +8,7 @@
* *
* Intel 8042 (AT keyboard controller) emulation. * Intel 8042 (AT keyboard controller) emulation.
* *
* Version: @(#)keyboard_at.c 1.0.13 2018/01/01 * Version: @(#)keyboard_at.c 1.0.14 2018/01/04
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -964,12 +964,12 @@ bad_command:
kbd->mem[0] |= 0x04; kbd->mem[0] |= 0x04;
kbd_adddata(0x55); kbd_adddata(0x55);
/*Self-test also resets the output port, enabling A20*/ /*Self-test also resets the output port, enabling A20*/
if (!(kbd->output_port & 0x02)) { if (kbd->output_port & 0x02) {
mem_a20_key = 2; mem_a20_key = 0;
mem_a20_recalc(); mem_a20_recalc();
flushmmucache(); flushmmucache();
} }
kbd->output_port = 0xcf; kbd->output_port = 0xcd;
break; break;
case 0xab: /*Interface test*/ case 0xab: /*Interface test*/
@@ -1276,7 +1276,7 @@ kbd_reset(void *priv)
kbd->mem[0] = 0x11; kbd->mem[0] = 0x11;
kbd->default_mode = 0x02; kbd->default_mode = 0x02;
kbd->wantirq = 0; kbd->wantirq = 0;
kbd->output_port = 0xcf; kbd->output_port = 0xcd;
kbd->input_port = (MDA) ? 0xf0 : 0xb0; kbd->input_port = (MDA) ? 0xf0 : 0xb0;
kbd->out_new = -1; kbd->out_new = -1;
kbd->last_irq = 0; kbd->last_irq = 0;

3
src/machine/m_at_opti495.c
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@@ -294,7 +294,8 @@ static void opti495_write(uint16_t addr, uint8_t val, void *p)
} }
if (optireg == 0x27) if (optireg == 0x27)
{ {
mem_a20_key = (val & 0x80) ? 0x00 : 0x02; // mem_a20_alt = (val & 0x80) ? 0x00 : 0x02;
mem_a20_alt = (val & 0x80);
mem_a20_recalc(); mem_a20_recalc();
flushmmucache(); flushmmucache();
} }

4
src/machine/m_at_wd76c10.c
View File

@@ -6,11 +6,13 @@
#include <string.h> #include <string.h>
#include <wchar.h> #include <wchar.h>
#include "../86box.h" #include "../86box.h"
#include "../device.h"
#include "../io.h" #include "../io.h"
#include "../mem.h" #include "../mem.h"
#include "../serial.h" #include "../serial.h"
#include "../floppy/floppy.h" #include "../floppy/floppy.h"
#include "../floppy/fdc.h" #include "../floppy/fdc.h"
#include "../video/vid_paradise.h"
#include "machine.h" #include "machine.h"
@@ -141,4 +143,6 @@ machine_at_wd76c10_init(machine_t *model)
machine_at_ide_init(model); machine_at_ide_init(model);
wd76c10_init(); wd76c10_init();
device_add(&paradise_wd90c11_megapc_device);
} }

10
src/mem.c
View File

@@ -1358,12 +1358,12 @@ void mem_add_bios()
} }
int mem_a20_key = 0, mem_a20_alt = 0; int mem_a20_key = 0, mem_a20_alt = 0;
int mem_a20_state = 1; int mem_a20_state = 0;
void mem_a20_init(void) void mem_a20_init(void)
{ {
if (AT) { if (AT) {
rammask = cpu_16bitbus ? 0xffffff : 0xffffffff; rammask = cpu_16bitbus ? 0xefffff : 0xffefffff;
flushmmucache(); flushmmucache();
mem_a20_state = mem_a20_key | mem_a20_alt; mem_a20_state = mem_a20_key | mem_a20_alt;
} else { } else {
@@ -1461,8 +1461,6 @@ void mem_init(void)
mem_mapping_add(&ram_split_mapping, mem_size * 1024, 384 * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + (1 << 20), MEM_MAPPING_INTERNAL, NULL); mem_mapping_add(&ram_split_mapping, mem_size * 1024, 384 * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + (1 << 20), MEM_MAPPING_INTERNAL, NULL);
mem_mapping_disable(&ram_split_mapping); mem_mapping_disable(&ram_split_mapping);
mem_a20_key = 2;
mem_a20_alt = 0;
mem_a20_init(); mem_a20_init();
} }
@@ -1635,8 +1633,6 @@ void mem_resize()
mem_mapping_add(&ram_split_mapping, mem_size * 1024, 384 * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + (1 << 20), MEM_MAPPING_INTERNAL, NULL); mem_mapping_add(&ram_split_mapping, mem_size * 1024, 384 * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + (1 << 20), MEM_MAPPING_INTERNAL, NULL);
mem_mapping_disable(&ram_split_mapping); mem_mapping_disable(&ram_split_mapping);
mem_a20_key = 2;
mem_a20_alt = 0;
mem_a20_init(); mem_a20_init();
} }
@@ -1691,7 +1687,7 @@ static void port_92_write(uint16_t port, uint8_t val, void *priv)
{ {
if ((mem_a20_alt ^ val) & 2) if ((mem_a20_alt ^ val) & 2)
{ {
mem_a20_alt = val & 2; mem_a20_alt = (val & 2) ? 0 : 2;
mem_a20_recalc(); mem_a20_recalc();
} }