From 9ed2456ebb44aba712c6a49c0efe92e3e943b4e8 Mon Sep 17 00:00:00 2001
From: Panagiotis <58827426+tiseno100@users.noreply.github.com>
Date: Wed, 13 Jan 2021 16:13:07 +0200
Subject: [PATCH] Minor changes on the ALi's & few other chipsets.

---
 src/chipset/ali1217.c     | 5 +++++
 src/chipset/ali1531.c     | 5 +++++
 src/chipset/intel_82335.c | 4 ++--
 src/chipset/sis_5571.c    | 6 +++---
 4 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/src/chipset/ali1217.c b/src/chipset/ali1217.c
index dd9fab4e6..97410a224 100644
--- a/src/chipset/ali1217.c
+++ b/src/chipset/ali1217.c
@@ -62,6 +62,11 @@ static void ali1217_shadow_recalc(ali1217_t *dev)
         mem_set_mem_state_both(0xc0000 + (i << 15), 0x8000, ((dev->regs[0x14] & (1 << (i * 2))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x14] & (1 << ((i * 2) + 1))) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
         mem_set_mem_state_both(0xe0000 + (i << 15), 0x8000, ((dev->regs[0x15] & (1 << (i * 2))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x15] & (1 << ((i * 2) + 1))) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
     }
+
+    shadowbios = !!(dev->regs[0x15] & 5);
+    shadowbios_write = !!(dev->regs[0x15] & 0x0a);
+    
+    flushmmucache();
 }
 
 static void
diff --git a/src/chipset/ali1531.c b/src/chipset/ali1531.c
index f725d6bec..23a4f2564 100644
--- a/src/chipset/ali1531.c
+++ b/src/chipset/ali1531.c
@@ -48,6 +48,11 @@ void ali1531_shadow_recalc(ali1531_t *dev)
         mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, (((dev->pci_conf[0x4c] >> i) & 1) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | (((dev->pci_conf[0x4e] >> i) & 1) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
         mem_set_mem_state_both(0xe0000 + (i << 14), 0x4000, (((dev->pci_conf[0x4d] >> i) & 1) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | (((dev->pci_conf[0x4f] >> i) & 1) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
     }
+
+    shadowbios = !!(dev->pci_conf[0x4d] & 0xf0);
+    shadowbios_write = !!(dev->pci_conf[0x4f] & 0xf0);
+
+    flushmmucache();
 }
 
 void ali1531_smm_recalc(uint8_t smm_state, ali1531_t *dev)
diff --git a/src/chipset/intel_82335.c b/src/chipset/intel_82335.c
index f64da0330..edb8f266a 100644
--- a/src/chipset/intel_82335.c
+++ b/src/chipset/intel_82335.c
@@ -104,8 +104,8 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv)
 
     if (!EXTENDED_GRANULARITY_ENABLED)
     {
-    shadowbios = (dev->regs[0x22] & 0x01);
-    shadowbios_write = (dev->regs[0x22] & 0x01);
+    shadowbios = !!(dev->regs[0x22] & 0x01);
+    shadowbios_write = !!(dev->regs[0x22] & 0x01);
 
     /* Base System 512/640KB set */
     mem_set_mem_state_both(0x80000, 0x20000, (dev->regs[0x22] & 0x08) ? ENABLE_TOP_128KB : DISABLE_TOP_128KB);
diff --git a/src/chipset/sis_5571.c b/src/chipset/sis_5571.c
index 69cc13ace..254aa5c4f 100644
--- a/src/chipset/sis_5571.c
+++ b/src/chipset/sis_5571.c
@@ -88,8 +88,8 @@ sis_5571_shadow_recalc(sis_5571_t *dev)
 
 	can_read = (dev->pci_conf[0x76] & 0x80) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
 	can_write = (dev->pci_conf[0x76] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
-	shadowbios = (dev->pci_conf[0x76] & 0x80);
-	shadowbios_write = (dev->pci_conf[0x76] & 0x20);
+	shadowbios = !!(dev->pci_conf[0x76] & 0x80);
+	shadowbios_write = !!(dev->pci_conf[0x76] & 0x20);
 	mem_set_mem_state_both(0xf0000, 0x10000, can_read | can_write);
 
 	flushmmucache();
@@ -212,7 +212,7 @@ memory_pci_bridge_write(int func, int addr, uint8_t val, void *priv)
 
 	case 0x51: /* Cache */
 		dev->pci_conf[addr] = val;
-		cpu_cache_ext_enabled = (val & 0x40);
+		cpu_cache_ext_enabled = !!(val & 0x40);
 		cpu_update_waitstates();
 		break;