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Use the correct UNIX encoding on the i82335

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For some reason it was CR LF
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tiseno100
2020-06-23 17:20:22 +03:00
committed by GitHub
parent 30bbdcd04c
commit a369dfa12d
1 changed files with 197 additions and 197 deletions
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394
src/chipset/i82335.c
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@@ -1,197 +1,197 @@
/* /*
* 86Box A hypervisor and IBM PC system emulator that specializes in * 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM * running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent * PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus. * system designs based on the PCI bus.
* *
* This file is part of the 86Box distribution. * This file is part of the 86Box distribution.
* *
* Implementation of the Intel 82335(KU82335) chipset. * Implementation of the Intel 82335(KU82335) chipset.
* *
* *
* *
* Authors: Sarah Walker, <tommowalker@tommowalker.co.uk> * Authors: Sarah Walker, <tommowalker@tommowalker.co.uk>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
* *
* Copyright 2008-2020 Sarah Walker. * Copyright 2008-2020 Sarah Walker.
* Copyright 2016-2020 Miran Grca. * Copyright 2016-2020 Miran Grca.
* Copyright 2020 Tiseno100 * Copyright 2020 Tiseno100
* *
*/ */
#include <stdarg.h> #include <stdarg.h>
#include <stdint.h> #include <stdint.h>
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
#include <wchar.h> #include <wchar.h>
#define HAVE_STDARG_H #define HAVE_STDARG_H
#include <86box/86box.h> #include <86box/86box.h>
#include "cpu.h" #include "cpu.h"
#include <86box/timer.h> #include <86box/timer.h>
#include <86box/io.h> #include <86box/io.h>
#include <86box/device.h> #include <86box/device.h>
#include <86box/keyboard.h> #include <86box/keyboard.h>
#include <86box/mem.h> #include <86box/mem.h>
#include <86box/fdd.h> #include <86box/fdd.h>
#include <86box/fdc.h> #include <86box/fdc.h>
#include <86box/chipset.h> #include <86box/chipset.h>
typedef struct typedef struct
{ {
uint8_t reg_22; uint8_t reg_22;
uint8_t reg_23; uint8_t reg_23;
} i82335_t; } i82335_t;
static uint8_t i82335_read(uint16_t addr, void *priv); static uint8_t i82335_read(uint16_t addr, void *priv);
static void static void
i82335_write(uint16_t addr, uint8_t val, void *priv) i82335_write(uint16_t addr, uint8_t val, void *priv)
{ {
i82335_t *dev = (i82335_t *) priv; i82335_t *dev = (i82335_t *) priv;
int mem_write = 0; int mem_write = 0;
switch (addr) switch (addr)
{ {
case 0x22: case 0x22:
if ((val ^ dev->reg_22) & 1) if ((val ^ dev->reg_22) & 1)
{ {
if (val & 1) if (val & 1)
{ {
for (int i = 0; i < 8; i++) for (int i = 0; i < 8; i++)
{ {
mem_set_mem_state(0xe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); mem_set_mem_state(0xe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
shadowbios = 1; shadowbios = 1;
} }
} }
else else
{ {
for (int i = 0; i < 8; i++) for (int i = 0; i < 8; i++)
{ {
mem_set_mem_state(0xe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); mem_set_mem_state(0xe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
shadowbios = 0; shadowbios = 0;
} }
} }
flushmmucache(); flushmmucache();
} }
dev->reg_22 = val | 0xd8; dev->reg_22 = val | 0xd8;
break; break;
case 0x23: case 0x23:
dev->reg_23 = val; dev->reg_23 = val;
if ((val ^ dev->reg_22) & 2) if ((val ^ dev->reg_22) & 2)
{ {
if (val & 2) if (val & 2)
{ {
for (int i = 0; i < 8; i++) for (int i = 0; i < 8; i++)
{ {
mem_set_mem_state(0xc0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); mem_set_mem_state(0xc0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
shadowbios = 1; shadowbios = 1;
} }
} }
else else
{ {
for (int i = 0; i < 8; i++) for (int i = 0; i < 8; i++)
{ {
mem_set_mem_state(0xc0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); mem_set_mem_state(0xc0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
shadowbios = 0; shadowbios = 0;
} }
} }
} }
if ((val ^ dev->reg_22) & 0xc) if ((val ^ dev->reg_22) & 0xc)
{ {
if (val & 2) if (val & 2)
{ {
for (int i = 0; i < 8; i++) for (int i = 0; i < 8; i++)
{ {
mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | mem_write); mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | mem_write);
shadowbios = 1; shadowbios = 1;
} }
} }
else else
{ {
for (int i = 0; i < 8; i++) for (int i = 0; i < 8; i++)
{ {
mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY; mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY;
mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTANY | mem_write); mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTANY | mem_write);
shadowbios = 0; shadowbios = 0;
} }
} }
} }
if ((val ^ dev->reg_22) & 0xe) if ((val ^ dev->reg_22) & 0xe)
{ {
flushmmucache(); flushmmucache();
} }
if (val & 0x80) if (val & 0x80)
{ {
io_removehandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL); io_removehandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL);
io_removehandler(0x0023, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL); io_removehandler(0x0023, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL);
} }
break; break;
} }
} }
static uint8_t static uint8_t
i82335_read(uint16_t addr, void *priv) i82335_read(uint16_t addr, void *priv)
{ {
uint8_t ret = 0xff; uint8_t ret = 0xff;
i82335_t *dev = (i82335_t *) priv; i82335_t *dev = (i82335_t *) priv;
switch(addr){ switch(addr){
case 0x22: case 0x22:
return dev->reg_22; return dev->reg_22;
break; break;
case 0x23: case 0x23:
return dev->reg_23; return dev->reg_23;
break; break;
default: default:
return 0; return 0;
break; break;
} }
return ret; return ret;
} }
static void static void
i82335_close(void *priv) i82335_close(void *priv)
{ {
i82335_t *dev = (i82335_t *) priv; i82335_t *dev = (i82335_t *) priv;
free(dev); free(dev);
} }
static void * static void *
i82335_init(const device_t *info) i82335_init(const device_t *info)
{ {
i82335_t *dev = (i82335_t *) malloc(sizeof(i82335_t)); i82335_t *dev = (i82335_t *) malloc(sizeof(i82335_t));
memset(dev, 0, sizeof(i82335_t)); memset(dev, 0, sizeof(i82335_t));
dev->reg_22 = 0xd8; dev->reg_22 = 0xd8;
io_sethandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, dev); io_sethandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, dev);
io_sethandler(0x0023, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, dev); io_sethandler(0x0023, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, dev);
return dev; return dev;
} }
const device_t i82335_device = { const device_t i82335_device = {
"Intel 82335", "Intel 82335",
0, 0,
0, 0,
i82335_init, i82335_close, NULL, i82335_init, i82335_close, NULL,
NULL, NULL, NULL, NULL, NULL, NULL,
NULL NULL
}; };