Merge branch 'master' of github.com:86Box/86Box into tc1995

README.md

@@ -1,9 +1,8 @@
 86Box
 =====
-**86Box** is a hypervisor and IBM PC system emulator that specializes in
+**86Box** is an IBM PC system emulator that specializes in running old
-running old operating systems and software designed for IBM PC systems and
+operating systems and software designed for IBM PC systems and compatibles
-compatibles from 1981 through fairly recent system designs based on the
+from 1981 through fairly recent system designs based on the PCI bus.
-PCI bus.
 
 86Box is released under the GNU General Public License, version 2 or later.
 For more information, see the `COPYING` file.
@@ -24,7 +23,7 @@ to retro computing and, of course, 86Box. We look forward to hearing from you!
 
 Getting started
 ---------------
-See [this](https://86box.github.io/gettingstarted) page on our website for a quick guide that should help you get started with the emulator.
+See [our documentation](https://86box.readthedocs.io/en/latest/index.html) for an overview of the emulator's features and user interface.
 
 Building
 --------

src/acpi.c

@@ -388,12 +388,6 @@ acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p)
 	case 0x04: case 0x05:
 		/* PMCNTRL - Power Management Control Register (IO) */
 		dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3c07;
-		/* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
-		if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) {
-			dev->regs.glbsts |= 0x01;
-			if (dev->regs.glben & 0x02)
-				acpi_raise_smi(dev);
-		}
 		if (dev->regs.pmcntrl & 0x2000) {
 			sus_typ = (dev->regs.pmcntrl >> 10) & 7;
 			switch (sus_typ) {

src/chipset/ali1429.c

@@ -6,103 +6,144 @@
  *
  *		This file is part of the 86Box distribution.
  *
- *		Implementation of the ALi M-1429/1431 chipset.
+ *		Implementation of the ALi M1429 chipset.
  *
+ *      Note: This chipset has no datasheet, everything were done via
+ *      reverse engineering the BIOS of various machines using it.
  *
+ *      Authors: Tiseno100
  *
- * Authors:	Sarah Walker, <tommowalker@tommowalker.co.uk>
+ *		Copyright 2020 Tiseno100
- *		Miran Grca, <mgrca8@gmail.com>
  *
- *		Copyright 2008-2019 Sarah Walker.
- *		Copyright 2016-2019 Miran Grca.
  */
-#include <stdio.h>
+
+#include <stdarg.h>
 #include <stdint.h>
+#include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
 #include <wchar.h>
+#define HAVE_STDARG_H
 #include <86box/86box.h>
 #include "cpu.h"
 #include <86box/timer.h>
 #include <86box/io.h>
-#include <86box/mem.h>
 #include <86box/device.h>
 #include <86box/keyboard.h>
+#include <86box/mem.h>
 #include <86box/fdd.h>
 #include <86box/fdc.h>
-#include <86box/hdc.h>
-#include <86box/hdc_ide.h>
-#include <86box/timer.h>
 #include <86box/port_92.h>
 #include <86box/chipset.h>
 
+#define disabled_shadow (MEM_READ_EXTANY | MEM_WRITE_EXTANY)
+
+#ifdef ENABLE_ALI1429_LOG
+int ali1429_do_log = ENABLE_ALI1429_LOG;
+static void
+ali1429_log(const char *fmt, ...)
+{
+    va_list ap;
+
+    if (ali1429_do_log) {
+	va_start(ap, fmt);
+	pclog_ex(fmt, ap);
+	va_end(ap);
+    }
+}
+#else
+#define ali1429_log(fmt, ...)
+#endif
+
 
 typedef struct
 {
-    uint8_t cur_reg,
+    uint8_t	index, cfg_locked,
-	    regs[256];
+	regs[256];
 } ali1429_t;
 
-
+static void ali1429_shadow_recalc(ali1429_t *dev)
-static void
-ali1429_recalc(ali1429_t *dev)
 {
-    uint32_t base;
-    uint32_t i, shflags = 0;
 
-    shadowbios = 0;
+uint32_t base, i, can_write, can_read;
-    shadowbios_write = 0;
 
-    for (i = 0; i < 8; i++) {
+shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01);
-	base = 0xc0000 + (i << 15);
+shadowbios_write = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x02);
 
-	if (dev->regs[0x13] & (1 << i)) {
+can_write = (dev->regs[0x14] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
-		shadowbios |= (base >= 0xe8000) && !!(dev->regs[0x14] & 0x01);
+can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
-		shadowbios_write |= (base >= 0xe8000) && !!(dev->regs[0x14] & 0x02);
+
-		shflags = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
+for(i = 0; i < 8; i++)
-		shflags |= !(dev->regs[0x14] & 0x02) ? MEM_WRITE_EXTANY : MEM_WRITE_INTERNAL;
+{
-		mem_set_mem_state(base, 0x8000, shflags);
+base = 0xc0000 + (i << 15);
-	} else
+
-		mem_set_mem_state(base, 0x8000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
+if(dev->regs[0x13] & (1 << i))
-    }
+mem_set_mem_state_both(base, 0x8000, can_read | can_write);
+else
+mem_set_mem_state_both(base, 0x8000, disabled_shadow);
 
-    flushmmucache();
 }
 
+flushmmucache();
+}
 
 static void
-ali1429_write(uint16_t port, uint8_t val, void *priv)
+ali1429_write(uint16_t addr, uint8_t val, void *priv)
 {
     ali1429_t *dev = (ali1429_t *) priv;
 
-    if (port & 1) {
+    switch (addr) {
-	dev->regs[dev->cur_reg] = val;
+	case 0x22:
+		dev->index = val;
+		break;
+    
+	case 0x23:
 
-	switch (dev->cur_reg) {
+        /* Don't log register unlock patterns */
-		case 0x13:
+        if(dev->index != 0x03)
-			ali1429_recalc(dev);
+        {
-			break;
+        ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val);
-		case 0x14:
+        }
-			ali1429_recalc(dev);
+        
-			break;
+		dev->regs[dev->index] = val;
-	}
+
-    } else
+        /* Unlock/Lock Registers */
-	dev->cur_reg = val;
+        dev->cfg_locked = !(dev->regs[0x03] && 0xc5);
+
+        if(dev->cfg_locked == 0)
+        {
+        switch(dev->index){
+            /* Shadow RAM */
+            case 0x13:
+            case 0x14:
+            ali1429_shadow_recalc(dev);
+            break;
+
+            /* Cache */
+            case 0x18:
+            cpu_cache_ext_enabled = (val & 0x80);
+            break;
+        }
+        }
+
+		break;
+    }
 }
 
 
 static uint8_t
-ali1429_read(uint16_t port, void *priv)
+ali1429_read(uint16_t addr, void *priv)
 {
     uint8_t ret = 0xff;
     ali1429_t *dev = (ali1429_t *) priv;
 
-    if (!(port & 1)) 
+    switch (addr) {
-	ret = dev->cur_reg;
+	case 0x23:
-    else if (((dev->cur_reg >= 0xc0) || (dev->cur_reg == 0x20)) && cpu_iscyrix)
+        /* Do not conflict with Cyrix configuration registers */
-	ret = 0xff; /*Don't conflict with Cyrix config registers*/
+        if(!(((dev->index >= 0xc0) || (dev->index == 0x20)) && cpu_iscyrix))
-    else
+        ret = dev->regs[dev->index];
-	ret = dev->regs[dev->cur_reg];
+        break;
+    }
 
     return ret;
 }
@@ -123,21 +164,28 @@ ali1429_init(const device_t *info)
     ali1429_t *dev = (ali1429_t *) malloc(sizeof(ali1429_t));
     memset(dev, 0, sizeof(ali1429_t));
 
-    memset(dev->regs, 0xff, 256);
+    /*
-    dev->regs[0x13] = dev->regs[0x14] = 0x00;
+    M1429 Ports:
-
+    22h Index Port
-    io_sethandler(0x0022, 0x0002, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev);
+    23h Data Port
-
+    */
-    ali1429_recalc(dev);
+    io_sethandler(0x022, 0x0001, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev);
+    io_sethandler(0x023, 0x0001, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev);
+    
+    dev->cfg_locked = 1;
 
     device_add(&port_92_device);
 
+    dev->regs[0x13] = 0x00;
+    dev->regs[0x14] = 0x00;
+    ali1429_shadow_recalc(dev);
+
     return dev;
 }
 
 
 const device_t ali1429_device = {
-    "ALi-M1429",
+    "ALi M1429",
     0,
     0,
     ali1429_init, ali1429_close, NULL,

src/chipset/ali1489.c

@@ -0,0 +1,541 @@
+/*
+ * 86Box	A hypervisor and IBM PC system emulator that specializes in
+ *		running old operating systems and software designed for IBM
+ *		PC systems and compatibles from 1981 through fairly recent
+ *		system designs based on the PCI bus.
+ *
+ *		This file is part of the 86Box distribution.
+ *
+ *		Implementation of the ALi M1489 chipset.
+ *
+ *
+ *
+ *      Authors: Tiseno100
+ *
+ *		Copyright 2020 Tiseno100
+ *
+ */
+
+#include <stdarg.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <wchar.h>
+#define HAVE_STDARG_H
+#include <86box/86box.h>
+#include "cpu.h"
+#include <86box/timer.h>
+#include <86box/io.h>
+#include <86box/device.h>
+#include <86box/keyboard.h>
+#include <86box/mem.h>
+#include <86box/fdd.h>
+#include <86box/fdc.h>
+#include <86box/pci.h>
+#include <86box/dma.h>
+#include <86box/hdc_ide.h>
+#include <86box/port_92.h>
+#include <86box/chipset.h>
+
+#define disabled_shadow (MEM_READ_EXTANY | MEM_WRITE_EXTANY)
+#define ENABLE_ALI1489_LOG 0
+
+#ifdef ENABLE_ALI1489_LOG
+int ali1489_do_log = ENABLE_ALI1489_LOG;
+static void
+ali1489_log(const char *fmt, ...)
+{
+    va_list ap;
+
+    if (ali1489_do_log) {
+	va_start(ap, fmt);
+	pclog_ex(fmt, ap);
+	va_end(ap);
+    }
+}
+#else
+#define ali1489_log(fmt, ...)
+#endif
+
+typedef struct
+{
+    uint8_t	index, ide_index, ide_chip_id,
+	regs[256], pci_conf[256], ide_regs[256];
+    port_92_t * port_92;
+
+} ali1489_t;
+
+static void
+ali1489_defaults(void *priv)
+{
+    ali1489_t *dev = (ali1489_t *) priv;
+
+    /* IDE registers */
+    dev->ide_regs[0x01] = 0x02;
+    dev->ide_regs[0x08] = 0xff;
+    dev->ide_regs[0x09] = 0x41;
+    dev->ide_regs[0x34] = 0xff;
+    dev->ide_regs[0x35] = 0x01;
+
+    /* PCI registers */
+    dev->pci_conf[0x00] = 0xb9;
+    dev->pci_conf[0x01] = 0x10;
+    dev->pci_conf[0x02] = 0x89;
+    dev->pci_conf[0x03] = 0x14;
+    dev->pci_conf[0x04] = 0x07;
+    dev->pci_conf[0x07] = 0x04;
+    dev->pci_conf[0x0b] = 0x06;
+
+    /* ISA registers */
+    dev->regs[0x01] = 0x0f;
+    dev->regs[0x02] = 0x0f;
+    dev->regs[0x10] = 0xf1;
+    dev->regs[0x11] = 0xff;
+    dev->regs[0x13] = 0x00;
+    dev->regs[0x14] = 0x00;
+    dev->regs[0x15] = 0x20;
+    dev->regs[0x16] = 0x30;
+    dev->regs[0x19] = 0x04;
+    dev->regs[0x21] = 0x72;
+    dev->regs[0x28] = 0x02;
+    dev->regs[0x2b] = 0xdb;
+    dev->regs[0x3c] = 0x03;
+    dev->regs[0x3d] = 0x01;
+    dev->regs[0x40] = 0x03;
+
+}
+
+static void ali1489_shadow_recalc(ali1489_t *dev)
+{
+
+uint32_t base, i;
+
+
+for(i = 0; i < 8; i++){
+    
+base = 0xc0000 + (i << 14);
+if(dev->regs[0x13] & (1 << i))
+mem_set_mem_state_both(base, 0x4000, ((dev->regs[0x14] & 0x10) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x14] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
+else
+mem_set_mem_state_both(base, 0x4000, disabled_shadow);
+
+}
+
+
+for(i = 0; i < 4; i++){
+base = 0xe0000 + (i << 15);
+
+shadowbios = (dev->regs[0x14] & 0x10);
+shadowbios_write = (dev->regs[0x14] & 0x20);
+
+if(dev->regs[0x14] & (1 << i))
+mem_set_mem_state_both(base, 0x8000, ((dev->regs[0x14] & 0x10) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x14] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
+else
+mem_set_mem_state_both(base, 0x8000, disabled_shadow);
+}
+
+flushmmucache();
+}
+
+static void ali1489_smm_recalc(ali1489_t *dev)
+{
+    if((dev->regs[0x19] & 0x08) && (((dev->regs[0x19] & 0x03) << 4) != 0x00))
+    {
+        if(((dev->regs[0x19] & 0x03) << 4) & 0x01)
+        {
+        mem_set_mem_state_smm(0xa0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
+        }
+            
+        if(((dev->regs[0x19] & 0x03) << 4) & 0x02)
+        {
+        mem_set_mem_state_smm(0xe0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
+        }
+
+        if(((dev->regs[0x19] & 0x03) << 4) & 0x03)
+        {
+        mem_set_mem_state_smm(0x38000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
+        }
+    }
+}
+
+static void
+ali1489_write(uint16_t addr, uint8_t val, void *priv)
+{
+    ali1489_t *dev = (ali1489_t *) priv;
+
+    switch (addr) {
+	case 0x22:
+		dev->index = val;
+		break;
+	case 0x23:
+
+		dev->regs[dev->index] = val;
+
+        if(dev->regs[0x03] == 0xc5) /* Check if the configuration registers are unlocked */
+        {
+        switch(dev->index){
+
+            case 0x10: /* DRAM Configuration Register I */
+            case 0x11: /* DRAM Configuration Register II */
+            case 0x12: /* ROM Function Register */
+            dev->regs[dev->index] = val;
+            break;
+
+            case 0x13: /* Shadow Region Register */
+            case 0x14: /* Shadow Control Register */
+
+            if(dev->index == 0x14)
+            dev->regs[dev->index] = (val & 0xbf);
+            else
+            {
+            dev->regs[dev->index] = val;
+            }
+
+            ali1489_shadow_recalc(dev);
+            break;
+
+            case 0x15: /* Cycle Check Point Control Register */
+            dev->regs[dev->index] = (val & 0xf1);
+            break;
+
+            case 0x16: /* Cache Control Register I */
+            dev->regs[dev->index] = val;
+            cpu_cache_int_enabled = (val & 0x01);
+            cpu_cache_ext_enabled = (val & 0x02);
+            break;
+
+            case 0x17: /* Cache Control Register II */
+            dev->regs[dev->index] = val;
+            break;
+
+            case 0x19: /* SMM Control Register */
+            dev->regs[dev->index] = val;
+            ali1489_smm_recalc(dev);
+            break;
+
+            case 0x1a: /* EDO DRAM Configuration Register */
+            case 0x1b: /* DRAM Timing Control Register */
+            case 0x1c: /* Memory Data Buffer Direction Control Register */
+            dev->regs[dev->index] = val;
+            break;
+
+            case 0x1e: /* Linear Wrapped Burst Order Mode Control Register */
+            dev->regs[dev->index] = (val & 0x40);
+            break;
+
+            case 0x20: /* CPU to PCI Buffer Control Register */
+            case 0x21: /* DEVSELJ Check Point Setting Register */
+            dev->regs[dev->index] = val;
+            break;
+
+            case 0x22: /* PCI to CPU W/R Buffer Configuration Register */
+            dev->regs[dev->index] = (val & 0xfd);
+            break;
+
+            case 0x25: /* GP/MEM Address Definition Register I */
+            case 0x26: /* GP/MEM Address Definition Register II */
+            case 0x27: /* GP/MEM Address Definition Register III */
+            case 0x28: /* PCI Arbiter Control Register */
+            dev->regs[dev->index] = val;
+            break;
+
+            case 0x29: /* System Clock Register */
+            dev->regs[dev->index] = val;
+
+            if(val & 0x10)
+            port_92_add(dev->port_92);
+            else
+            port_92_remove(dev->port_92);
+            break;
+
+            case 0x2a: /* I/O Recovery Register */
+            dev->regs[dev->index] = val;
+            break;
+
+            case 0x2b: /* Turbo Function Register */
+            dev->regs[dev->index] = (val & 0xbf);
+            break;
+
+            case 0x30: /* Power Management Unit Control Register */
+            case 0x31: /* Mode Timer Monitoring Events Selection Register I */
+            case 0x32: /* Mode Timer Monitoring Events Selection Register II */
+            case 0x33: /* SMI Triggered Events Selection Register I */
+            case 0x34: /* SMI Triggered Events Selection Register II */
+            case 0x35: /* SMI Status Register */
+            dev->regs[dev->index] = val;
+            break;
+
+            case 0x36: /* IRQ Channel Group Selected Control Register I */
+            dev->regs[dev->index] = (val & 0xe5);
+            break;
+
+            case 0x37: /* IRQ Channel Group Selected Control Register II */
+            dev->regs[dev->index] = (val & 0xef);
+            break;
+
+            case 0x38: /* DRQ Channel Selected Control  Register */
+            case 0x39: /* Mode Timer Setting Register */
+            case 0x3a: /* Input_device Timer Setting Register */
+            case 0x3b: /* GP/MEM Timer Setting Register */
+            case 0x3c: /* LED Flash Control Register */
+            dev->regs[dev->index] = val;
+            break;
+
+            case 0x3d: /* Miscellaneous Register I */
+            dev->regs[dev->index] = (val & 0x07);
+            break;
+
+            case 0x3f: /* Shadow Port 70h Register */
+            dev->regs[dev->index] = val;
+            break;
+
+            case 0x40: /* Clock Generator Control Feature Register */
+            dev->regs[dev->index] = (val & 0x3f);
+            break;
+
+            case 0x41: /* Power Control Output Register */
+            dev->regs[dev->index] = val;
+            break;
+
+            case 0x42: /* PCI INTx Routing Table Mapping Register I */
+            if((val & 0x0f) != 0)
+            pci_set_irq(PCI_INTA, (val & 0x0f));
+            else
+            pci_set_irq(PCI_INTA, PCI_IRQ_DISABLED);
+
+            if(((val & 0x0f) << 4) != 0)
+            pci_set_irq(PCI_INTB, ((val & 0x0f) << 4));
+            else
+            pci_set_irq(PCI_INTB, PCI_IRQ_DISABLED);
+            break;
+
+            case 0x43: /* PCI INTx Routing Table Mapping Register II */
+            if((val & 0x0f) != 0)
+            pci_set_irq(PCI_INTC, (val & 0x0f));
+            else
+            pci_set_irq(PCI_INTC, PCI_IRQ_DISABLED);
+
+            if(((val & 0x0f) << 4) != 0)
+            pci_set_irq(PCI_INTD, ((val & 0x0f) << 4));
+            else
+            pci_set_irq(PCI_INTD, PCI_IRQ_DISABLED);
+            break;
+
+            case 0x44: /* PCI INTx Sensitivity Register */
+            dev->regs[dev->index] = val;
+            break;
+            
+        }
+
+        if(dev->index != 0x03)
+        {
+        ali1489_log("M1489: dev->regs[%02x] = %02x\n", dev->index, val);
+        }
+
+        }
+
+		break;
+    }
+}
+
+
+static uint8_t
+ali1489_read(uint16_t addr, void *priv)
+{
+    uint8_t ret = 0xff;
+    ali1489_t *dev = (ali1489_t *) priv;
+
+    switch (addr) {
+	case 0x23:
+
+        if(((dev->index == 0x20) || (dev->index >= 0xc0)) && cpu_iscyrix) /* Avoid conflict with Cyrix CPU registers */
+        ret = 0xff;
+        else
+        {
+		ret = dev->regs[dev->index];
+        }
+
+		break;
+    }
+
+    return ret;
+}
+
+static void
+ali1489_pci_write(int func, int addr, uint8_t val, void *priv)
+{
+
+ali1489_t *dev = (ali1489_t *) priv;
+
+ali1489_log("M1489-PCI: dev->regs[%02x] = %02x\n", addr, val);
+
+switch (addr)
+{
+    /* Dummy PCI Config */
+    case 0x04:
+    dev->pci_conf[0x04] = (dev->pci_conf[0x04] & ~0x07) | (val & 0x07);
+    break;
+
+    /* Dummy PCI Status */
+    case 0x07:
+    dev->pci_conf[0x07] = val;
+    break;
+}
+
+}
+
+static uint8_t
+ali1489_pci_read(int func, int addr, void *priv)
+{
+    ali1489_t *dev = (ali1489_t *) priv;
+    uint8_t ret = 0xff;
+	
+    ret = dev->pci_conf[addr];
+
+    return ret;
+}
+
+static void
+ali1489_ide_write(uint16_t addr, uint8_t val, void *priv)
+{
+
+ali1489_t *dev = (ali1489_t *) priv;
+
+    switch (addr) {
+    case 0xf4: /* Usually it writes 30h here */
+        dev->ide_chip_id = val;
+        break;
+
+	case 0xf8:
+		dev->ide_index = val;
+		break;
+    
+	case 0xfc:
+        ali1489_log("M1489-IDE: dev->regs[%02x] = %02x\n", dev->ide_index, val);
+		dev->ide_regs[dev->ide_index] = val;
+
+        ide_pri_disable();
+        ide_sec_disable();
+
+        if(dev->ide_regs[0x01] & 0x01){ /*The datasheet doesn't clearly explain the channel selection */
+        ide_pri_enable();               /*So we treat it according to the chipset programming manual. */
+        ide_set_base(0, 0x1f0);
+        ide_set_side(0, 0x3f6);
+
+        if(!(dev->ide_regs[0x35] & 0x41)){
+        ide_sec_enable();
+        ide_set_base(1, 0x170);
+        ide_set_side(1, 0x376);
+        }
+
+        }
+
+        break;
+    }
+
+}
+
+static uint8_t
+ali1489_ide_read(uint16_t addr, void *priv)
+{
+
+    uint8_t ret = 0xff;
+    ali1489_t *dev = (ali1489_t *) priv;
+
+    switch (addr) {
+    case 0xf4:
+        ret = dev->ide_chip_id;
+        break;
+	case 0xfc:
+		ret = dev->ide_regs[dev->ide_index];
+		break;
+    }
+
+    return ret;
+}
+
+static void
+ali1489_reset(void *priv)
+{
+
+ali1489_t *dev = (ali1489_t *) priv;
+
+ide_pri_disable();
+ide_sec_disable();
+
+pci_set_irq(PCI_INTA, PCI_IRQ_DISABLED);
+pci_set_irq(PCI_INTB, PCI_IRQ_DISABLED);
+pci_set_irq(PCI_INTC, PCI_IRQ_DISABLED);
+pci_set_irq(PCI_INTD, PCI_IRQ_DISABLED);
+
+ali1489_defaults(dev);
+
+}
+
+static void
+ali1489_close(void *priv)
+{
+    ali1489_t *dev = (ali1489_t *) priv;
+
+    free(dev);
+}
+
+
+static void *
+ali1489_init(const device_t *info)
+{
+    ali1489_t *dev = (ali1489_t *) malloc(sizeof(ali1489_t));
+    memset(dev, 0, sizeof(ali1489_t));
+
+    /*
+    M1487/M1489
+    22h Index Port
+    23h Data Port
+    */
+    io_sethandler(0x022, 0x0001, ali1489_read, NULL, NULL, ali1489_write, NULL, NULL, dev);
+    io_sethandler(0x023, 0x0001, ali1489_read, NULL, NULL, ali1489_write, NULL, NULL, dev);
+
+    /*
+    M1489 IDE controller
+    F4h Chip ID we write always 30h onto it
+    F8h Index Port
+    FCh Data Port
+    */
+    io_sethandler(0x0f4, 0x0001, ali1489_ide_read, NULL, NULL, ali1489_ide_write, NULL, NULL, dev);
+    io_sethandler(0x0f8, 0x0001, ali1489_ide_read, NULL, NULL, ali1489_ide_write, NULL, NULL, dev);
+    io_sethandler(0x0fc, 0x0001, ali1489_ide_read, NULL, NULL, ali1489_ide_write, NULL, NULL, dev);
+
+    /* Dummy M1489 PCI device */
+    pci_add_card(0, ali1489_pci_read, ali1489_pci_write, dev);
+
+    ide_pri_disable();
+    ide_sec_disable();
+
+    dev->port_92 = device_add(&port_92_pci_device);
+
+    pci_set_irq(PCI_INTA, PCI_IRQ_DISABLED);
+    pci_set_irq(PCI_INTB, PCI_IRQ_DISABLED);
+    pci_set_irq(PCI_INTC, PCI_IRQ_DISABLED);
+    pci_set_irq(PCI_INTD, PCI_IRQ_DISABLED);
+
+    ali1489_defaults(dev);
+
+    ali1489_shadow_recalc(dev);
+
+    return dev;
+}
+
+
+const device_t ali1489_device = {
+    "ALi M1489",
+    0,
+    0,
+    ali1489_init,
+    ali1489_close,
+    ali1489_reset,
+    NULL,
+    NULL,
+    NULL,
+    NULL
+};

src/chipset/umc491.c

@@ -0,0 +1,179 @@
+/*
+ * 86Box	A hypervisor and IBM PC system emulator that specializes in
+ *		running old operating systems and software designed for IBM
+ *		PC systems and compatibles from 1981 through fairly recent
+ *		system designs based on the PCI bus.
+ *
+ *		This file is part of the 86Box distribution.
+ *
+ *		Implementation of the UMC 491/493 chipset.
+ *
+ *
+ *
+ *      Authors: Tiseno100
+ *
+ *		Copyright 2020 Tiseno100
+ *
+ */
+
+#include <stdarg.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <wchar.h>
+#define HAVE_STDARG_H
+#include <86box/86box.h>
+#include "cpu.h"
+#include <86box/timer.h>
+#include <86box/io.h>
+#include <86box/device.h>
+#include <86box/mem.h>
+#include <86box/port_92.h>
+#include <86box/chipset.h>
+
+#ifdef ENABLE_UMC491_LOG
+int ali1429_do_log = ENABLE_UMC491_LOG;
+static void
+umc491_log(const char *fmt, ...)
+{
+    va_list ap;
+
+    if (umc491_do_log) {
+	va_start(ap, fmt);
+	pclog_ex(fmt, ap);
+	va_end(ap);
+    }
+}
+#else
+#define umc491_log(fmt, ...)
+#endif
+
+typedef struct
+{
+    uint8_t	index,
+	regs[256];
+} umc491_t;
+
+static void umc491_shadow_recalc(umc491_t *dev)
+{
+
+shadowbios = (dev->regs[0xcc] & 0x40);
+shadowbios_write = (dev->regs[0xcc] & 0x80);
+
+mem_set_mem_state_both(0xc0000, 0x4000, ((dev->regs[0xcd] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0xcd] & 0x80) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
+mem_set_mem_state_both(0xc4000, 0x4000, ((dev->regs[0xcd] & 0x10) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0xcd] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
+mem_set_mem_state_both(0xc8000, 0x4000, ((dev->regs[0xcd] & 0x04) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0xcd] & 0x08) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
+mem_set_mem_state_both(0xcc000, 0x4000, ((dev->regs[0xcd] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0xcd] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
+
+mem_set_mem_state_both(0xd0000, 0x4000, ((dev->regs[0xce] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0xce] & 0x80) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
+mem_set_mem_state_both(0xd4000, 0x4000, ((dev->regs[0xce] & 0x10) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0xce] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
+mem_set_mem_state_both(0xd8000, 0x4000, ((dev->regs[0xce] & 0x04) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0xce] & 0x08) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
+mem_set_mem_state_both(0xdc000, 0x4000, ((dev->regs[0xce] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0xce] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
+
+/*
+Our machine has the E segment into parts although most AMI machines treat it as one.
+Probably a flaw by the BIOS as only one register gets enabled for it anyways.
+*/
+mem_set_mem_state_both(0xe0000, 0x10000, ((dev->regs[0xcc] & 0x10) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0xcc] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
+
+mem_set_mem_state_both(0xf0000, 0x10000, ((dev->regs[0xcc] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0xcc] & 0x80) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
+
+flushmmucache();
+}
+
+static void
+umc491_write(uint16_t addr, uint8_t val, void *priv)
+{
+    umc491_t *dev = (umc491_t *) priv;
+
+    switch (addr) {
+	case 0x8022:
+		dev->index = val;
+		break;
+	case 0x8024:
+        umc491_log("UMC 491: dev->regs[%02x] = %02x\n", dev->index, val);
+		dev->regs[dev->index] = val;
+
+        switch(dev->index)
+        {
+            case 0xcc:
+            case 0xcd:
+            case 0xce:
+            umc491_shadow_recalc(dev);
+            break;
+
+            case 0xd0:
+            cpu_update_waitstates();
+            break;
+
+            case 0xd1:
+            cpu_cache_ext_enabled = (val & 0x01);
+            break;
+        }
+		break;
+    }
+}
+
+
+static uint8_t
+umc491_read(uint16_t addr, void *priv)
+{
+    uint8_t ret = 0xff;
+    umc491_t *dev = (umc491_t *) priv;
+
+    switch (addr) {
+	case 0x8024:
+		ret = dev->regs[dev->index];
+		break;
+    }
+
+    return ret;
+}
+
+
+static void
+umc491_close(void *priv)
+{
+    umc491_t *dev = (umc491_t *) priv;
+
+    free(dev);
+}
+
+
+static void *
+umc491_init(const device_t *info)
+{
+    umc491_t *dev = (umc491_t *) malloc(sizeof(umc491_t));
+    memset(dev, 0, sizeof(umc491_t));
+
+    device_add(&port_92_device);
+
+/*
+
+UMC 491/493 Ports
+
+8022h Index Port
+8024h Data Port
+
+*/
+    io_sethandler(0x8022, 0x0001, umc491_read, NULL, NULL, umc491_write, NULL, NULL, dev);
+    io_sethandler(0x8024, 0x0001, umc491_read, NULL, NULL, umc491_write, NULL, NULL, dev);
+    
+    dev->regs[0xcc] = 0x00;
+    dev->regs[0xcd] = 0x00;
+    dev->regs[0xce] = 0x00;
+    umc491_shadow_recalc(dev);
+
+    return dev;
+}
+
+
+const device_t umc491_device = {
+    "UMC 491/493",
+    0,
+    0,
+    umc491_init, umc491_close, NULL,
+    NULL, NULL, NULL,
+    NULL
+};

src/device/hwm_lm75.c

@@ -64,7 +64,7 @@ lm75_remap(lm75_t *dev, uint8_t addr)
 {
     lm75_log("LM75: remapping to SMBus %02Xh\n", addr);
 
-    smbus_removehandler(dev->smbus_addr, 1,
+    if (dev->smbus_addr < 0x80) smbus_removehandler(dev->smbus_addr, 1,
     			lm75_smbus_read_byte, lm75_smbus_read_byte_cmd, lm75_smbus_read_word_cmd, NULL,
     			lm75_smbus_write_byte, lm75_smbus_write_byte_cmd, lm75_smbus_write_word_cmd, NULL,
     			dev);

src/device/postcard.c

@@ -113,8 +113,10 @@ postcard_init(const device_t *info)
 
     if (machines[machine].flags & MACHINE_MCA)
     	postcard_port = 0x680; /* MCA machines */
-    else if (strstr(machines[machine].name, " PS/2 "))
+    else if (strstr(machines[machine].name, " PS/2 ") || strstr(machines[machine].name, " PS/1 "))
-    	postcard_port = 0x90;  /* ISA PS/2 machines */
+    	postcard_port = 0x190; /* ISA PS/2 machines */
+    else if (strstr(machines[machine].name, " Compaq ") && !(machines[machine].flags & MACHINE_PCI))
+    	postcard_port = 0x84;  /* ISA Compaq machines */
     else
     	postcard_port = 0x80;  /* AT and clone machines */
     postcard_log("POST card initializing on port %04Xh\n", postcard_port);

src/device/smbus.c

@@ -115,6 +115,9 @@ smbus_sethandler(uint8_t base, int size,
     int c;
     smbus_t *p, *q = NULL;
 
+    if ((base + size) >= NADDRS)
+    	return;
+
     for (c = 0; c < size; c++) {
     	p = smbus_last[base + c];
     	q = (smbus_t *) malloc(sizeof(smbus_t));
@@ -158,13 +161,17 @@ smbus_removehandler(uint8_t base, int size,
     		    void *priv)
 {
     int c;
-    smbus_t *p;
+    smbus_t *p, *q;
+
+    if ((base + size) >= NADDRS)
+    	return;
 
     for (c = 0; c < size; c++) {
     	p = smbus[base + c];
     	if (!p)
     		continue;
     	while(p) {
+    		q = p->next;
     		if ((p->read_byte == read_byte) && (p->read_byte_cmd == read_byte_cmd) &&
     		    (p->read_word_cmd == read_word_cmd) && (p->read_block_cmd == read_block_cmd) &&
     		    (p->write_byte == write_byte) && (p->write_byte_cmd == write_byte_cmd) &&
@@ -182,7 +189,7 @@ smbus_removehandler(uint8_t base, int size,
     			p = NULL;
     			break;
     		}
-    		p = p->next;
+    		p = q;
     	}
     }
 }

src/floppy/fdd_imd.c

@@ -328,12 +328,15 @@ imd_seek(int drive, int track)
     d86f_destroy_linked_lists(drive, 0);
     d86f_destroy_linked_lists(drive, 1);
 
-    if (track > dev->track_count) {
+   d86f_zero_track(drive);
-	d86f_zero_track(drive);
+
+    if (track > dev->track_count)
 	return;
-    }
 
     for (side = 0; side < dev->sides; side++) {
+	if (!dev->tracks[track][side].is_present)
+		continue;
+
 	track_rate = dev->current_side_flags[side] & 7;
 	if (!track_rate && (dev->current_side_flags[side] & 0x20))
 		track_rate = 4;
@@ -414,11 +417,11 @@ imd_seek(int drive, int track)
 
 			data = dev->track_buffer[side] + track_buf_pos[side];
 			type = dev->buffer[dev->tracks[track][side].sector_data_offs[ordered_pos]];
-			type = (type >> 1) & 7;
+			type = ((type - 1) >> 1) & 7;
 			flags = 0x00;
-			if ((type == 2) || (type == 4))
+			if (type & 0x01)
 				flags |= SECTOR_DELETED_DATA;
-			if ((type == 3) || (type == 4))
+			if (type & 0x02)
 				flags |= SECTOR_CRC_ERROR;
 
 			if (((flags & 0x02) || (id[3] > dev->tracks[track][side].max_sector_size)) && !fdd_get_turbo(drive))
@@ -717,6 +720,7 @@ imd_load(int drive, wchar_t *fn)
 
 	track_spt = buffer2[3];
 	sector_size = buffer2[4];
+	pclog("%02X %02X %02X %02X\n", buffer2[1], buffer2[2], buffer2[3], buffer2[4]);
 	if ((track_spt == 15) && (sector_size == 2))
 		dev->tracks[track][side].side_flags |= 0x20;
 	if ((track_spt == 16) && (sector_size == 2))
@@ -750,7 +754,12 @@ imd_load(int drive, wchar_t *fn)
 		last_offset += track_spt;
 	}
 
-	if (sector_size == 0xFF) {
+	if (track_spt == 0x00) {
+		dev->tracks[track][side].n_map_offs = last_offset;
+		buffer2 = buffer + last_offset;
+		last_offset += track_spt;
+		dev->tracks[track][side].is_present = 0;
+	} else if (sector_size == 0xFF) {
 		dev->tracks[track][side].n_map_offs = last_offset;
 		buffer2 = buffer + last_offset;
 		last_offset += track_spt;
@@ -762,17 +771,29 @@ imd_load(int drive, wchar_t *fn)
 			data_size = 128 << data_size;
 			dev->tracks[track][side].sector_data_offs[i] = last_offset;
 			dev->tracks[track][side].sector_data_size[i] = 1;
+			if (dev->buffer[dev->tracks[track][side].sector_data_offs[i]] > 0x08) {
+				/* Invalid sector data type, possibly a malformed HxC IMG image (it outputs data errored
+				   sectors with a variable amount of bytes, against the specification). */
+				imd_log("IMD: Invalid sector data type %02X\n", dev->buffer[dev->tracks[track][side].sector_data_offs[i]]);
+				fclose(dev->f);
+				free(dev);
+				imd[drive] = NULL;
+				memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
+				return;
+			}
 			if (buffer[dev->tracks[track][side].sector_data_offs[i]] != 0)
 				dev->tracks[track][side].sector_data_size[i] += (buffer[dev->tracks[track][side].sector_data_offs[i]] & 1) ? data_size : 1;
 			last_offset += dev->tracks[track][side].sector_data_size[i];
 			if (!(buffer[dev->tracks[track][side].sector_data_offs[i]] & 1))
 				fwriteprot[drive] = writeprot[drive] = 1;
 			type = dev->buffer[dev->tracks[track][side].sector_data_offs[i]];
-			type = (type >> 1) & 7;
+			if (type != 0x00) {
-			if ((type == 3) || (type == 4) || (data_size > (128 << dev->tracks[track][side].max_sector_size)))
+				type = ((type - 1) >> 1) & 7;
-				track_total += (pre_sector + 3);
+				if (data_size > (128 << dev->tracks[track][side].max_sector_size))
-			else
+					track_total += (pre_sector + 3);
-				track_total += (pre_sector + data_size + 2);
+				else
+					track_total += (pre_sector + data_size + 2);
+			}
 		}
 	} else {
 		dev->tracks[track][side].data_offs = last_offset;
@@ -782,19 +803,32 @@ imd_load(int drive, wchar_t *fn)
 			data_size = 128 << data_size;
 			dev->tracks[track][side].sector_data_offs[i] = last_offset;
 			dev->tracks[track][side].sector_data_size[i] = 1;
+			if (dev->buffer[dev->tracks[track][side].sector_data_offs[i]] > 0x08) {
+				/* Invalid sector data type, possibly a malformed HxC IMG image (it outputs data errored
+				   sectors with a variable amount of bytes, against the specification). */
+				imd_log("IMD: Invalid sector data type %02X\n", dev->buffer[dev->tracks[track][side].sector_data_offs[i]]);
+				fclose(dev->f);
+				free(dev);
+				imd[drive] = NULL;
+				memset(floppyfns[drive], 0, sizeof(floppyfns[drive]));
+				return;
+			}
 			if (buffer[dev->tracks[track][side].sector_data_offs[i]] != 0)
 				dev->tracks[track][side].sector_data_size[i] += (buffer[dev->tracks[track][side].sector_data_offs[i]] & 1) ? data_size : 1;
 			last_offset += dev->tracks[track][side].sector_data_size[i];
 			if (!(buffer[dev->tracks[track][side].sector_data_offs[i]] & 1))
 				fwriteprot[drive] = writeprot[drive] = 1;
 			type = dev->buffer[dev->tracks[track][side].sector_data_offs[i]];
-			type = (type >> 1) & 7;
+			if (type != 0x00) {
-			if ((type == 3) || (type == 4) || (sector_size > dev->tracks[track][side].max_sector_size))
+				type = ((type - 1) >> 1) & 7;
-				track_total += (pre_sector + 3);
+				if (data_size > (128 << dev->tracks[track][side].max_sector_size))
-			else
+					track_total += (pre_sector + 3);
-				track_total += (pre_sector + data_size + 2);
+				else
+					track_total += (pre_sector + data_size + 2);
+			}
 		}
 	}
+
 	buffer2 = buffer + last_offset;
 
 	/* Leaving even GAP4: 80 : 40 */
@@ -810,7 +844,7 @@ imd_load(int drive, wchar_t *fn)
 	else
 		converted_rate = dev->tracks[track][side].side_flags & 0x03;
 
-	if (gap3_sizes[converted_rate][sector_size][track_spt] == 0x00) {
+	if ((track_spt != 0x00) && (gap3_sizes[converted_rate][sector_size][track_spt] == 0x00)) {
 		size_diff = raw_tsize - track_total;
 		gap_sum = minimum_gap3 + minimum_gap4;
 		if (size_diff < gap_sum) {
@@ -831,7 +865,7 @@ imd_load(int drive, wchar_t *fn)
 		}
 
 		dev->tracks[track][side].gap3_len = (size_diff - minimum_gap4) / track_spt;
-	} else if (gap3_sizes[converted_rate][sector_size][track_spt] != 0x00)
+	} else if ((track_spt == 0x00) || (gap3_sizes[converted_rate][sector_size][track_spt] != 0x00))
 		dev->tracks[track][side].gap3_len = gap3_sizes[converted_rate][sector_size][track_spt];
 
 	/* imd_log("GAP3 length for (%02i)(%01i): %i bytes\n", track, side, dev->tracks[track][side].gap3_len); */
@@ -839,7 +873,8 @@ imd_load(int drive, wchar_t *fn)
 	if (track > dev->track_count)
 		dev->track_count = track;
 
-	if (last_offset >= fsize) break;
+	if (last_offset >= fsize)
+		break;
     }
 
     /* If more than 43 tracks, then the tracks are thin (96 tpi). */

src/include/86box/chipset.h

@@ -23,6 +23,9 @@ extern const device_t	acc2168_device;
 
 /* ALi */
 extern const device_t	ali1429_device;
+#if defined(DEV_BRANCH) && defined(USE_M1489)
+extern const device_t	ali1489_device;
+#endif
 
 /* AMD */
 extern const device_t	amd640_device;
@@ -101,6 +104,9 @@ extern const device_t	stpc_serial_device;
 extern const device_t	stpc_lpt_device;
 #endif
 
+/* UMC */
+extern const device_t   umc491_device;
+
 /* VIA */
 
 extern const device_t   via_vt82c49x_device;

src/include/86box/machine.h

@@ -252,6 +252,7 @@ extern const device_t	*at_commodore_sl386sx_get_device(void);
 extern int	machine_at_acc386_init(const machine_t *);
 extern int	machine_at_asus386_init(const machine_t *);
 extern int	machine_at_ecs386_init(const machine_t *);
+extern int	machine_at_ustechnologies386_init(const machine_t *);
 extern int	machine_at_micronics386_init(const machine_t *);
 
 extern int	machine_at_rycleopardlx_init(const machine_t *);
@@ -290,6 +291,9 @@ extern int	machine_at_486ap4_init(const machine_t *);
 #if defined(DEV_BRANCH) && defined(NO_SIO)
 extern int	machine_at_486vipio2_init(const machine_t *);
 #endif
+#if defined(DEV_BRANCH) && defined(USE_M1489)
+extern int	machine_at_abpb4_init(const machine_t *);
+#endif
 #if defined(DEV_BRANCH) && defined(USE_STPC)
 extern int	machine_at_itoxstar_init(const machine_t *);
 extern int	machine_at_arb1479_init(const machine_t *);
@@ -370,6 +374,7 @@ extern int	machine_at_p55va_init(const machine_t *);
 extern int	machine_at_i430vx_init(const machine_t *);
 extern int	machine_at_brio80xx_init(const machine_t *);
 extern int	machine_at_8500tvxa_init(const machine_t *);
+extern int	machine_at_presario4500_init(const machine_t *);
 extern int	machine_at_pb680_init(const machine_t *);
 
 extern int	machine_at_nupro592_init(const machine_t *);
@@ -430,6 +435,7 @@ extern const device_t 	*at_tsunamiatx_get_device(void);
 /* m_at_slot2.c */
 extern int	machine_at_6gxu_init(const machine_t *);
 extern int	machine_at_s2dge_init(const machine_t *);
+extern int	machine_at_fw6400gx_init(const machine_t *);
 
 /* m_at_socket370.c */
 extern int	machine_at_s370slm_init(const machine_t *);

src/include/86box/win_sdl.h

@@ -58,6 +58,7 @@ extern int	sdl_inith_fs(HWND h);
 extern int	sdl_pause(void);
 extern void	sdl_resize(int x, int y);
 extern void	sdl_enable(int enable);
+extern void	sdl_reinit_texture();
 
 
 #endif	/*WIN_SDL_H*/

src/machine/m_at_286_386sx.c

@@ -152,7 +152,7 @@ machine_at_quadt286_init(const machine_t *model)
     if (bios_only || !ret)
 	return ret;
 
-    machine_at_common_ide_init(model);
+    machine_at_common_init(model);
     device_add(&keyboard_at_device);
     device_add(&fdc_at_device);
     device_add(&headland_gc10x_device);

src/machine/m_at_386dx_486.c

@@ -103,6 +103,26 @@ machine_at_ecs386_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_ustechnologies386_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear(L"roms/machines/ustechnologies386/3umw003.bin",
+			   0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+	return ret;
+
+    machine_at_common_init(model);
+
+    device_add(&umc491_device);
+    device_add(&keyboard_at_device);
+    device_add(&fdc_at_device);
+
+    return ret;
+}
+
 int
 machine_at_rycleopardlx_init(const machine_t *model)
 {
@@ -342,7 +362,7 @@ machine_at_403tg_init(const machine_t *model)
     if (bios_only || !ret)
 	return ret;
 
-    machine_at_common_ide_init(model);
+    machine_at_common_init(model);
 
     device_add(&opti895_device);
 
@@ -704,6 +724,35 @@ machine_at_486vipio2_init(const machine_t *model)
 }
 #endif
 
+#if defined(DEV_BRANCH) && defined(USE_M1489)
+int
+machine_at_abpb4_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear(L"roms/machines/abpb4/486-AB-PB4.BIN",
+			   0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+	return ret;
+
+    machine_at_common_init(model);
+    
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
+    pci_register_slot(0x03, PCI_CARD_NORMAL, 1, 2, 3, 4);
+    pci_register_slot(0x04, PCI_CARD_NORMAL, 2, 3, 4, 1);
+    pci_register_slot(0x05, PCI_CARD_NORMAL, 3, 4, 1, 2);
+
+    device_add(&ali1489_device);
+    device_add(&ide_pci_2ch_device);
+    device_add(&w83787f_device);
+    device_add(&keyboard_at_device);
+
+    return ret;
+}
+#endif
+
 #if defined(DEV_BRANCH) && defined(USE_STPC)
 int
 machine_at_itoxstar_init(const machine_t *model)

src/machine/m_at_slot2.c

@@ -59,8 +59,8 @@ machine_at_6gxu_init(const machine_t *model)
     pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
     pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
     pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); /* On-Board SCSI. Not emulated at the moment */
-	pci_register_slot(0x01, PCI_CARD_NORMAL, 1, 2, 3, 4);
+    pci_register_slot(0x01, PCI_CARD_NORMAL, 1, 2, 3, 4);
-	
+
     device_add(&i440gx_device);
     device_add(&piix4e_device);
     device_add(&keyboard_ps2_pci_device);
@@ -118,13 +118,13 @@ machine_at_s2dge_init(const machine_t *model)
     pci_register_slot(0x0E, PCI_CARD_NORMAL, 1, 2, 3, 4);
     pci_register_slot(0x01, PCI_CARD_NORMAL, 1, 2, 3, 4);
     pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
-	
+
     device_add(&i440gx_device);
     device_add(&piix4e_device);
     device_add(&keyboard_ps2_ami_pci_device);
     device_add(&w83977tf_device);
     device_add(&intel_flash_bxt_device);
-    spd_register(SPD_TYPE_SDRAM, 0xF, 256);
+    spd_register(SPD_TYPE_SDRAM, 0xF, 512);
 
     hwm_values_t machine_hwm = {
     	{    /* fan speeds */
@@ -152,3 +152,61 @@ machine_at_s2dge_init(const machine_t *model)
 	
     return ret;
 }
+
+int
+machine_at_fw6400gx_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear(L"roms/machines/fw6400gx/fwgx1211.rom",
+			   0x000c0000, 262144, 0);
+
+    if (bios_only || !ret)
+	return ret;
+
+    machine_at_common_init_ex(model, 2);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 4);
+    pci_register_slot(0x0A, PCI_CARD_NORMAL, 1, 2, 3, 4);
+    pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
+    pci_register_slot(0x0C, PCI_CARD_NORMAL, 3, 4, 1, 2);
+    pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
+    pci_register_slot(0x0E, PCI_CARD_NORMAL, 4, 1, 2, 3);
+    pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
+    pci_register_slot(0x01, PCI_CARD_NORMAL, 1, 2, 0, 0);
+
+    device_add(&i440gx_device);
+    device_add(&piix4e_device);
+    device_add(&keyboard_ps2_ami_pci_device);
+    device_add(&pc87309_device);
+    device_add(&sst_flash_29ee020_device);
+    spd_register(SPD_TYPE_SDRAM, 0xF, 512);
+
+    hwm_values_t machine_hwm = {
+    	{    /* fan speeds */
+    		3000,	/* Chassis */
+    		3000,	/* Power */
+    		3000	/* CPU */
+    	}, { /* temperatures */
+    		30,	/* System */
+    		30,	/* CPU */
+    		0	/* unused */
+    	}, { /* voltages */
+    		2050,				   /* Vcore (2.05V by default) */
+    		1500,				   /* Vtt */
+    		3300,				   /* Vio */
+    		RESISTOR_DIVIDER(5000,   11,  16), /* +5V  (divider values bruteforced) */
+    		RESISTOR_DIVIDER(12000,  28,  10), /* +12V (28K/10K divider suggested in the W83781D datasheet) */
+    		RESISTOR_DIVIDER(12000, 853, 347), /* -12V (divider values bruteforced) */
+    		RESISTOR_DIVIDER(5000,    1,   2)  /* -5V  (divider values bruteforced) */
+    	}
+    };
+    if (model->cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type == CPU_PENTIUM2)
+    	machine_hwm.voltages[0] = 2800; /* set higher VCORE (2.8V) for Klamath */
+    hwm_set_values(machine_hwm);
+    device_add(&w83781d_device);
+	
+    return ret;
+}

src/machine/m_at_socket7_s7.c

@@ -657,6 +657,34 @@ machine_at_8500tvxa_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_presario4500_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear(L"roms/machines/presario4500/B013300I.ROM",
+			   0x000c0000, 262144, 0);
+
+    if (bios_only || !ret)
+	return ret;
+
+    machine_at_common_init_ex(model, 2);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x13, PCI_CARD_NORMAL, 1, 2, 3, 4);
+    pci_register_slot(0x14, PCI_CARD_ONBOARD, 4, 0, 0, 0);
+
+    device_add(&i430vx_device);
+    device_add(&piix3_device);
+    device_add(&keyboard_ps2_ami_pci_device);
+    device_add(&fdc37c931apm_device);
+    device_add(&intel_flash_bxt_device);
+
+    return ret;
+}
+
 int
 machine_at_pb680_init(const machine_t *model)
 {

src/machine/machine_table.c

@@ -149,7 +149,7 @@ const machine_t machines[] = {
     { "[SCAT] Samsung Deskmaster 286",		"deskmaster286",	MACHINE_TYPE_286,		{{"",      cpus_286},         {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,										512,16384, 128, 127,	machine_at_deskmaster286_init, NULL			},
     { "[GC103] Quadtel 286 clone",		"quadt286",		MACHINE_TYPE_286,		{{"",      cpus_286},         {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,										512,16384, 128, 127,	     machine_at_quadt286_init, NULL			},
     { "[GC103] Trigem 286M",			"tg286m",		MACHINE_TYPE_286,		{{"",      cpus_286},         {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC,							  	512, 8192, 128, 127,	       machine_at_tg286m_init, NULL			},
-    { "[ISA] MR 286 clone",			"mr286",		MACHINE_TYPE_286,		{{"",      cpus_286},         {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,										512,16384, 128, 127,	        machine_at_mr286_init, NULL			},
+    { "[ISA] MR 286 clone",			"mr286",		MACHINE_TYPE_286,		{{"",      cpus_286},         {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC,										512,16384, 128, 127,	        machine_at_mr286_init, NULL			},
 #if defined(DEV_BRANCH) && defined(USE_SIEMENS)
     { "[ISA] Siemens PCD-2L",			"siemens",		MACHINE_TYPE_286,		{{"",      cpus_286},         {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,										256,15872, 128,  63,	      machine_at_siemens_init, NULL			},
 #endif
@@ -170,8 +170,8 @@ const machine_t machines[] = {
 #endif
     { "[WD76C10] Amstrad MegaPC",		"megapc",		MACHINE_TYPE_386SX,		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO | MACHINE_HDC,				  1,   32,   1, 127,	      machine_at_wd76c10_init, NULL			},
     { "[SCAMP] Commodore SL386SX",		"cbm_sl386sx25",	MACHINE_TYPE_386SX,		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO | MACHINE_HDC,			       1024, 8192, 512, 127,machine_at_commodore_sl386sx_init, at_commodore_sl386sx_get_device	},  
-    { "[NEAT] DTK 386SX clone",			"dtk386",		MACHINE_TYPE_386SX,		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC,								512, 8192, 128, 127,		 machine_at_neat_init, NULL			},
+    { "[NEAT] DTK 386SX clone",			"dtk386",		MACHINE_TYPE_386SX,		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,								512, 8192, 128, 127,		 machine_at_neat_init, NULL			},
-    { "[NEAT] Goldstar 386",			"goldstar386",		MACHINE_TYPE_386SX,		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC,								512, 8192, 128, 127,	  machine_at_goldstar386_init, NULL			},
+    { "[NEAT] Goldstar 386",			"goldstar386",		MACHINE_TYPE_386SX,		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,								512, 8192, 128, 127,	  machine_at_goldstar386_init, NULL			},
     { "[SCAT] KMX-C-02",			"kmxc02",		MACHINE_TYPE_386SX,		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,										512,16384, 512, 127,	       machine_at_kmxc02_init, NULL			},
 
     { "[Intel 82335] Shuttle 386SX",		"shuttle386sx",		MACHINE_TYPE_386SX,		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,										512, 8192, 128, 127,	 machine_at_shuttle386sx_init, NULL			},
@@ -182,11 +182,12 @@ const machine_t machines[] = {
     { "[MCA] IBM PS/2 model 55SX",		"ibmps2_m55sx",		MACHINE_TYPE_386SX,		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"IBM",cpus_IBM486SLC},{"",    NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO,						  1,    8,   1,  63,	  machine_ps2_model_55sx_init, NULL			},
 
     /* 386DX machines */
-    { "[ACC 2168] AMI 386DX clone",		"acc386",		MACHINE_TYPE_386DX,		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC,							       512, 16384, 128, 127,	       machine_at_acc386_init, NULL			},
+    { "[ACC 2168] AMI 386DX clone",		"acc386",		MACHINE_TYPE_386DX,		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,							       512, 16384, 128, 127,	       machine_at_acc386_init, NULL			},
-    { "[SiS 310] ASUS ISA-386C",		"asus386",		MACHINE_TYPE_386DX,		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC,							       512, 16384, 128, 127,	      machine_at_asus386_init, NULL			},
+    { "[SiS 310] ASUS ISA-386C",		"asus386",		MACHINE_TYPE_386DX,		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,							       512, 16384, 128, 127,	      machine_at_asus386_init, NULL			},
     { "[ISA] Compaq Portable III (386)",	"portableiii386",       MACHINE_TYPE_386DX,		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO,			  			  1,   14,   1, 127,   machine_at_portableiii386_init, at_cpqiii_get_device	},
-    { "[ISA] Micronics 386 clone",		"micronics386",		MACHINE_TYPE_386DX,		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC,								512, 8192, 128, 127,	 machine_at_micronics386_init, NULL			},
+    { "[ISA] Micronics 386 clone",		"micronics386",		MACHINE_TYPE_386DX,		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,								512, 8192, 128, 127,	 machine_at_micronics386_init, NULL			},
     { "[C&T 386] ECS 386/32",			"ecs386",		MACHINE_TYPE_386DX,		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,										  1,   16,   1, 127,	       machine_at_ecs386_init, NULL			},		
+    { "[UMC 491] US Technologies 386",		"ustechnologies386",		MACHINE_TYPE_386DX,		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,							       1,   16,   1, 127,	      machine_at_ustechnologies386_init, NULL			},
 
     /* 386DX machines which utilize the VLB bus */
     { "[OPTi 495] Award 386DX clone",		"award386dx",		MACHINE_TYPE_386DX,		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	      machine_at_opti495_init, NULL			},
@@ -206,8 +207,8 @@ const machine_t machines[] = {
     { "[OPTi 495] MR 486 clone",		"mr486",		MACHINE_TYPE_486,		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	   machine_at_opti495_mr_init, NULL			},
     { "[OPTi 495] Dataexpert SX495 (486)",	"ami486",		MACHINE_TYPE_486,		{{"Intel", cpus_i486S1},      {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	  machine_at_opti495_ami_init, NULL			},
     { "[OPTi 895] Jetway J-403TG",		"403tg",		MACHINE_TYPE_486,		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT,								  1,   64,   1, 127,	        machine_at_403tg_init, NULL			},
-    { "[OPTi 802G] IBM PC 330 (type 6571)",		"pc330_6571",		MACHINE_TYPE_486,		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,	1,   64,   1, 127,	        machine_at_pc330_6571_init, NULL			},
+    { "[OPTi 802G] IBM PC 330 (type 6571)",	"pc330_6571",		MACHINE_TYPE_486,		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  1,   64,   1, 127,	   machine_at_pc330_6571_init, NULL			},
-	{ "[CS4031] AMI 486 CS4031",		"cs4031",		MACHINE_TYPE_486,		{{"Intel", cpus_i486S1},      {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT,								  1,   64,   1, 127,	       machine_at_cs4031_init, NULL			},
+    { "[CS4031] AMI 486 CS4031",		"cs4031",		MACHINE_TYPE_486,		{{"Intel", cpus_i486S1},      {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT,								  1,   64,   1, 127,	       machine_at_cs4031_init, NULL			},
     { "[SiS 471] ASUS VL/I-486SV2G (GX4)",	"vli486sv2g",		MACHINE_TYPE_486,		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   64,   1, 127,	   machine_at_vli486sv2g_init, NULL			},
     { "[SiS 471] AMI 486 Clone",		"ami471",		MACHINE_TYPE_486,		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   64,   1, 127,	       machine_at_ami471_init, NULL			},
 #if defined(DEV_BRANCH) && defined(USE_WIN471)
@@ -234,7 +235,10 @@ const machine_t machines[] = {
     { "[SiS 496] Rise Computer R418",		"r418",			MACHINE_TYPE_486,		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC,						  1,  255,   1, 255,		 machine_at_r418_init, NULL			},
     { "[SiS 496] Zida Tomato 4DP",		"4dps",			MACHINE_TYPE_486,		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC,						  1,  255,   1, 255,		 machine_at_4dps_init, NULL			},
 #if defined(DEV_BRANCH) && defined(NO_SIO)
-    { "[VIA VT82C496G] FIC VIP-IO2",		"486vipio2",		MACHINE_TYPE_486,		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,					  1,  128,   1, 255,		 machine_at_486vipio2_init, NULL			},
+    { "[VIA VT82C496G] FIC VIP-IO2",		"486vipio2",		MACHINE_TYPE_486,		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,					  1,  128,   1, 255,	    machine_at_486vipio2_init, NULL			},
+#endif
+#if defined(DEV_BRANCH) && defined(USE_M1489)
+    { "[ALi M1489] ABit AB-PB4",		"abpb4",		MACHINE_TYPE_486,		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC,					  1,  64,   1, 255,		 machine_at_abpb4_init, NULL			},
 #endif
 #if defined(DEV_BRANCH) && defined(USE_STPC)
     { "[STPC Client] ITOX STAR",		"itoxstar",		MACHINE_TYPE_486,		{{"ST", cpus_STPC6675},       {"",      NULL},       {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  128,   8, 255,	     machine_at_itoxstar_init, NULL			},
@@ -305,6 +309,7 @@ const machine_t machines[] = {
     { "[i430VX] Epox P55-VA",			"p55va",		MACHINE_TYPE_SOCKET7,		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  		  8,  128,   8, 127,		machine_at_p55va_init, NULL			},
     { "[i430VX] HP Brio 80xx",			"brio80xx",		MACHINE_TYPE_SOCKET7,		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		  8,  128,   8, 127,	     machine_at_brio80xx_init, NULL			},
     { "[i430VX] Biostar MB-8500TVX-A",		"8500tvxa",		MACHINE_TYPE_SOCKET7,		{{"Intel", cpus_Pentium},    {"", NULL},     {"",   NULL},     {"", NULL},    {"",      NULL}},		  	    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		  8,  128,   8, 127,	     machine_at_8500tvxa_init, NULL			},
+    { "[i430VX] Compaq Presario 4500",		"presario4500",		MACHINE_TYPE_SOCKET7,		{{"Intel", cpus_Pentium},    {"", NULL},     {"",   NULL},     {"", NULL},    {"",      NULL}},		  	    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO,			 		  8,  128,   8, 127,	     machine_at_presario4500_init, NULL			},
     { "[i430VX] Packard Bell PB680",		"pb680",		MACHINE_TYPE_SOCKET7,		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		  8,  128,   8, 127,	        machine_at_pb680_init, NULL			},
 
     /* 430TX */
@@ -364,6 +369,7 @@ const machine_t machines[] = {
     /* 440GX */
     { "[i440GX] Gigabyte GA-6GXU",		"6gxu",			MACHINE_TYPE_SLOT2,		{{"Intel", cpus_Xeon},        {"",      NULL},	     {"",      NULL},	     {"",      NULL},	  {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		 16, 2048,  16, 511,	         machine_at_6gxu_init, NULL			},
     { "[i440GX] SuperMicro Super S2DGE",	"s2dge",		MACHINE_TYPE_SLOT2,		{{"Intel", cpus_Xeon},        {"",      NULL},	     {"",      NULL},	     {"",      NULL},	  {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		 16, 2048,  16, 511,	        machine_at_s2dge_init, NULL			},
+    { "[i440GX] Freeway FW-6400GX",		"fw6400gx",		MACHINE_TYPE_SLOT2,		{{"Intel/Slot1", cpus_PentiumII},{"Intel/PGA370", cpus_Celeron},{"VIA", cpus_Cyrix3},{"Intel/Slot2", cpus_Xeon},{"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 16, 2032,  16, 511,	     machine_at_fw6400gx_init, NULL			},
 
     /* PGA370 machines */
     /* 440LX */

src/printer/prt_ps.c

@@ -32,12 +32,14 @@
 #include <86box/ui.h>
 #include <86box/prt_devs.h>
 
+
 #ifdef _WIN32
 # define GSDLLAPI __stdcall
 #else
 # define GSDLLAPI
 #endif
 
+
 #define GS_ARG_ENCODING_UTF16LE	2
 #define gs_error_Quit		-101 
 
@@ -46,31 +48,6 @@
 
 #define POSTSCRIPT_BUFFER_LENGTH	65536
 
-typedef struct gsapi_revision_s {
-    const char *product;
-    const char *copyright;
-    long revision;
-    long revisiondate;
-} gsapi_revision_t;
-
-static int 	(GSDLLAPI *gsapi_revision)(gsapi_revision_t *pr, int len);
-static int 	(GSDLLAPI *gsapi_new_instance)(void **pinstance, void *caller_handle);
-static void 	(GSDLLAPI *gsapi_delete_instance)(void *instance);
-static int 	(GSDLLAPI *gsapi_set_arg_encoding)(void *instance, int encoding);
-static int 	(GSDLLAPI *gsapi_init_with_args)(void *instance, int argc, char **argv);
-static int 	(GSDLLAPI *gsapi_exit)(void *instance);
-
-static dllimp_t ghostscript_imports[] = {
-  { "gsapi_revision",			&gsapi_revision			},
-  { "gsapi_new_instance",		&gsapi_new_instance		},
-  { "gsapi_delete_instance",		&gsapi_delete_instance		},
-  { "gsapi_set_arg_encoding",		&gsapi_set_arg_encoding		},
-  { "gsapi_init_with_args",		&gsapi_init_with_args		},
-  { "gsapi_exit",			&gsapi_exit			},
-  { NULL,				NULL					}
-};
-
-static void	*ghostscript_handle = NULL;
 
 typedef struct
 {
@@ -98,12 +75,39 @@ typedef struct
     size_t	buffer_pos;
 } ps_t;
 
+typedef struct gsapi_revision_s {
+    const char *product;
+    const char *copyright;
+    long revision;
+    long revisiondate;
+} gsapi_revision_t;
+
+
+static int 	(GSDLLAPI *gsapi_revision)(gsapi_revision_t *pr, int len);
+static int 	(GSDLLAPI *gsapi_new_instance)(void **pinstance, void *caller_handle);
+static void 	(GSDLLAPI *gsapi_delete_instance)(void *instance);
+static int 	(GSDLLAPI *gsapi_set_arg_encoding)(void *instance, int encoding);
+static int 	(GSDLLAPI *gsapi_init_with_args)(void *instance, int argc, char **argv);
+static int 	(GSDLLAPI *gsapi_exit)(void *instance);
+
+static dllimp_t ghostscript_imports[] = {
+  { "gsapi_revision",			&gsapi_revision			},
+  { "gsapi_new_instance",		&gsapi_new_instance		},
+  { "gsapi_delete_instance",		&gsapi_delete_instance		},
+  { "gsapi_set_arg_encoding",		&gsapi_set_arg_encoding		},
+  { "gsapi_init_with_args",		&gsapi_init_with_args		},
+  { "gsapi_exit",			&gsapi_exit			},
+  { NULL,				NULL				}
+};
+
+static void	*ghostscript_handle = NULL;
+
+
 static void
 reset_ps(ps_t *dev)
 {
-    if (dev == NULL) { 
+    if (dev == NULL)
 	return;
-    }
 
     dev->ack = false;
 
@@ -114,6 +118,7 @@ reset_ps(ps_t *dev)
     timer_disable(&dev->timeout_timer);
 }
 
+
 static void
 pulse_timer(void *priv)
 {
@@ -127,6 +132,7 @@ pulse_timer(void *priv)
     timer_disable(&dev->pulse_timer);
 }
 
+
 static int
 convert_to_pdf(ps_t *dev)
 {
@@ -153,42 +159,29 @@ convert_to_pdf(ps_t *dev)
     gsargv[8] = input_fn;
 
     code = gsapi_new_instance(&instance, dev);
-    if (code < 0) {
+    if (code < 0)
 	return code;
-    }
 
     code = gsapi_set_arg_encoding(instance, GS_ARG_ENCODING_UTF16LE);
 
-    if (code == 0) {
+    if (code == 0)
 	code = gsapi_init_with_args(instance, 9, (char **) gsargv);
-    }
 
-    if (code == 0 || code == gs_error_Quit) {
+    if (code == 0 || code == gs_error_Quit)
 	code = gsapi_exit(instance);
-    } else {
+    else
 	gsapi_exit(instance);
-    }
 
     gsapi_delete_instance(instance);
 
-    if (code == 0) {
+    if (code == 0)
 	plat_remove(input_fn);
-    } else {
+    else
 	plat_remove(output_fn);
-    }
 
     return code;
 }
 
-static void
-finish_document(ps_t *dev)
-{
-    if (ghostscript_handle != NULL) {
-	convert_to_pdf(dev);
-    }
-
-    dev->filename[0] = 0;
-}
 
 static void
 write_buffer(ps_t *dev, bool newline)
@@ -196,22 +189,19 @@ write_buffer(ps_t *dev, bool newline)
     wchar_t path[1024];
     FILE *fp;
 
-    if (dev->buffer[0] == 0) {
+    if (dev->buffer[0] == 0)
 	return;
-    }
 
-    if (dev->filename[0] == 0) {
+    if (dev->filename[0] == 0)
 	plat_tempfile(dev->filename, NULL, L".ps");
-    }
 
     path[0] = 0;
     wcscat(path, dev->printer_path);
     wcscat(path, dev->filename);
 
     fp = plat_fopen(path, L"a");
-    if (fp == NULL) {
+    if (fp == NULL)
 	return;
-    }
 
     fseek(fp, 0, SEEK_END);
 
@@ -221,36 +211,42 @@ write_buffer(ps_t *dev, bool newline)
 
     dev->buffer[0] = 0;
     dev->buffer_pos = 0;
+
+    if (ghostscript_handle != NULL)
+	convert_to_pdf(dev);
+
+    dev->filename[0] = 0;
 }
 
+
 static void
 timeout_timer(void *priv)
 {
     ps_t *dev = (ps_t *) priv;
 
     write_buffer(dev, false);
-    finish_document(dev);
 
     timer_disable(&dev->timeout_timer);
 }
 
+
 static void
 ps_write_data(uint8_t val, void *p)
 {
     ps_t *dev = (ps_t *) p;
 
-    if (dev == NULL) { 
+    if (dev == NULL)
 	return;
-    }
 
     dev->data = (char) val;
 }
 
+
 static void
 process_data(ps_t *dev)
 {
     /* Check for non-printable characters */
-    if (dev->data < 0x20 || dev->data == 0x7F) {
+    if ((dev->data < 0x20) || (dev->data == 0x7f)) {
 	switch (dev->data) {
 		/* The following characters are considered white-space
 		   by the PostScript specification */
@@ -268,7 +264,6 @@ process_data(ps_t *dev)
 		/* Ctrl+D (0x04) marks the end of the document */
 		case '\4':
 			write_buffer(dev, false);
-			finish_document(dev);
 			return;
 
 		/* Don't bother with the others */
@@ -278,32 +273,29 @@ process_data(ps_t *dev)
     }
 
     /* Flush the buffer if we have run to its end */
-    if (dev->buffer_pos == POSTSCRIPT_BUFFER_LENGTH - 1) {
+    if (dev->buffer_pos == POSTSCRIPT_BUFFER_LENGTH - 1)
 	write_buffer(dev, false);
-	dev->buffer_pos = 0;
-    }
 
     dev->buffer[dev->buffer_pos++] = dev->data;
     dev->buffer[dev->buffer_pos] = 0;
 }
 
+
 static void
 ps_write_ctrl(uint8_t val, void *p)
 {
     ps_t *dev = (ps_t *) p;
 
-    if (dev == NULL) { 
+    if (dev == NULL)
 	return;
-    }
 
     dev->autofeed = val & 0x02 ? true : false;
 
-    if (val & 0x08) {
+    if (val & 0x08)
 	dev->select = true;
-    }
 
     if ((val & 0x04) && !(dev->ctrl & 0x04)) {
-	// reset printer
+	/* Reset printer */
 	dev->select = false;
 
 	reset_ps(dev);
@@ -321,21 +313,20 @@ ps_write_ctrl(uint8_t val, void *p)
     dev->ctrl = val;
 }
 
+
 static uint8_t
 ps_read_status(void *p)
 {
     ps_t *dev = (ps_t *) p;
-    uint8_t ret = 0x1f;
+    uint8_t ret = 0x9f;
 
-    ret |= 0x80;
+    if (!dev->ack)
-
-    if (!dev->ack) {
 	ret |= 0x40;
-    }
 
     return(ret);
 }
 
+
 static void *
 ps_init(void *lpt)
 {
@@ -351,23 +342,22 @@ ps_init(void *lpt)
 
     /* Try loading the DLL. */
     ghostscript_handle = dynld_module(PATH_GHOSTSCRIPT_DLL, ghostscript_imports);
-    if (ghostscript_handle == NULL) {
+    if (ghostscript_handle == NULL)
 	ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2114, (wchar_t *) IDS_2132);
-    } else {
+    else {
-	if (gsapi_revision(&rev, sizeof(rev)) == 0) {
+	if (gsapi_revision(&rev, sizeof(rev)) == 0)
 		pclog("Loaded %s, rev %ld (%ld)\n", rev.product, rev.revision, rev.revisiondate);
-	} else {
+	else {
 		dynld_close(ghostscript_handle);
 		ghostscript_handle = NULL;
 	}
     }
 
-    // Cache print folder path
+    /* Cache print folder path. */
     memset(dev->printer_path, 0x00, sizeof(dev->printer_path));
     plat_append_filename(dev->printer_path, usr_path, L"printer");
-    if (!plat_dir_check(dev->printer_path)) {
+    if (!plat_dir_check(dev->printer_path))
 	plat_dir_create(dev->printer_path);
-    }
     plat_path_slash(dev->printer_path);
 
     timer_add(&dev->pulse_timer, pulse_timer, dev, 0);
@@ -376,19 +366,17 @@ ps_init(void *lpt)
     return(dev);
 }
 
+
 static void
 ps_close(void *p)
 {
     ps_t *dev = (ps_t *) p;
 
-    if (dev == NULL) { 
+    if (dev == NULL)
 	return;
-    }
 
-    if (dev->buffer[0] != 0) {
+    if (dev->buffer[0] != 0)
 	write_buffer(dev, false);
-	finish_document(dev);
-    }
 
     if (ghostscript_handle != NULL) {
 	dynld_close(ghostscript_handle);
@@ -398,6 +386,7 @@ ps_close(void *p)
     free(dev);
 }
 
+
 const lpt_device_t lpt_prt_ps_device = {
     .name = "Generic PostScript printer",
     .init = ps_init,
@@ -407,4 +396,4 @@ const lpt_device_t lpt_prt_ps_device = {
     .read_data = NULL,
     .read_status = ps_read_status,
     .read_ctrl = NULL
-};
+};

src/sio/sio_fdc37c93x.c

@@ -632,7 +632,8 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv)
 }
 
 
-static uint8_t fdc37c93x_read(uint16_t port, void *priv)
+static uint8_t
+fdc37c93x_read(uint16_t port, void *priv)
 {
     fdc37c93x_t *dev = (fdc37c93x_t *) priv;
     uint8_t index = (port & 1) ? 0 : 1;
@@ -676,7 +677,7 @@ fdc37c93x_reset(fdc37c93x_t *dev)
     dev->regs[0x26] = 0xF0;
     dev->regs[0x27] = 0x03;
 
-    for (i = 0; i < 10; i++)
+    for (i = 0; i < 11; i++)
 	memset(dev->ld_regs[i], 0, 256);
 
     /* Logical device 0: FDD */
@@ -826,7 +827,7 @@ fdc37c93x_init(const device_t *info)
 	nvr_bank_set(1, 0xff, dev->nvr);
     }
 
-    if (dev->chip_id == 0x03)
+    if (dev->is_apm || (dev->chip_id == 0x03))
 	dev->access_bus = device_add(&access_bus_device);
 
     if (dev->is_apm)

src/win/Makefile.mingw

@@ -81,6 +81,9 @@ ifeq ($(DEV_BUILD), y)
  ifndef STPC
   STPC		:= y
  endif
+ ifndef M1489
+  M1489		:= y
+ endif
  ifndef VGAWONDER
   VGAWONDER	:= y
  endif
@@ -160,6 +163,9 @@ else
  ifndef STPC
   STPC		:= y
  endif
+ ifndef M1489
+  M1489		:= n
+ endif
  ifndef VGAWONDER
   VGAWONDER	:= n
  endif
@@ -563,6 +569,11 @@ OPTS		+= -DUSE_STPC
 DEVBROBJ	+= stpc.o
 endif
 
+ifeq ($(M1489), y)
+OPTS		+= -DUSE_M1489
+DEVBROBJ	+= ali1489.o
+endif
+
 ifeq ($(596B), y)
 OPTS		+= -DUSE_596B
 endif
@@ -628,7 +639,7 @@ CPUOBJ		:= cpu.o cpu_table.o \
 CHIPSETOBJ	:= acc2168.o cs8230.o ali1429.o headland.o i82335.o cs4031.o \
 		    intel_420ex.o intel_4x0.o intel_sio.o intel_piix.o ioapic.o \
 		    neat.o opti495.o opti895.o opti5x7.o scamp.o scat.o via_vt82c49x.o via_vt82c505.o \
-		    sis_85c310.o sis_85c471.o sis_85c496.o opti283.o opti291.o \
+		    sis_85c310.o sis_85c471.o sis_85c496.o opti283.o opti291.o umc491.o \
 		    via_apollo.o via_vpx.o via_vt82c586b.o via_vt82c596b.o wd76c10.o vl82c480.o \
 			amd640.o
 

src/win/win_sdl.c

@@ -181,6 +181,8 @@ sdl_stretch(int *w, int *h, int *x, int *y)
 		*y = (int) dy;
 		break;
     }
+
+    sdl_reinit_texture();
 }
 
 
@@ -489,6 +491,18 @@ sdl_inith_fs(HWND h)
 }
 
 
+void
+sdl_reinit_texture()
+{
+    if (sdl_render == NULL)
+        return;
+
+    SDL_DestroyTexture(sdl_tex);
+    sdl_tex = SDL_CreateTexture(sdl_render, SDL_PIXELFORMAT_ARGB8888,
+				SDL_TEXTUREACCESS_STREAMING, 2048, 2048);
+}
+
+
 int
 sdl_pause(void)
 {
@@ -514,6 +528,8 @@ sdl_resize(int x, int y)
 
     cur_w = x;
     cur_h = y;
+
+    sdl_reinit_texture();
 }