From aa0b4dfab7c34569aea26f8ab98520b16c9d4885 Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Sun, 17 Dec 2023 12:43:07 +0100
Subject: [PATCH] ALi M1543(c) ACPI and SMBUS PCI BAR's now correctly return
 all 0x00's when locked, as documented by the M1543 datasheet, fixes the PCI
 error found by Dizzy on the ASUS P5A with Debian Lenny.

---
 src/chipset/ali1543.c | 107 +++++++++++++++++++++++-------------------
 1 file changed, 60 insertions(+), 47 deletions(-)

diff --git a/src/chipset/ali1543.c b/src/chipset/ali1543.c
index 4d8dea3ce..fb9fd70ce 100644
--- a/src/chipset/ali1543.c
+++ b/src/chipset/ali1543.c
@@ -984,7 +984,7 @@ static void
 ali7101_write(int func, int addr, uint8_t val, void *priv)
 {
     ali1543_t *dev = (ali1543_t *) priv;
-    ali1543_log("M7101: dev->pmu_conf[%02x] = %02x\n", addr, val);
+    ali1543_log("M7101: [W] dev->pmu_conf[%02x] = %02x\n", addr, val);
 
     if (func > 0)
         return;
@@ -1408,65 +1408,78 @@ ali7101_read(int func, int addr, void *priv)
     uint8_t    ret = 0xff;
 
     if (dev->pmu_dev_enable && (func == 0)) {
-        if ((dev->pmu_conf[0xc9] & 0x01) && (addr >= 0x40) && (addr != 0xc9))
-            return 0xff;
-
-        /* TODO: C4, C5 = GPIREG (masks: 0D, 0E) */
-        switch (addr) {
-            default:
-                ret = dev->pmu_conf[addr];
-                break;
-            case 0x42:
-                ret = (dev->pmu_conf[addr] & 0xf7) | (nvr_smi_status(dev->nvr) ? 0x08 : 0x00);
-                break;
-            case 0x43:
-                ret = acpi_ali_soft_smi_status_read(dev->acpi) ? 0x10 : 0x00;
-                break;
-            case 0x7f:
-                ret = 0x80;
-                break;
-            case 0xbc:
-                ret = inb(0x70);
-                break;
-        }
-
-        if (dev->pmu_conf[0x77] & 0x10) {
+        if (!(dev->pmu_conf[0xc9] & 0x01) || (addr < 0x40) || (addr == 0xc9)) {
+            /* TODO: C4, C5 = GPIREG (masks: 0D, 0E) */
             switch (addr) {
+                default:
+                    ret = dev->pmu_conf[addr];
+                    break;
+                case 0x10 ... 0x13:
+                    if (dev->pmu_conf[0x5b] & 0x02)
+                        ret = 0x00;
+                    else
+                        ret = dev->pmu_conf[addr];
+                    break;
+                case 0x14 ... 0x17:
+                    if (dev->pmu_conf[0x5b] & 0x04)
+                        ret = 0x00;
+                    else
+                        ret = dev->pmu_conf[addr];
+                    break;
                 case 0x42:
-                    dev->pmu_conf[addr] &= 0xe0;
+                    ret = (dev->pmu_conf[addr] & 0xf7) | (nvr_smi_status(dev->nvr) ? 0x08 : 0x00);
                     break;
                 case 0x43:
-                    dev->pmu_conf[addr] &= 0xef;
-                    acpi_ali_soft_smi_status_write(dev->acpi, 0);
+                    ret = acpi_ali_soft_smi_status_read(dev->acpi) ? 0x10 : 0x00;
                     break;
+                case 0x7f:
+                    ret = 0x80;
+                    break;
+                case 0xbc:
+                    ret = inb(0x70);
+                    break;
+            }
 
-                case 0x48:
-                    dev->pmu_conf[addr] = 0x00;
-                    break;
-                case 0x49:
-                    dev->pmu_conf[addr] &= 0x60;
-                    break;
-                case 0x4a:
-                    dev->pmu_conf[addr] &= 0xc7;
-                    break;
+            if (dev->pmu_conf[0x77] & 0x10) {
+                switch (addr) {
+                    case 0x42:
+                        dev->pmu_conf[addr] &= 0xe0;
+                        break;
+                    case 0x43:
+                        dev->pmu_conf[addr] &= 0xef;
+                        acpi_ali_soft_smi_status_write(dev->acpi, 0);
+                        break;
 
-                case 0x4e:
-                    dev->pmu_conf[addr] &= 0xfa;
-                    break;
-                case 0x4f:
-                    dev->pmu_conf[addr] &= 0xfe;
-                    break;
+                    case 0x48:
+                        dev->pmu_conf[addr] = 0x00;
+                        break;
+                    case 0x49:
+                        dev->pmu_conf[addr] &= 0x60;
+                        break;
+                    case 0x4a:
+                        dev->pmu_conf[addr] &= 0xc7;
+                        break;
 
-                case 0x74:
-                    dev->pmu_conf[addr] &= 0xcc;
-                    break;
+                    case 0x4e:
+                        dev->pmu_conf[addr] &= 0xfa;
+                        break;
+                    case 0x4f:
+                        dev->pmu_conf[addr] &= 0xfe;
+                        break;
 
-                default:
-                    break;
+                    case 0x74:
+                        dev->pmu_conf[addr] &= 0xcc;
+                        break;
+
+                    default:
+                        break;
+                }
             }
         }
     }
 
+    ali1543_log("M7101: [R] dev->pmu_conf[%02x] = %02x\n", addr, ret);
+
     return ret;
 }