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usb: fix port reset logic

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This commit is contained in:
Cacodemon345
2023-05-05 22:09:08 +06:00
parent 4b0384e1b2
commit af3bc0412c
1 changed files with 3 additions and 1 deletions
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4
src/usb.c
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@@ -215,6 +215,7 @@ ohci_port_reset_callback(void* priv)
usb_t *dev = (usb_t *) priv; usb_t *dev = (usb_t *) priv;
dev->ohci_mmio[OHCI_HcRhPortStatus1] &= ~0x10; dev->ohci_mmio[OHCI_HcRhPortStatus1] &= ~0x10;
dev->ohci_mmio[OHCI_HcRhPortStatus1 + 2] |= 0x10;
} }
void void
@@ -223,6 +224,7 @@ ohci_port_reset_callback_2(void* priv)
usb_t *dev = (usb_t *) priv; usb_t *dev = (usb_t *) priv;
dev->ohci_mmio[OHCI_HcRhPortStatus2] &= ~0x10; dev->ohci_mmio[OHCI_HcRhPortStatus2] &= ~0x10;
dev->ohci_mmio[OHCI_HcRhPortStatus2 + 2] |= 0x10;
} }
static void static void
@@ -368,7 +370,6 @@ ohci_mmio_write(uint32_t addr, uint8_t val, void *p)
if (old & 0x01) { if (old & 0x01) {
dev->ohci_mmio[addr] |= 0x10; dev->ohci_mmio[addr] |= 0x10;
timer_on_auto(&dev->ohci_port_reset_timer[(addr - OHCI_HcRhPortStatus1) / 4], 10000.); timer_on_auto(&dev->ohci_port_reset_timer[(addr - OHCI_HcRhPortStatus1) / 4], 10000.);
dev->ohci_mmio[addr + 2] |= 0x10;
} else } else
dev->ohci_mmio[addr + 2] |= 0x01; dev->ohci_mmio[addr + 2] |= 0x01;
} }
@@ -449,6 +450,7 @@ usb_reset(void *priv)
dev->ohci_mmio[OHCI_HcRevision] = 0x10; dev->ohci_mmio[OHCI_HcRevision] = 0x10;
dev->ohci_mmio[OHCI_HcRevision + 1] = 0x01; dev->ohci_mmio[OHCI_HcRevision + 1] = 0x01;
dev->ohci_mmio[OHCI_HcRhDescriptorA] = 0x02; dev->ohci_mmio[OHCI_HcRhDescriptorA] = 0x02;
dev->ohci_mmio[OHCI_HcRhDescriptorA + 1] = 0x02;
io_removehandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, uhci_reg_writew, NULL, dev); io_removehandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, uhci_reg_writew, NULL, dev);
dev->uhci_enable = 0; dev->uhci_enable = 0;